Index: lib/Target/AArch64/AArch64SVEInstrInfo.td =================================================================== --- lib/Target/AArch64/AArch64SVEInstrInfo.td +++ lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -892,40 +892,40 @@ defm LSR_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b001, "lsr">; defm LSL_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b011, "lsl">; - def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16>; - def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32>; - def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16>; - def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32>; - def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32>; - def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16>; - def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16>; - def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32>; - def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16>; - def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32>; - def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16>; - def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64>; - def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32>; - def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64>; - def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64>; - def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64>; - def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16>; - def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32>; - def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16>; - def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16>; - def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32>; - def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16>; - def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64>; - def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64>; - def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32>; - def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32>; - def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64>; - def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32>; - def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64>; - def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32>; - def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64>; - def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64>; - def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64>; - def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64>; + def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16, ElementSizeS>; + def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32, ElementSizeS>; + def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16, ElementSizeH>; + def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32, ElementSizeS>; + def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32, ElementSizeS>; + def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16, ElementSizeH>; + def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16, ElementSizeH>; + def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32, ElementSizeS>; + def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16, ElementSizeH>; + def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32, ElementSizeS>; + def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16, ElementSizeD>; + def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64, ElementSizeD>; + def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32, ElementSizeD>; + def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64, ElementSizeD>; + def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64, ElementSizeD>; + def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64, ElementSizeD>; + def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16, ElementSizeS>; + def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32, ElementSizeD>; + def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16, ElementSizeS>; + def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16, ElementSizeD>; + def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32, ElementSizeD>; + def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16, ElementSizeD>; + def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64, ElementSizeD>; + def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64, ElementSizeD>; + def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32, ElementSizeD>; + def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32, ElementSizeD>; + def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64, ElementSizeD>; + def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32, ElementSizeS>; + def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64, ElementSizeD>; + def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32, ElementSizeS>; + def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64, ElementSizeD>; + def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64, ElementSizeD>; + def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64, ElementSizeD>; + def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64, ElementSizeD>; defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn">; defm FRINTP_ZPmZ : sve_fp_2op_p_zd_HSD<0b00001, "frintp">; Index: lib/Target/AArch64/SVEInstrFormats.td =================================================================== --- lib/Target/AArch64/SVEInstrFormats.td +++ lib/Target/AArch64/SVEInstrFormats.td @@ -421,6 +421,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_count_v opc, string asm> { @@ -506,6 +508,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_countvlv opc, string asm, ZPRRegOp zprty> { @@ -811,6 +815,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_perm_insrs { @@ -835,6 +841,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_perm_insrv { @@ -863,6 +871,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } //===----------------------------------------------------------------------===// @@ -956,6 +966,8 @@ let Constraints = "$Zdn = $_Zdn"; let DecoderMethod = "DecodeSVELogicalImmInstruction"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_log_imm opc, string asm, string alias> { @@ -1066,6 +1078,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_fp_2op_i_p_zds opc, string asm, Operand imm_ty> { @@ -1093,6 +1107,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_fp_2op_p_zds opc, string asm> { @@ -1118,6 +1134,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_fp_ftmad { @@ -1179,6 +1197,8 @@ let Inst{4-0} = Zda; let Constraints = "$Zda = $_Zda"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_fp_3op_p_zds_a opc, string asm> { @@ -1208,6 +1228,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_fp_3op_p_zds_b opc, string asm> { @@ -1236,6 +1258,8 @@ let Inst{4-0} = Zda; let Constraints = "$Zda = $_Zda"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_fp_fma_by_indexed_elem { @@ -1326,6 +1350,8 @@ let Inst{4-0} = Zda; let Constraints = "$Zda = $_Zda"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_fp_fcmla { @@ -1357,6 +1383,8 @@ let Inst{4-0} = Zda; let Constraints = "$Zda = $_Zda"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_fp_fcmla_by_indexed_elem { @@ -1398,6 +1426,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_fp_fcadd { @@ -1478,7 +1508,7 @@ //===----------------------------------------------------------------------===// class sve_fp_2op_p_zd opc, string asm, RegisterOperand i_zprtype, - RegisterOperand o_zprtype> + RegisterOperand o_zprtype, ElementSizeEnum size> : I<(outs o_zprtype:$Zd), (ins i_zprtype:$_Zd, PPR3bAny:$Pg, i_zprtype:$Zn), asm, "\t$Zd, $Pg/m, $Zn", "", @@ -1496,12 +1526,14 @@ let Inst{4-0} = Zd; let Constraints = "$Zd = $_Zd"; + let DestructiveInstType = Destructive; + let ElementSize = size; } multiclass sve_fp_2op_p_zd_HSD opc, string asm> { - def _H : sve_fp_2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16>; - def _S : sve_fp_2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32>; - def _D : sve_fp_2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64>; + def _H : sve_fp_2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16, ElementSizeH>; + def _S : sve_fp_2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32, ElementSizeS>; + def _D : sve_fp_2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64, ElementSizeD>; } //===----------------------------------------------------------------------===// @@ -1553,6 +1585,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_bin_pred_log opc, string asm> { @@ -1614,6 +1648,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_mladdsub_vvv_pred opc, string asm> { @@ -1644,6 +1680,8 @@ let Inst{4-0} = Zda; let Constraints = "$Zda = $_Zda"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_mlas_vvv_pred opc, string asm> { @@ -1674,6 +1712,8 @@ let Inst{4-0} = Zda; let Constraints = "$Zda = $_Zda"; + let DestructiveInstType = Destructive; + let ElementSize = zprty1.ElementSize; } multiclass sve_intx_dot { @@ -1702,6 +1742,8 @@ let Inst{4-0} = Zda; let Constraints = "$Zda = $_Zda"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_intx_dot_by_indexed_elem { @@ -1743,6 +1785,8 @@ let Inst{4-0} = Zd; let Constraints = "$Zd = $_Zd"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_un_pred_arit_0 opc, string asm> { @@ -1873,6 +1917,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_arith_imm0 opc, string asm> { @@ -1898,6 +1944,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_arith_imm1 opc, string asm, Operand immtype> { @@ -1958,6 +2006,8 @@ let Inst{4-0} = Zd; let Constraints = "$Zd = $_Zd"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_dup_fpimm_pred { @@ -1990,6 +2040,9 @@ let Inst{13} = imm{8}; // sh let Inst{12-5} = imm{7-0}; // imm8 let Inst{4-0} = Zd; + + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_dup_imm_pred_merge { @@ -2444,9 +2497,9 @@ //===----------------------------------------------------------------------===// // SVE Bitwise Shift - Predicated Group //===----------------------------------------------------------------------===// - class sve_int_bin_pred_shift_imm tsz8_64, bits<3> opc, string asm, - ZPRRegOp zprty, Operand immtype> + ZPRRegOp zprty, Operand immtype, + ElementSizeEnum size> : I<(outs zprty:$Zdn), (ins PPR3bAny:$Pg, zprty:$_Zdn, immtype:$imm), asm, "\t$Zdn, $Pg/m, $_Zdn, $imm", "", @@ -2465,31 +2518,41 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = size; } multiclass sve_int_bin_pred_shift_imm_left opc, string asm> { - def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftL8>; - def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftL16> { + def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftL8, + ElementSizeB>; + def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftL16, + ElementSizeH> { let Inst{8} = imm{3}; } - def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftL32> { + def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftL32, + ElementSizeS> { let Inst{9-8} = imm{4-3}; } - def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftL64> { + def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftL64, + ElementSizeD> { let Inst{22} = imm{5}; let Inst{9-8} = imm{4-3}; } } multiclass sve_int_bin_pred_shift_imm_right opc, string asm> { - def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftR8>; - def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftR16> { + def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftR8, + ElementSizeB>; + def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftR16, + ElementSizeH> { let Inst{8} = imm{3}; } - def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftR32> { + def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftR32, + ElementSizeS> { let Inst{9-8} = imm{4-3}; } - def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftR64> { + def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftR64, + ElementSizeD> { let Inst{22} = imm{5}; let Inst{9-8} = imm{4-3}; } @@ -2515,6 +2578,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_bin_pred_shift opc, string asm> { @@ -3149,6 +3214,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_perm_clast_zz { @@ -3226,6 +3293,8 @@ let Inst{4-0} = Zdn; let Constraints = "$Zdn = $_Zdn"; + let DestructiveInstType = Destructive; + let ElementSize = ElementSizeNone; } multiclass sve_int_perm_splice { @@ -3254,6 +3323,8 @@ let Inst{4-0} = Zd; let Constraints = "$Zd = $_Zd"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_perm_rev_rbit { @@ -3295,6 +3366,8 @@ let Inst{4-0} = Zd; let Constraints = "$Zd = $_Zd"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_perm_cpy_r { @@ -3330,6 +3403,8 @@ let Inst{4-0} = Zd; let Constraints = "$Zd = $_Zd"; + let DestructiveInstType = Destructive; + let ElementSize = zprty.ElementSize; } multiclass sve_int_perm_cpy_v { @@ -4267,6 +4342,8 @@ let Inst{12-10} = Pg; let Inst{9-5} = Zn; let Inst{4-0} = Zd; + + let ElementSize = zprty.ElementSize; } multiclass sve_int_movprfx_pred_merge opc, string asm> { Index: test/MC/AArch64/SVE/abs.s =================================================================== --- test/MC/AArch64/SVE/abs.s +++ test/MC/AArch64/SVE/abs.s @@ -54,3 +54,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd6,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d6 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +abs z4.d, p7/m, z31.d +// CHECK-INST: abs z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd6,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d6 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +abs z4.d, p7/m, z31.d +// CHECK-INST: abs z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd6,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d6 04 Index: test/MC/AArch64/SVE/add-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/add-diagnostics.s +++ test/MC/AArch64/SVE/add-diagnostics.s @@ -144,3 +144,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280] // CHECK-NEXT: add z0.d, z0.d, #65536 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +add z31.d, z31.d, #65280 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: add z31.d, z31.d, #65280 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23.s, p0/z, z30.s +add z23.s, z13.s, z8.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: add z23.s, z13.s, z8.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +add z23.s, z13.s, z8.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: add z23.s, z13.s, z8.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/add.s =================================================================== --- test/MC/AArch64/SVE/add.s +++ test/MC/AArch64/SVE/add.s @@ -283,3 +283,43 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff ff e0 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.b, p7/z, z6.b +// CHECK-INST: movprfx z4.b, p7/z, z6.b +// CHECK-ENCODING: [0xc4,0x3c,0x10,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c 10 04 + +add z4.b, p7/m, z4.b, z31.b +// CHECK-INST: add z4.b, p7/m, z4.b, z31.b +// CHECK-ENCODING: [0xe4,0x1f,0x00,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f 00 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +add z4.b, p7/m, z4.b, z31.b +// CHECK-INST: add z4.b, p7/m, z4.b, z31.b +// CHECK-ENCODING: [0xe4,0x1f,0x00,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f 00 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +add z31.d, z31.d, #65280 +// CHECK-INST: add z31.d, z31.d, #65280 +// CHECK-ENCODING: [0xff,0xff,0xe0,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff ff e0 25 Index: test/MC/AArch64/SVE/adr-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/adr-diagnostics.s +++ test/MC/AArch64/SVE/adr-diagnostics.s @@ -57,3 +57,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3' // CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #4] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +adr z0.d, [z0.d, z0.d, sxtw #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +adr z0.d, [z0.d, z0.d, sxtw #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/and-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/and-diagnostics.s +++ test/MC/AArch64/SVE/and-diagnostics.s @@ -92,3 +92,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: and p0.b, p0/m, p1.b, p2.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +and z0.d, z0.d, #0x6 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: and z0.d, z0.d, #0x6 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23.d, p0/z, z30.d +and z23.d, z13.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: and z23.d, z13.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +and z23.d, z13.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: and z23.d, z13.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/and.s =================================================================== --- test/MC/AArch64/SVE/and.s +++ test/MC/AArch64/SVE/and.s @@ -108,3 +108,43 @@ // CHECK-ENCODING: [0xef,0x7d,0x0f,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ef 7d 0f 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +and z4.d, p7/m, z4.d, z31.d +// CHECK-INST: and z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xda,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f da 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +and z4.d, p7/m, z4.d, z31.d +// CHECK-INST: and z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xda,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f da 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +and z0.d, z0.d, #0x6 +// CHECK-INST: and z0.d, z0.d, #0x6 +// CHECK-ENCODING: [0x20,0xf8,0x83,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 f8 83 05 Index: test/MC/AArch64/SVE/andv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/andv-diagnostics.s +++ test/MC/AArch64/SVE/andv-diagnostics.s @@ -31,4 +31,19 @@ andv h0, p8, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: andv h0, p8, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +andv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: andv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +andv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: andv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/asr-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/asr-diagnostics.s +++ test/MC/AArch64/SVE/asr-diagnostics.s @@ -122,3 +122,31 @@ // CHECK-NEXT: asr z0.b, p8/m, z0.b, z1.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +asr z31.d, z31.d, #64 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: asr z31.d, z31.d, #64 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +asr z31.d, z31.d, #64 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: asr z31.d, z31.d, #64 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +asr z0.s, z1.s, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: asr z0.s, z1.s, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +asr z0.s, z1.s, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: asr z0.s, z1.s, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/asr.s =================================================================== --- test/MC/AArch64/SVE/asr.s +++ test/MC/AArch64/SVE/asr.s @@ -162,3 +162,55 @@ // CHECK-ENCODING: [0x20,0x80,0xa2,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 80 a2 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p0/z, z6.d +// CHECK-INST: movprfx z31.d, p0/z, z6.d +// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 20 d0 04 + +asr z31.d, p0/m, z31.d, #64 +// CHECK-INST: asr z31.d, p0/m, z31.d, #64 +// CHECK-ENCODING: [0x1f,0x80,0x80,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 1f 80 80 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +asr z31.d, p0/m, z31.d, #64 +// CHECK-INST: asr z31.d, p0/m, z31.d, #64 +// CHECK-ENCODING: [0x1f,0x80,0x80,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 1f 80 80 04 + +movprfx z0.s, p0/z, z7.s +// CHECK-INST: movprfx z0.s, p0/z, z7.s +// CHECK-ENCODING: [0xe0,0x20,0x90,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 20 90 04 + +asr z0.s, p0/m, z0.s, z1.d +// CHECK-INST: asr z0.s, p0/m, z0.s, z1.d +// CHECK-ENCODING: [0x20,0x80,0x98,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 80 98 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +asr z0.s, p0/m, z0.s, z1.d +// CHECK-INST: asr z0.s, p0/m, z0.s, z1.d +// CHECK-ENCODING: [0x20,0x80,0x98,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 80 98 04 Index: test/MC/AArch64/SVE/asrd.s =================================================================== --- test/MC/AArch64/SVE/asrd.s +++ test/MC/AArch64/SVE/asrd.s @@ -54,3 +54,31 @@ // CHECK-ENCODING: [0x1f,0x80,0x84,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 1f 80 84 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p0/z, z6.d +// CHECK-INST: movprfx z31.d, p0/z, z6.d +// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 20 d0 04 + +asrd z31.d, p0/m, z31.d, #64 +// CHECK-INST: asrd z31.d, p0/m, z31.d, #64 +// CHECK-ENCODING: [0x1f,0x80,0x84,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 1f 80 84 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +asrd z31.d, p0/m, z31.d, #64 +// CHECK-INST: asrd z31.d, p0/m, z31.d, #64 +// CHECK-ENCODING: [0x1f,0x80,0x84,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 1f 80 84 04 Index: test/MC/AArch64/SVE/asrr.s =================================================================== --- test/MC/AArch64/SVE/asrr.s +++ test/MC/AArch64/SVE/asrr.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0x00,0x80,0xd4,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 80 d4 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +asrr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: asrr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x80,0xd4,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 80 d4 04 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +asrr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: asrr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x80,0xd4,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 80 d4 04 Index: test/MC/AArch64/SVE/bic-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/bic-diagnostics.s +++ test/MC/AArch64/SVE/bic-diagnostics.s @@ -92,3 +92,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: bic p0.b, p0/m, p1.b, p2.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +bic z0.d, z0.d, #0x6 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: bic z0.d, z0.d, #0x6 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23.d, p0/z, z30.d +bic z23.d, z13.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: bic z23.d, z13.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +bic z23.d, z13.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: bic z23.d, z13.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/bic.s =================================================================== --- test/MC/AArch64/SVE/bic.s +++ test/MC/AArch64/SVE/bic.s @@ -102,3 +102,43 @@ // CHECK-ENCODING: [0x10,0x40,0x00,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 10 40 00 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +bic z4.d, p7/m, z4.d, z31.d +// CHECK-INST: bic z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xdb,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f db 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +bic z4.d, p7/m, z4.d, z31.d +// CHECK-INST: bic z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xdb,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f db 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +bic z0.d, z0.d, #0x6 +// CHECK-INST: and z0.d, z0.d, #0xfffffffffffffff9 +// CHECK-ENCODING: [0xa0,0xef,0x83,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: a0 ef 83 05 Index: test/MC/AArch64/SVE/clasta-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/clasta-diagnostics.s +++ test/MC/AArch64/SVE/clasta-diagnostics.s @@ -77,3 +77,37 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: clasta z0.d, p7, z0.d, z31.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +clasta x0, p7, x0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clasta x0, p7, x0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +clasta x0, p7, x0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clasta x0, p7, x0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p7/z, z6.d +clasta d0, p7, d0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clasta d0, p7, d0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +clasta d0, p7, d0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clasta d0, p7, d0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p7/z, z7.d +clasta z0.d, p7, z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: clasta z0.d, p7, z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/clasta.s =================================================================== --- test/MC/AArch64/SVE/clasta.s +++ test/MC/AArch64/SVE/clasta.s @@ -78,3 +78,19 @@ // CHECK-ENCODING: [0xe0,0x9f,0xe8,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f e8 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +clasta z0.d, p7, z0.d, z31.d +// CHECK-INST: clasta z0.d, p7, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe8,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e8 05 Index: test/MC/AArch64/SVE/clastb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/clastb-diagnostics.s +++ test/MC/AArch64/SVE/clastb-diagnostics.s @@ -77,3 +77,37 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: clastb z0.d, p7, z0.d, z31.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +clastb x0, p7, x0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clastb x0, p7, x0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +clastb x0, p7, x0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clastb x0, p7, x0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p7/z, z6.d +clastb d0, p7, d0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clastb d0, p7, d0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +clastb d0, p7, d0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: clastb d0, p7, d0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p7/z, z7.d +clastb z0.d, p7, z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: clastb z0.d, p7, z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/clastb.s =================================================================== --- test/MC/AArch64/SVE/clastb.s +++ test/MC/AArch64/SVE/clastb.s @@ -78,3 +78,19 @@ // CHECK-ENCODING: [0xe0,0x9f,0xe9,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f e9 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +clastb z0.d, p7, z0.d, z31.d +// CHECK-INST: clastb z0.d, p7, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe9,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e9 05 Index: test/MC/AArch64/SVE/cls.s =================================================================== --- test/MC/AArch64/SVE/cls.s +++ test/MC/AArch64/SVE/cls.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd8,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d8 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +cls z4.d, p7/m, z31.d +// CHECK-INST: cls z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd8,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d8 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +cls z4.d, p7/m, z31.d +// CHECK-INST: cls z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd8,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d8 04 Index: test/MC/AArch64/SVE/clz.s =================================================================== --- test/MC/AArch64/SVE/clz.s +++ test/MC/AArch64/SVE/clz.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd9,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d9 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +clz z4.d, p7/m, z31.d +// CHECK-INST: clz z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd9,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d9 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +clz z4.d, p7/m, z31.d +// CHECK-INST: clz z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd9,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d9 04 Index: test/MC/AArch64/SVE/cmpeq-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmpeq-diagnostics.s +++ test/MC/AArch64/SVE/cmpeq-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15]. // CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, #16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmpeq p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpeq p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmpeq p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpeq p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmpge-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmpge-diagnostics.s +++ test/MC/AArch64/SVE/cmpge-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15]. // CHECK-NEXT: cmpge p0.s, p0/z, z0.s, #16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmpge p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpge p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpge p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpge p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmpge p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpge p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmpgt-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmpgt-diagnostics.s +++ test/MC/AArch64/SVE/cmpgt-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15]. // CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, #16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmpgt p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpgt p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpgt p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpgt p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmpgt p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpgt p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmphi-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmphi-diagnostics.s +++ test/MC/AArch64/SVE/cmphi-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127]. // CHECK-NEXT: cmphi p0.s, p0/z, z0.s, #128 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmphi p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphi p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmphi p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphi p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmphi p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmphi p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmphs-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmphs-diagnostics.s +++ test/MC/AArch64/SVE/cmphs-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127]. // CHECK-NEXT: cmphs p0.s, p0/z, z0.s, #128 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmphs p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphs p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmphs p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphs p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmphs p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmphs p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmple-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmple-diagnostics.s +++ test/MC/AArch64/SVE/cmple-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15]. // CHECK-NEXT: cmple p0.s, p0/z, z0.s, #16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmple p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmple p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmple p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmple p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmple p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmple p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmple p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmple p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmplo-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmplo-diagnostics.s +++ test/MC/AArch64/SVE/cmplo-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127]. // CHECK-NEXT: cmplo p0.s, p0/z, z0.s, #128 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmplo p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplo p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmplo p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplo p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmplo p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmplo p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmpls-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmpls-diagnostics.s +++ test/MC/AArch64/SVE/cmpls-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127]. // CHECK-NEXT: cmpls p0.s, p0/z, z0.s, #128 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmpls p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpls p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpls p0.d, p0/z, z0.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpls p0.d, p0/z, z0.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmpls p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpls p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmplt-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmplt-diagnostics.s +++ test/MC/AArch64/SVE/cmplt-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15]. // CHECK-NEXT: cmplt p0.s, p0/z, z0.s, #16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmplt p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplt p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmplt p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplt p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmplt p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmplt p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cmpne-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/cmpne-diagnostics.s +++ test/MC/AArch64/SVE/cmpne-diagnostics.s @@ -74,3 +74,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15]. // CHECK-NEXT: cmpne p0.s, p0/z, z0.s, #16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +cmpne p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpne p0.d, p0/z, z0.d, #15 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #15 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +cmpne p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +cmpne p0.s, p0/z, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cnot.s =================================================================== --- test/MC/AArch64/SVE/cnot.s +++ test/MC/AArch64/SVE/cnot.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xdb,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf db 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +cnot z4.d, p7/m, z31.d +// CHECK-INST: cnot z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xdb,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf db 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +cnot z4.d, p7/m, z31.d +// CHECK-INST: cnot z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xdb,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf db 04 Index: test/MC/AArch64/SVE/cnt.s =================================================================== --- test/MC/AArch64/SVE/cnt.s +++ test/MC/AArch64/SVE/cnt.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xda,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf da 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +cnt z4.d, p7/m, z31.d +// CHECK-INST: cnt z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xda,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf da 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +cnt z4.d, p7/m, z31.d +// CHECK-INST: cnt z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xda,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf da 04 Index: test/MC/AArch64/SVE/compact-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/compact-diagnostics.s +++ test/MC/AArch64/SVE/compact-diagnostics.s @@ -26,3 +26,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: compact z31.h, p7, z31.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +compact z31.d, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: compact z31.d, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +compact z31.d, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: compact z31.d, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/cpy.s =================================================================== --- test/MC/AArch64/SVE/cpy.s +++ test/MC/AArch64/SVE/cpy.s @@ -275,3 +275,79 @@ // CHECK-ENCODING: [0x15,0x70,0xdf,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 15 70 df 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +cpy z31.d, p7/m, sp +// CHECK-INST: mov z31.d, p7/m, sp +// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff bf e8 05 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +cpy z31.d, p7/m, sp +// CHECK-INST: mov z31.d, p7/m, sp +// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff bf e8 05 + +movprfx z21.d, p7/z, z28.d +// CHECK-INST: movprfx z21.d, p7/z, z28.d +// CHECK-ENCODING: [0x95,0x3f,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 95 3f d0 04 + +cpy z21.d, p7/m, #-128, lsl #8 +// CHECK-INST: mov z21.d, p7/m, #-32768 +// CHECK-ENCODING: [0x15,0x70,0xd7,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 15 70 d7 05 + +movprfx z21, z28 +// CHECK-INST: movprfx z21, z28 +// CHECK-ENCODING: [0x95,0xbf,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 95 bf 20 04 + +cpy z21.d, p15/m, #-128, lsl #8 +// CHECK-INST: mov z21.d, p15/m, #-32768 +// CHECK-ENCODING: [0x15,0x70,0xdf,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 15 70 df 05 + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +cpy z4.d, p7/m, d31 +// CHECK-INST: mov z4.d, p7/m, d31 +// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 9f e0 05 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +cpy z4.d, p7/m, d31 +// CHECK-INST: mov z4.d, p7/m, d31 +// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 9f e0 05 Index: test/MC/AArch64/SVE/decp-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/decp-diagnostics.s +++ test/MC/AArch64/SVE/decp-diagnostics.s @@ -36,3 +36,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register // CHECK-NEXT: decp x0, p0.q // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +decp z31.d, p7 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: decp z31.d, p7 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/decp.s =================================================================== --- test/MC/AArch64/SVE/decp.s +++ test/MC/AArch64/SVE/decp.s @@ -72,3 +72,19 @@ // CHECK-ENCODING: [0xff,0x81,0xed,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 81 ed 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +decp z31.d, p15 +// CHECK-INST: decp z31.d, p15 +// CHECK-ENCODING: [0xff,0x81,0xed,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 81 ed 25 Index: test/MC/AArch64/SVE/dup-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/dup-diagnostics.s +++ test/MC/AArch64/SVE/dup-diagnostics.s @@ -215,3 +215,43 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]. // CHECK-NEXT: dup z24.q, z21.q[4] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.b, p0/z, z6.b +dup z31.b, wsp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dup z31.b, wsp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +dup z31.b, wsp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dup z31.b, wsp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21.d, p0/z, z28.d +dup z21.d, #32512 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dup z21.d, #32512 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +dup z21.d, #32512 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dup z21.d, #32512 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p0/z, z6.d +dup z31.d, z31.d[7] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dup z31.d, z31.d[7] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +dup z31.d, z31.d[7] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dup z31.d, z31.d[7] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/dupm-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/dupm-diagnostics.s +++ test/MC/AArch64/SVE/dupm-diagnostics.s @@ -37,3 +37,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate // CHECK-NEXT: dupm z15.d, #0xfffffffffffffffa // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +dupm z0.d, #0xfffffffffffffff9 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dupm z0.d, #0xfffffffffffffff9 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +dupm z0.d, #0xfffffffffffffff9 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: dupm z0.d, #0xfffffffffffffff9 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/eon-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/eon-diagnostics.s +++ test/MC/AArch64/SVE/eon-diagnostics.s @@ -50,3 +50,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register // CHECK-NEXT: eon z7.d, z8.d, #254 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +eon z0.d, z0.d, #0x6 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: eon z0.d, z0.d, #0x6 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/eon.s =================================================================== --- test/MC/AArch64/SVE/eon.s +++ test/MC/AArch64/SVE/eon.s @@ -54,3 +54,19 @@ // CHECK-ENCODING: [0xa0,0xef,0x43,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: a0 ef 43 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +eon z0.d, z0.d, #0x6 +// CHECK-INST: eor z0.d, z0.d, #0xfffffffffffffff9 +// CHECK-ENCODING: [0xa0,0xef,0x43,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: a0 ef 43 05 Index: test/MC/AArch64/SVE/eor-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/eor-diagnostics.s +++ test/MC/AArch64/SVE/eor-diagnostics.s @@ -92,3 +92,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: eor p0.b, p0/m, p1.b, p2.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +eor z0.d, z0.d, #0x6 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: eor z0.d, z0.d, #0x6 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +eor z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: eor z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +eor z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: eor z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/eor.s =================================================================== --- test/MC/AArch64/SVE/eor.s +++ test/MC/AArch64/SVE/eor.s @@ -108,3 +108,43 @@ // CHECK-ENCODING: [0xef,0x7f,0x0f,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ef 7f 0f 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.b, p7/z, z6.b +// CHECK-INST: movprfx z4.b, p7/z, z6.b +// CHECK-ENCODING: [0xc4,0x3c,0x10,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c 10 04 + +eor z4.b, p7/m, z4.b, z31.b +// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b +// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f 19 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +eor z4.b, p7/m, z4.b, z31.b +// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b +// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f 19 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +eor z0.d, z0.d, #0x6 +// CHECK-INST: eor z0.d, z0.d, #0x6 +// CHECK-ENCODING: [0x20,0xf8,0x43,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 f8 43 05 Index: test/MC/AArch64/SVE/eorv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/eorv-diagnostics.s +++ test/MC/AArch64/SVE/eorv-diagnostics.s @@ -31,4 +31,19 @@ eorv h0, p8, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: eorv h0, p8, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +eorv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: eorv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +eorv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: eorv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ext-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ext-diagnostics.s +++ test/MC/AArch64/SVE/ext-diagnostics.s @@ -31,3 +31,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255]. // CHECK-NEXT: ext z0.b, z0.b, z1.b, #256 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.b, p0/z, z6.b +ext z31.b, z31.b, z0.b, #255 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: ext z31.b, z31.b, z0.b, #255 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ext.s =================================================================== --- test/MC/AArch64/SVE/ext.s +++ test/MC/AArch64/SVE/ext.s @@ -18,3 +18,19 @@ // CHECK-ENCODING: [0x1f,0x1c,0x3f,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 1f 1c 3f 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +ext z31.b, z31.b, z0.b, #255 +// CHECK-INST: ext z31.b, z31.b, z0.b, #255 +// CHECK-ENCODING: [0x1f,0x1c,0x3f,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 1f 1c 3f 05 Index: test/MC/AArch64/SVE/fabd.s =================================================================== --- test/MC/AArch64/SVE/fabd.s +++ test/MC/AArch64/SVE/fabd.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f c8 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fabd z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fabd z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c8 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fabd z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fabd z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c8 65 Index: test/MC/AArch64/SVE/fabs.s =================================================================== --- test/MC/AArch64/SVE/fabs.s +++ test/MC/AArch64/SVE/fabs.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xdc,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf dc 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +fabs z4.d, p7/m, z31.d +// CHECK-INST: fabs z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf dc 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +fabs z4.d, p7/m, z31.d +// CHECK-INST: fabs z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf dc 04 Index: test/MC/AArch64/SVE/facge-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/facge-diagnostics.s +++ test/MC/AArch64/SVE/facge-diagnostics.s @@ -9,3 +9,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal // CHECK-NEXT: facge p0.b, p0/z, z0.b, #0.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +facge p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: facge p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +facge p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: facge p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/facgt-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/facgt-diagnostics.s +++ test/MC/AArch64/SVE/facgt-diagnostics.s @@ -9,3 +9,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal // CHECK-NEXT: facgt p0.b, p0/z, z0.b, #0.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +facgt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: facgt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +facgt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: facgt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/facle-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/facle-diagnostics.s +++ test/MC/AArch64/SVE/facle-diagnostics.s @@ -9,3 +9,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal // CHECK-NEXT: facle p0.b, p0/z, z0.b, #0.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +facle p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: facle p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +facle p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: facle p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/faclt-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/faclt-diagnostics.s +++ test/MC/AArch64/SVE/faclt-diagnostics.s @@ -9,3 +9,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal // CHECK-NEXT: faclt p0.b, p0/z, z0.b, #0.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +faclt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: faclt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +faclt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: faclt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fadd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fadd-diagnostics.s +++ test/MC/AArch64/SVE/fadd-diagnostics.s @@ -68,3 +68,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: fadd z0.h, p8/m, z0.h, z31.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fadd z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fadd z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fadd z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fadd z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fadd.s =================================================================== --- test/MC/AArch64/SVE/fadd.s +++ test/MC/AArch64/SVE/fadd.s @@ -90,3 +90,55 @@ // CHECK-ENCODING: [0x20,0x00,0xdf,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 00 df 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +fadd z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fadd z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xd8,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c d8 65 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +fadd z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fadd z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xd8,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c d8 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fadd z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fadd z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c0 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fadd z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fadd z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c0 65 Index: test/MC/AArch64/SVE/fadda-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fadda-diagnostics.s +++ test/MC/AArch64/SVE/fadda-diagnostics.s @@ -18,4 +18,19 @@ fadda v0.8h, p7, v0.8h, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: fadda v0.8h, p7, v0.8h, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +fadda d0, p7, d0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fadda d0, p7, d0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +fadda d0, p7, d0, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fadda d0, p7, d0, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/faddv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/faddv-diagnostics.s +++ test/MC/AArch64/SVE/faddv-diagnostics.s @@ -17,4 +17,19 @@ faddv v0, p7, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: faddv v0, p7, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +faddv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: faddv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +faddv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: faddv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcadd.s =================================================================== --- test/MC/AArch64/SVE/fcadd.s +++ test/MC/AArch64/SVE/fcadd.s @@ -42,3 +42,31 @@ // CHECK-ENCODING: [0xff,0x9f,0xc1,0x64] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 9f c1 64 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +fcadd z4.d, p7/m, z4.d, z31.d, #270 +// CHECK-INST: fcadd z4.d, p7/m, z4.d, z31.d, #270 +// CHECK-ENCODING: [0xe4,0x9f,0xc1,0x64] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 9f c1 64 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +fcadd z4.d, p7/m, z4.d, z31.d, #270 +// CHECK-INST: fcadd z4.d, p7/m, z4.d, z31.d, #270 +// CHECK-ENCODING: [0xe4,0x9f,0xc1,0x64] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 9f c1 64 Index: test/MC/AArch64/SVE/fcmeq-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmeq-diagnostics.s +++ test/MC/AArch64/SVE/fcmeq-diagnostics.s @@ -9,3 +9,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 // CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #1.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fcmeq p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmeq p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +fcmeq p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmeq p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcmge-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmge-diagnostics.s +++ test/MC/AArch64/SVE/fcmge-diagnostics.s @@ -9,3 +9,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 // CHECK-NEXT: fcmge p0.s, p0/z, z0.s, #1.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fcmge p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmge p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +fcmge p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmge p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcmgt-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmgt-diagnostics.s +++ test/MC/AArch64/SVE/fcmgt-diagnostics.s @@ -9,3 +9,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 // CHECK-NEXT: fcmgt p0.s, p0/z, z0.s, #1.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fcmgt p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmgt p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +fcmgt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmgt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcmla-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmla-diagnostics.s +++ test/MC/AArch64/SVE/fcmla-diagnostics.s @@ -50,3 +50,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: fcmla z0.d, z1.d, z2.d[0], #0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.s, p0/z, z28.s +fcmla z21.s, z10.s, z5.s[1], #90 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: fcmla z21.s, z10.s, z5.s[1], #90 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcmla.s =================================================================== --- test/MC/AArch64/SVE/fcmla.s +++ test/MC/AArch64/SVE/fcmla.s @@ -102,3 +102,43 @@ // CHECK-ENCODING: [0x55,0x15,0xf5,0x64] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 55 15 f5 64 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +fcmla z4.d, p7/m, z31.d, z31.d, #270 +// CHECK-INST: fcmla z4.d, p7/m, z31.d, z31.d, #270 +// CHECK-ENCODING: [0xe4,0x7f,0xdf,0x64] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 7f df 64 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +fcmla z4.d, p7/m, z31.d, z31.d, #270 +// CHECK-INST: fcmla z4.d, p7/m, z31.d, z31.d, #270 +// CHECK-ENCODING: [0xe4,0x7f,0xdf,0x64] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 7f df 64 + +movprfx z21, z28 +// CHECK-INST: movprfx z21, z28 +// CHECK-ENCODING: [0x95,0xbf,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 95 bf 20 04 + +fcmla z21.s, z10.s, z5.s[1], #90 +// CHECK-INST: fcmla z21.s, z10.s, z5.s[1], #90 +// CHECK-ENCODING: [0x55,0x15,0xf5,0x64] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 f5 64 Index: test/MC/AArch64/SVE/fcmle-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmle-diagnostics.s +++ test/MC/AArch64/SVE/fcmle-diagnostics.s @@ -9,3 +9,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 // CHECK-NEXT: fcmle p0.s, p0/z, z0.s, #1.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fcmle p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmle p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +fcmle p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmle p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcmlt-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmlt-diagnostics.s +++ test/MC/AArch64/SVE/fcmlt-diagnostics.s @@ -9,3 +9,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 // CHECK-NEXT: fcmlt p0.s, p0/z, z0.s, #1.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fcmlt p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmlt p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +fcmlt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmlt p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcmne-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmne-diagnostics.s +++ test/MC/AArch64/SVE/fcmne-diagnostics.s @@ -9,3 +9,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 // CHECK-NEXT: fcmne p0.s, p0/z, z0.s, #1.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fcmne p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmne p0.d, p0/z, z0.d, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +fcmne p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmne p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcmuo-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fcmuo-diagnostics.s +++ test/MC/AArch64/SVE/fcmuo-diagnostics.s @@ -9,3 +9,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal // CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, #0.0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fcmuo p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fcmuo p0.d, p0/z, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fcpy.s =================================================================== --- test/MC/AArch64/SVE/fcpy.s +++ test/MC/AArch64/SVE/fcpy.s @@ -1554,3 +1554,31 @@ // CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 c7 d0 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p0/z, z7.d +// CHECK-INST: movprfx z0.d, p0/z, z7.d +// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 20 d0 04 + +fcpy z0.d, p0/m, #31.00000000 +// CHECK-INST: fmov z0.d, p0/m, #31.00000000 +// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c7 d0 05 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fcpy z0.d, p0/m, #31.00000000 +// CHECK-INST: fmov z0.d, p0/m, #31.00000000 +// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c7 d0 05 Index: test/MC/AArch64/SVE/fcvt.s =================================================================== --- test/MC/AArch64/SVE/fcvt.s +++ test/MC/AArch64/SVE/fcvt.s @@ -42,3 +42,31 @@ // CHECK-ENCODING: [0x00,0xa0,0xcb,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 a0 cb 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +fcvt z5.d, p0/m, z0.s +// CHECK-INST: fcvt z5.d, p0/m, z0.s +// CHECK-ENCODING: [0x05,0xa0,0xcb,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 cb 65 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +fcvt z5.d, p0/m, z0.s +// CHECK-INST: fcvt z5.d, p0/m, z0.s +// CHECK-ENCODING: [0x05,0xa0,0xcb,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 cb 65 Index: test/MC/AArch64/SVE/fcvtzs.s =================================================================== --- test/MC/AArch64/SVE/fcvtzs.s +++ test/MC/AArch64/SVE/fcvtzs.s @@ -48,3 +48,31 @@ // CHECK-ENCODING: [0x00,0xa0,0xde,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 a0 de 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +fcvtzs z5.d, p0/m, z0.d +// CHECK-INST: fcvtzs z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xde,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 de 65 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +fcvtzs z5.d, p0/m, z0.d +// CHECK-INST: fcvtzs z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xde,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 de 65 Index: test/MC/AArch64/SVE/fcvtzu.s =================================================================== --- test/MC/AArch64/SVE/fcvtzu.s +++ test/MC/AArch64/SVE/fcvtzu.s @@ -48,3 +48,31 @@ // CHECK-ENCODING: [0x00,0xa0,0xdf,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 a0 df 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +fcvtzu z5.d, p0/m, z0.d +// CHECK-INST: fcvtzu z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xdf,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 df 65 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +fcvtzu z5.d, p0/m, z0.d +// CHECK-INST: fcvtzu z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xdf,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 df 65 Index: test/MC/AArch64/SVE/fdiv.s =================================================================== --- test/MC/AArch64/SVE/fdiv.s +++ test/MC/AArch64/SVE/fdiv.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f cd 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fdiv z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f cd 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fdiv z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f cd 65 Index: test/MC/AArch64/SVE/fdivr.s =================================================================== --- test/MC/AArch64/SVE/fdivr.s +++ test/MC/AArch64/SVE/fdivr.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f cc 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fdivr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fdivr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f cc 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fdivr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fdivr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f cc 65 Index: test/MC/AArch64/SVE/fdup-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fdup-diagnostics.s +++ test/MC/AArch64/SVE/fdup-diagnostics.s @@ -62,3 +62,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or floating-point constant // CHECK-NEXT: fdup z0.d, #64.00000000 // r = 5, n = 32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fdup z0.d, #31.00000000 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fdup z0.d, #31.00000000 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fdup z0.d, #31.00000000 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fdup z0.d, #31.00000000 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fexpa-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fexpa-diagnostics.s +++ test/MC/AArch64/SVE/fexpa-diagnostics.s @@ -12,4 +12,19 @@ fexpa z0.s, z31.d // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: fexpa z0.s, z31.d -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fexpa z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fexpa z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fexpa z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fexpa z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmad.s =================================================================== --- test/MC/AArch64/SVE/fmad.s +++ test/MC/AArch64/SVE/fmad.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0x20,0x9c,0xff,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 9c ff 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmad z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmad z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x9c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 9c ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmad z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmad z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x9c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 9c ff 65 Index: test/MC/AArch64/SVE/fmax.s =================================================================== --- test/MC/AArch64/SVE/fmax.s +++ test/MC/AArch64/SVE/fmax.s @@ -66,3 +66,55 @@ // CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f c6 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p0/z, z7.d +// CHECK-INST: movprfx z0.d, p0/z, z7.d +// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 20 d0 04 + +fmax z0.d, p0/m, z0.d, #0.0 +// CHECK-INST: fmax z0.d, p0/m, z0.d, #0.0 +// CHECK-ENCODING: [0x00,0x80,0xde,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 80 de 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmax z0.d, p0/m, z0.d, #0.0 +// CHECK-INST: fmax z0.d, p0/m, z0.d, #0.0 +// CHECK-ENCODING: [0x00,0x80,0xde,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 80 de 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmax z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmax z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c6 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmax z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmax z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c6 65 Index: test/MC/AArch64/SVE/fmaxnm.s =================================================================== --- test/MC/AArch64/SVE/fmaxnm.s +++ test/MC/AArch64/SVE/fmaxnm.s @@ -72,3 +72,55 @@ // CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f c4 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +fmaxnm z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fmaxnm z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdc,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c dc 65 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +fmaxnm z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fmaxnm z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdc,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c dc 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmaxnm z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmaxnm z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c4 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmaxnm z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmaxnm z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c4 65 Index: test/MC/AArch64/SVE/fmaxnmv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fmaxnmv-diagnostics.s +++ test/MC/AArch64/SVE/fmaxnmv-diagnostics.s @@ -17,4 +17,19 @@ fmaxnmv v0, p7, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: fmaxnmv v0, p7, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +fmaxnmv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmaxnmv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +fmaxnmv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmaxnmv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmaxv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fmaxv-diagnostics.s +++ test/MC/AArch64/SVE/fmaxv-diagnostics.s @@ -17,4 +17,19 @@ fmaxv v0, p7, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: fmaxv v0, p7, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +fmaxv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmaxv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +fmaxv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmaxv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmin.s =================================================================== --- test/MC/AArch64/SVE/fmin.s +++ test/MC/AArch64/SVE/fmin.s @@ -72,3 +72,55 @@ // CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f c7 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +fmin z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fmin z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdf,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c df 65 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +fmin z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fmin z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdf,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c df 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmin z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmin z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c7 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmin z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmin z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c7 65 Index: test/MC/AArch64/SVE/fminnm.s =================================================================== --- test/MC/AArch64/SVE/fminnm.s +++ test/MC/AArch64/SVE/fminnm.s @@ -72,3 +72,55 @@ // CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f c5 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +fminnm z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fminnm z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdd,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c dd 65 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +fminnm z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fminnm z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdd,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c dd 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fminnm z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fminnm z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c5 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fminnm z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fminnm z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c5 65 Index: test/MC/AArch64/SVE/fminnmv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fminnmv-diagnostics.s +++ test/MC/AArch64/SVE/fminnmv-diagnostics.s @@ -17,4 +17,19 @@ fminnmv v0, p7, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: fminnmv v0, p7, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +fminnmv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fminnmv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +fminnmv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fminnmv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fminv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fminv-diagnostics.s +++ test/MC/AArch64/SVE/fminv-diagnostics.s @@ -17,4 +17,19 @@ fminv v0, p7, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: fminv v0, p7, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +fminv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fminv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +fminv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fminv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmla-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fmla-diagnostics.s +++ test/MC/AArch64/SVE/fmla-diagnostics.s @@ -70,3 +70,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. // CHECK-NEXT: fmla z0.d, z1.d, z2.d[2] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fmla z0.d, z1.d, z7.d[1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: fmla z0.d, z1.d, z7.d[1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmla.s =================================================================== --- test/MC/AArch64/SVE/fmla.s +++ test/MC/AArch64/SVE/fmla.s @@ -42,3 +42,43 @@ // CHECK-ENCODING: [0x20,0x00,0xf7,0x64] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 00 f7 64 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmla z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmla z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x1c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 1c ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmla z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmla z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x1c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 1c ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmla z0.d, z1.d, z7.d[1] +// CHECK-INST: fmla z0.d, z1.d, z7.d[1] +// CHECK-ENCODING: [0x20,0x00,0xf7,0x64] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 00 f7 64 Index: test/MC/AArch64/SVE/fmls-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fmls-diagnostics.s +++ test/MC/AArch64/SVE/fmls-diagnostics.s @@ -70,3 +70,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. // CHECK-NEXT: fmls z0.d, z1.d, z2.d[2] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fmls z0.d, z1.d, z7.d[1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: fmls z0.d, z1.d, z7.d[1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmls.s =================================================================== --- test/MC/AArch64/SVE/fmls.s +++ test/MC/AArch64/SVE/fmls.s @@ -42,3 +42,43 @@ // CHECK-ENCODING: [0x20,0x04,0xf7,0x64] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 04 f7 64 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmls z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmls z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x3c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 3c ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmls z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmls z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x3c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 3c ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmls z0.d, z1.d, z7.d[1] +// CHECK-INST: fmls z0.d, z1.d, z7.d[1] +// CHECK-ENCODING: [0x20,0x04,0xf7,0x64] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 04 f7 64 Index: test/MC/AArch64/SVE/fmov-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fmov-diagnostics.s +++ test/MC/AArch64/SVE/fmov-diagnostics.s @@ -140,3 +140,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or floating-point constant // CHECK-NEXT: fmov z0.d, p0/m, #64.00000000 // r = 5, n = 32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fmov z0.d, #31.00000000 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmov z0.d, #31.00000000 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fmov z0.d, #31.00000000 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmov z0.d, #31.00000000 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmov.s =================================================================== --- test/MC/AArch64/SVE/fmov.s +++ test/MC/AArch64/SVE/fmov.s @@ -1596,3 +1596,31 @@ // CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 c7 d0 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p0/z, z7.d +// CHECK-INST: movprfx z0.d, p0/z, z7.d +// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 20 d0 04 + +fmov z0.d, p0/m, #31.00000000 +// CHECK-INST: fmov z0.d, p0/m, #31.00000000 +// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c7 d0 05 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmov z0.d, p0/m, #31.00000000 +// CHECK-INST: fmov z0.d, p0/m, #31.00000000 +// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c7 d0 05 Index: test/MC/AArch64/SVE/fmsb.s =================================================================== --- test/MC/AArch64/SVE/fmsb.s +++ test/MC/AArch64/SVE/fmsb.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0x20,0xbc,0xff,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 bc ff 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmsb z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmsb z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0xbc,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 bc ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmsb z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fmsb z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0xbc,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 bc ff 65 Index: test/MC/AArch64/SVE/fmul-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fmul-diagnostics.s +++ test/MC/AArch64/SVE/fmul-diagnostics.s @@ -132,3 +132,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: fmul z0.h, p8/m, z0.h, z31.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fmul z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmul z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fmul z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmul z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p0/z, z6.d +fmul z31.d, z31.d, z15.d[1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmul z31.d, z31.d, z15.d[1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +fmul z31.d, z31.d, z15.d[1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fmul z31.d, z31.d, z15.d[1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fmul.s =================================================================== --- test/MC/AArch64/SVE/fmul.s +++ test/MC/AArch64/SVE/fmul.s @@ -120,3 +120,55 @@ // CHECK-ENCODING: [0x20,0x08,0xdf,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 08 df 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +fmul z31.d, p7/m, z31.d, #2.0 +// CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0 +// CHECK-ENCODING: [0x3f,0x9c,0xda,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c da 65 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +fmul z31.d, p7/m, z31.d, #2.0 +// CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0 +// CHECK-ENCODING: [0x3f,0x9c,0xda,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c da 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmul z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c2 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmul z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c2 65 Index: test/MC/AArch64/SVE/fmulx.s =================================================================== --- test/MC/AArch64/SVE/fmulx.s +++ test/MC/AArch64/SVE/fmulx.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xca,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f ca 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fmulx z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmulx z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f ca 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fmulx z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fmulx z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f ca 65 Index: test/MC/AArch64/SVE/fneg.s =================================================================== --- test/MC/AArch64/SVE/fneg.s +++ test/MC/AArch64/SVE/fneg.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xdd,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf dd 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +fneg z4.d, p7/m, z31.d +// CHECK-INST: fneg z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xdd,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf dd 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +fneg z4.d, p7/m, z31.d +// CHECK-INST: fneg z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xdd,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf dd 04 Index: test/MC/AArch64/SVE/fnmad.s =================================================================== --- test/MC/AArch64/SVE/fnmad.s +++ test/MC/AArch64/SVE/fnmad.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0x20,0xdc,0xff,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 dc ff 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fnmad z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmad z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0xdc,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 dc ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fnmad z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmad z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0xdc,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 dc ff 65 Index: test/MC/AArch64/SVE/fnmla.s =================================================================== --- test/MC/AArch64/SVE/fnmla.s +++ test/MC/AArch64/SVE/fnmla.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0x20,0x5c,0xff,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 5c ff 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fnmla z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmla z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x5c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 5c ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fnmla z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmla z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x5c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 5c ff 65 Index: test/MC/AArch64/SVE/fnmls.s =================================================================== --- test/MC/AArch64/SVE/fnmls.s +++ test/MC/AArch64/SVE/fnmls.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0x20,0x7c,0xff,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 7c ff 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fnmls z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmls z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x7c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 7c ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fnmls z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmls z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x7c,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 7c ff 65 Index: test/MC/AArch64/SVE/fnmsb.s =================================================================== --- test/MC/AArch64/SVE/fnmsb.s +++ test/MC/AArch64/SVE/fnmsb.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0x20,0xfc,0xff,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 fc ff 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fnmsb z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmsb z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0xfc,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 fc ff 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fnmsb z0.d, p7/m, z1.d, z31.d +// CHECK-INST: fnmsb z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0xfc,0xff,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 fc ff 65 Index: test/MC/AArch64/SVE/frecpe-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/frecpe-diagnostics.s +++ test/MC/AArch64/SVE/frecpe-diagnostics.s @@ -3,4 +3,19 @@ frecpe z0.b, z31.b // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: frecpe z0.b, z31.b -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +frecpe z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frecpe z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +frecpe z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frecpe z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/frecps-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/frecps-diagnostics.s +++ test/MC/AArch64/SVE/frecps-diagnostics.s @@ -13,3 +13,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: frecps z0.h, z1.s, z2.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +frecps z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frecps z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +frecps z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frecps z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/frecpx.s =================================================================== --- test/MC/AArch64/SVE/frecpx.s +++ test/MC/AArch64/SVE/frecpx.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xcc,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf cc 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frecpx z4.d, p7/m, z31.d +// CHECK-INST: frecpx z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xcc,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf cc 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frecpx z4.d, p7/m, z31.d +// CHECK-INST: frecpx z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xcc,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf cc 65 Index: test/MC/AArch64/SVE/frinta.s =================================================================== --- test/MC/AArch64/SVE/frinta.s +++ test/MC/AArch64/SVE/frinta.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xc4,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf c4 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frinta z4.d, p7/m, z31.d +// CHECK-INST: frinta z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc4,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c4 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frinta z4.d, p7/m, z31.d +// CHECK-INST: frinta z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc4,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c4 65 Index: test/MC/AArch64/SVE/frinti.s =================================================================== --- test/MC/AArch64/SVE/frinti.s +++ test/MC/AArch64/SVE/frinti.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xc7,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf c7 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frinti z4.d, p7/m, z31.d +// CHECK-INST: frinti z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc7,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c7 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frinti z4.d, p7/m, z31.d +// CHECK-INST: frinti z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc7,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c7 65 Index: test/MC/AArch64/SVE/frintm.s =================================================================== --- test/MC/AArch64/SVE/frintm.s +++ test/MC/AArch64/SVE/frintm.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xc2,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf c2 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frintm z4.d, p7/m, z31.d +// CHECK-INST: frintm z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc2,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c2 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frintm z4.d, p7/m, z31.d +// CHECK-INST: frintm z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc2,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c2 65 Index: test/MC/AArch64/SVE/frintn.s =================================================================== --- test/MC/AArch64/SVE/frintn.s +++ test/MC/AArch64/SVE/frintn.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xc0,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf c0 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frintn z4.d, p7/m, z31.d +// CHECK-INST: frintn z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c0 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frintn z4.d, p7/m, z31.d +// CHECK-INST: frintn z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c0 65 Index: test/MC/AArch64/SVE/frintp.s =================================================================== --- test/MC/AArch64/SVE/frintp.s +++ test/MC/AArch64/SVE/frintp.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xc1,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf c1 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frintp z4.d, p7/m, z31.d +// CHECK-INST: frintp z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c1 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frintp z4.d, p7/m, z31.d +// CHECK-INST: frintp z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c1 65 Index: test/MC/AArch64/SVE/frintx.s =================================================================== --- test/MC/AArch64/SVE/frintx.s +++ test/MC/AArch64/SVE/frintx.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xc6,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf c6 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frintx z4.d, p7/m, z31.d +// CHECK-INST: frintx z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc6,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c6 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frintx z4.d, p7/m, z31.d +// CHECK-INST: frintx z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc6,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c6 65 Index: test/MC/AArch64/SVE/frintz.s =================================================================== --- test/MC/AArch64/SVE/frintz.s +++ test/MC/AArch64/SVE/frintz.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xc3,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf c3 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +frintz z4.d, p7/m, z31.d +// CHECK-INST: frintz z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc3,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c3 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +frintz z4.d, p7/m, z31.d +// CHECK-INST: frintz z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xc3,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf c3 65 Index: test/MC/AArch64/SVE/frsqrte-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/frsqrte-diagnostics.s +++ test/MC/AArch64/SVE/frsqrte-diagnostics.s @@ -3,4 +3,19 @@ frsqrte z0.b, z31.b // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: frsqrte z0.b, z31.b -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +frsqrte z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frsqrte z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +frsqrte z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frsqrte z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/frsqrts-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/frsqrts-diagnostics.s +++ test/MC/AArch64/SVE/frsqrts-diagnostics.s @@ -13,3 +13,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: frsqrts z0.h, z1.s, z2.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +frsqrts z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frsqrts z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +frsqrts z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: frsqrts z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fscale.s =================================================================== --- test/MC/AArch64/SVE/fscale.s +++ test/MC/AArch64/SVE/fscale.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xc9,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f c9 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fscale z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fscale z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc9,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c9 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fscale z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fscale z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc9,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c9 65 Index: test/MC/AArch64/SVE/fsqrt.s =================================================================== --- test/MC/AArch64/SVE/fsqrt.s +++ test/MC/AArch64/SVE/fsqrt.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xcd,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf cd 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +fsqrt z4.d, p7/m, z31.d +// CHECK-INST: fsqrt z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xcd,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf cd 65 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +fsqrt z4.d, p7/m, z31.d +// CHECK-INST: fsqrt z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xcd,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf cd 65 Index: test/MC/AArch64/SVE/fsub-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/fsub-diagnostics.s +++ test/MC/AArch64/SVE/fsub-diagnostics.s @@ -68,3 +68,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: fsub z0.h, p8/m, z0.h, z31.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +fsub z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fsub z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +fsub z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: fsub z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/fsub.s =================================================================== --- test/MC/AArch64/SVE/fsub.s +++ test/MC/AArch64/SVE/fsub.s @@ -90,3 +90,55 @@ // CHECK-ENCODING: [0x20,0x04,0xdf,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 04 df 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +fsub z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fsub z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xd9,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c d9 65 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +fsub z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fsub z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xd9,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c d9 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fsub z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fsub z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c1 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fsub z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fsub z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c1 65 Index: test/MC/AArch64/SVE/fsubr.s =================================================================== --- test/MC/AArch64/SVE/fsubr.s +++ test/MC/AArch64/SVE/fsubr.s @@ -72,3 +72,55 @@ // CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f c3 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +fsubr z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fsubr z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdb,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c db 65 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +fsubr z31.d, p7/m, z31.d, #1.0 +// CHECK-INST: fsubr z31.d, p7/m, z31.d, #1.0 +// CHECK-ENCODING: [0x3f,0x9c,0xdb,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 3f 9c db 65 + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +fsubr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fsubr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c3 65 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +fsubr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: fsubr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xc3,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f c3 65 Index: test/MC/AArch64/SVE/ftmad-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ftmad-diagnostics.s +++ test/MC/AArch64/SVE/ftmad-diagnostics.s @@ -36,3 +36,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7]. // CHECK-NEXT: ftmad z0.h, z0.h, z1.h, #8 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ftmad z0.d, z0.d, z31.d, #7 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: ftmad z0.d, z0.d, z31.d, #7 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ftmad.s =================================================================== --- test/MC/AArch64/SVE/ftmad.s +++ test/MC/AArch64/SVE/ftmad.s @@ -24,3 +24,19 @@ // CHECK-ENCODING: [0xe0,0x83,0xd7,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 83 d7 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +ftmad z0.d, z0.d, z31.d, #7 +// CHECK-INST: ftmad z0.d, z0.d, z31.d, #7 +// CHECK-ENCODING: [0xe0,0x83,0xd7,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 83 d7 65 Index: test/MC/AArch64/SVE/ftsmul-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ftsmul-diagnostics.s +++ test/MC/AArch64/SVE/ftsmul-diagnostics.s @@ -13,3 +13,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: ftsmul z0.h, z1.s, z2.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ftsmul z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ftsmul z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ftsmul z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ftsmul z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ftssel-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ftssel-diagnostics.s +++ test/MC/AArch64/SVE/ftssel-diagnostics.s @@ -3,4 +3,19 @@ ftssel z0.b, z1.b, z31.b // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: ftssel z0.b, z1.b, z31.b -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ftssel z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ftssel z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ftssel z0.d, z1.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ftssel z0.d, z1.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/incd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/incd-diagnostics.s +++ test/MC/AArch64/SVE/incd-diagnostics.s @@ -61,3 +61,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: incd x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +incd z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: incd z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +incd z0.d, all, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: incd z0.d, all, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +incd z0.d, all +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: incd z0.d, all +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/incd.s =================================================================== --- test/MC/AArch64/SVE/incd.s +++ test/MC/AArch64/SVE/incd.s @@ -164,3 +164,43 @@ // CHECK-ENCODING: [0x80,0xe3,0xf0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 e3 f0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +incd z0.d +// CHECK-INST: incd z0.d +// CHECK-ENCODING: [0xe0,0xc3,0xf0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 f0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +incd z0.d, all, mul #16 +// CHECK-INST: incd z0.d, all, mul #16 +// CHECK-ENCODING: [0xe0,0xc3,0xff,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 ff 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +incd z0.d, all +// CHECK-INST: incd z0.d +// CHECK-ENCODING: [0xe0,0xc3,0xf0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 f0 04 Index: test/MC/AArch64/SVE/inch-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/inch-diagnostics.s +++ test/MC/AArch64/SVE/inch-diagnostics.s @@ -61,3 +61,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: inch x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.h, p0/z, z7.h +inch z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: inch z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +inch z0.h, all, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: inch z0.h, all, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +inch z0.h, all +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: inch z0.h, all +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/inch.s =================================================================== --- test/MC/AArch64/SVE/inch.s +++ test/MC/AArch64/SVE/inch.s @@ -164,3 +164,43 @@ // CHECK-ENCODING: [0x80,0xe3,0x70,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 e3 70 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +inch z0.h +// CHECK-INST: inch z0.h +// CHECK-ENCODING: [0xe0,0xc3,0x70,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 70 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +inch z0.h, all, mul #16 +// CHECK-INST: inch z0.h, all, mul #16 +// CHECK-ENCODING: [0xe0,0xc3,0x7f,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 7f 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +inch z0.h, all +// CHECK-INST: inch z0.h +// CHECK-ENCODING: [0xe0,0xc3,0x70,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 70 04 Index: test/MC/AArch64/SVE/incp-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/incp-diagnostics.s +++ test/MC/AArch64/SVE/incp-diagnostics.s @@ -36,3 +36,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register // CHECK-NEXT: incp x0, p0.q // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +incp z31.d, p7 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: incp z31.d, p7 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/incp.s =================================================================== --- test/MC/AArch64/SVE/incp.s +++ test/MC/AArch64/SVE/incp.s @@ -72,3 +72,19 @@ // CHECK-ENCODING: [0xff,0x81,0xec,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 81 ec 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +incp z31.d, p15 +// CHECK-INST: incp z31.d, p15 +// CHECK-ENCODING: [0xff,0x81,0xec,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 81 ec 25 Index: test/MC/AArch64/SVE/incw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/incw-diagnostics.s +++ test/MC/AArch64/SVE/incw-diagnostics.s @@ -61,3 +61,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: incw x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.s, p0/z, z7.s +incw z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: incw z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +incw z0.s, all, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: incw z0.s, all, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +incw z0.s, all +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: incw z0.s, all +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/incw.s =================================================================== --- test/MC/AArch64/SVE/incw.s +++ test/MC/AArch64/SVE/incw.s @@ -165,3 +165,43 @@ // CHECK-ENCODING: [0x80,0xe3,0xb0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 e3 b0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +incw z0.s +// CHECK-INST: incw z0.s +// CHECK-ENCODING: [0xe0,0xc3,0xb0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 b0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +incw z0.s, all, mul #16 +// CHECK-INST: incw z0.s, all, mul #16 +// CHECK-ENCODING: [0xe0,0xc3,0xbf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 bf 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +incw z0.s, all +// CHECK-INST: incw z0.s +// CHECK-ENCODING: [0xe0,0xc3,0xb0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 b0 04 Index: test/MC/AArch64/SVE/index-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/index-diagnostics.s +++ test/MC/AArch64/SVE/index-diagnostics.s @@ -56,3 +56,43 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15]. // CHECK-NEXT: index z17.d, w9, w7 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p0/z, z28.d +index z21.d, x10, x21 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: index z21.d, x10, x21 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +index z21.d, x10, x21 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: index z21.d, x10, x21 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23.d, p0/z, z30.d +index z23.d, x13, #8 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: index z23.d, x13, #8 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +index z23.d, x13, #8 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: index z23.d, x13, #8 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23.d, p0/z, z30.d +index z23.d, #13, x8 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: index z23.d, #13, x8 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +index z23.d, #13, x8 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: index z23.d, #13, x8 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/insr-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/insr-diagnostics.s +++ test/MC/AArch64/SVE/insr-diagnostics.s @@ -43,3 +43,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: insr z31.d, b0 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +insr z31.d, xzr +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: insr z31.d, xzr +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z4.d, p0/z, z6.d +insr z4.d, d31 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: insr z4.d, d31 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/insr.s =================================================================== --- test/MC/AArch64/SVE/insr.s +++ test/MC/AArch64/SVE/insr.s @@ -78,3 +78,31 @@ // CHECK-ENCODING: [0xff,0x3b,0xf4,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 3b f4 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +insr z31.d, xzr +// CHECK-INST: insr z31.d, xzr +// CHECK-ENCODING: [0xff,0x3b,0xe4,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 3b e4 05 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +insr z4.d, d31 +// CHECK-INST: insr z4.d, d31 +// CHECK-ENCODING: [0xe4,0x3b,0xf4,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 3b f4 05 Index: test/MC/AArch64/SVE/lasta-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/lasta-diagnostics.s +++ test/MC/AArch64/SVE/lasta-diagnostics.s @@ -52,3 +52,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: lasta d0, p7, z31.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +lasta x0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lasta x0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +lasta x0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lasta x0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p7/z, z6.d +lasta d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lasta d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +lasta d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lasta d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/lastb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/lastb-diagnostics.s +++ test/MC/AArch64/SVE/lastb-diagnostics.s @@ -52,3 +52,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: lastb d0, p7, z31.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +lastb x0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lastb x0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +lastb x0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lastb x0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p7/z, z6.d +lastb d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lastb d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +lastb d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lastb d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1b-diagnostics.s +++ test/MC/AArch64/SVE/ld1b-diagnostics.s @@ -177,3 +177,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. // CHECK-NEXT: ld1b z0.d, p0/z, [z0.d, #32] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ld1b { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1b { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ld1b { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1b { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1d-diagnostics.s +++ test/MC/AArch64/SVE/ld1d-diagnostics.s @@ -132,3 +132,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. // CHECK-NEXT: ld1d z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ld1d { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ld1d { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1h-diagnostics.s +++ test/MC/AArch64/SVE/ld1h-diagnostics.s @@ -192,3 +192,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. // CHECK-NEXT: ld1h z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ld1h { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ld1h { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rb-diagnostics.s +++ test/MC/AArch64/SVE/ld1rb-diagnostics.s @@ -21,3 +21,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: ld1rb z0.b, p8/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +ld1rb { z31.d }, p7/z, [sp, #63] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rb { z31.d }, p7/z, [sp, #63] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +ld1rb { z31.d }, p7/z, [sp, #63] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rb { z31.d }, p7/z, [sp, #63] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rd-diagnostics.s +++ test/MC/AArch64/SVE/ld1rd-diagnostics.s @@ -55,3 +55,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: ld1rd z0.d, p8/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +ld1rd { z31.d }, p7/z, [sp, #504] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rd { z31.d }, p7/z, [sp, #504] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +ld1rd { z31.d }, p7/z, [sp, #504] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rd { z31.d }, p7/z, [sp, #504] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rh-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rh-diagnostics.s +++ test/MC/AArch64/SVE/ld1rh-diagnostics.s @@ -45,3 +45,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: ld1rh z0.h, p8/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +ld1rh { z31.d }, p7/z, [sp, #126] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rh { z31.d }, p7/z, [sp, #126] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +ld1rh { z31.d }, p7/z, [sp, #126] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rh { z31.d }, p7/z, [sp, #126] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rqb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rqb-diagnostics.s +++ test/MC/AArch64/SVE/ld1rqb-diagnostics.s @@ -79,3 +79,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift // CHECK-NEXT: ld1rqb z0.b, p0/z, [x0, w1, uxtw] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.b, p5/z, z28.b +ld1rqb { z21.b }, p5/z, [x10, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqb { z21.b }, p5/z, [x10, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld1rqb { z21.b }, p5/z, [x10, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqb { z21.b }, p5/z, [x10, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rqd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rqd-diagnostics.s +++ test/MC/AArch64/SVE/ld1rqd-diagnostics.s @@ -79,3 +79,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3' // CHECK-NEXT: ld1rqd z0.d, p0/z, [x0, w1, uxtw #1] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z23.d, p3/z, z30.d +ld1rqd { z23.d }, p3/z, [x13, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqd { z23.d }, p3/z, [x13, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +ld1rqd { z23.d }, p3/z, [x13, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqd { z23.d }, p3/z, [x13, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rqh-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rqh-diagnostics.s +++ test/MC/AArch64/SVE/ld1rqh-diagnostics.s @@ -79,3 +79,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1' // CHECK-NEXT: ld1rqh z0.h, p0/z, [x0, w1, uxtw #1] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z23.h, p3/z, z30.h +ld1rqh { z23.h }, p3/z, [x13, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqh { z23.h }, p3/z, [x13, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +ld1rqh { z23.h }, p3/z, [x13, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqh { z23.h }, p3/z, [x13, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rqw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rqw-diagnostics.s +++ test/MC/AArch64/SVE/ld1rqw-diagnostics.s @@ -79,3 +79,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2' // CHECK-NEXT: ld1rqw z0.s, p0/z, [x0, w1, uxtw #1] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z23.s, p3/z, z30.s +ld1rqw { z23.s }, p3/z, [x13, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqw { z23.s }, p3/z, [x13, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +ld1rqw { z23.s }, p3/z, [x13, #112] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rqw { z23.s }, p3/z, [x13, #112] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rsb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rsb-diagnostics.s +++ test/MC/AArch64/SVE/ld1rsb-diagnostics.s @@ -30,3 +30,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: ld1rsb z0.h, p8/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +ld1rsb { z31.d }, p7/z, [sp, #63] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rsb { z31.d }, p7/z, [sp, #63] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +ld1rsb { z31.d }, p7/z, [sp, #63] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rsb { z31.d }, p7/z, [sp, #63] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rsh-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rsh-diagnostics.s +++ test/MC/AArch64/SVE/ld1rsh-diagnostics.s @@ -40,3 +40,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: ld1rsh z0.s, p8/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +ld1rsh { z31.d }, p7/z, [sp, #126] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rsh { z31.d }, p7/z, [sp, #126] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +ld1rsh { z31.d }, p7/z, [sp, #126] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rsh { z31.d }, p7/z, [sp, #126] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rsw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rsw-diagnostics.s +++ test/MC/AArch64/SVE/ld1rsw-diagnostics.s @@ -45,3 +45,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: ld1rsw z0.d, p8/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +ld1rsw { z31.d }, p7/z, [sp, #252] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rsw { z31.d }, p7/z, [sp, #252] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +ld1rsw { z31.d }, p7/z, [sp, #252] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rsw { z31.d }, p7/z, [sp, #252] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1rw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1rw-diagnostics.s +++ test/MC/AArch64/SVE/ld1rw-diagnostics.s @@ -50,3 +50,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: ld1rw z0.s, p8/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +ld1rw { z31.d }, p7/z, [sp, #252] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rw { z31.d }, p7/z, [sp, #252] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +ld1rw { z31.d }, p7/z, [sp, #252] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1rw { z31.d }, p7/z, [sp, #252] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1sb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1sb-diagnostics.s +++ test/MC/AArch64/SVE/ld1sb-diagnostics.s @@ -175,3 +175,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. // CHECK-NEXT: ld1sb z0.d, p0/z, [z0.d, #32] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ld1sb { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1sb { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ld1sb { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1sb { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1sh-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1sh-diagnostics.s +++ test/MC/AArch64/SVE/ld1sh-diagnostics.s @@ -191,3 +191,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. // CHECK-NEXT: ld1sh z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ld1sh { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1sh { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ld1sh { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1sh { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1sw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1sw-diagnostics.s +++ test/MC/AArch64/SVE/ld1sw-diagnostics.s @@ -161,3 +161,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. // CHECK-NEXT: ld1sw z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ld1sw { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1sw { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ld1sw { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1sw { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld1w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld1w-diagnostics.s +++ test/MC/AArch64/SVE/ld1w-diagnostics.s @@ -177,3 +177,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. // CHECK-NEXT: ld1w z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ld1w { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ld1w { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld2b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld2b-diagnostics.s +++ test/MC/AArch64/SVE/ld2b-diagnostics.s @@ -89,3 +89,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld2b { v0.2d, v1.2d }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.b, p5/z, z28.b +ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld2d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld2d-diagnostics.s +++ test/MC/AArch64/SVE/ld2d-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld2d { v0.2d, v1.2d }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld2h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld2h-diagnostics.s +++ test/MC/AArch64/SVE/ld2h-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld2h { v0.2d, v1.2d }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.h, p5/z, z28.h +ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld2w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld2w-diagnostics.s +++ test/MC/AArch64/SVE/ld2w-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld2w { v0.2d, v1.2d }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.s, p5/z, z28.s +ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld3b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld3b-diagnostics.s +++ test/MC/AArch64/SVE/ld3b-diagnostics.s @@ -89,3 +89,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld3b { v0.16b, v1.16b, v2.16b }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.b, p5/z, z28.b +ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld3d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld3d-diagnostics.s +++ test/MC/AArch64/SVE/ld3d-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld3d { v0.2d, v1.2d, v2.2d }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld3h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld3h-diagnostics.s +++ test/MC/AArch64/SVE/ld3h-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld3h { v0.8h, v1.8h, v2.8h }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.h, p5/z, z28.h +ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld3w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld3w-diagnostics.s +++ test/MC/AArch64/SVE/ld3w-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld3w { v0.4s, v1.4s, v2.4s }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.s, p5/z, z28.s +ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld4b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld4b-diagnostics.s +++ test/MC/AArch64/SVE/ld4b-diagnostics.s @@ -89,3 +89,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld4b { v0.16b, v1.16b, v2.16b }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.b, p5/z, z28.b +ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld4d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld4d-diagnostics.s +++ test/MC/AArch64/SVE/ld4d-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld4d { v0.2d, v1.2d, v2.2d }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld4h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld4h-diagnostics.s +++ test/MC/AArch64/SVE/ld4h-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld4h { v0.8h, v1.8h, v2.8h }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.h, p5/z, z28.h +ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ld4w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ld4w-diagnostics.s +++ test/MC/AArch64/SVE/ld4w-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ld4w { v0.4s, v1.4s, v2.4s }, p0/z, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.s, p5/z, z28.s +ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldff1b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldff1b-diagnostics.s +++ test/MC/AArch64/SVE/ldff1b-diagnostics.s @@ -112,3 +112,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. // CHECK-NEXT: ldff1b z0.d, p0/z, [z0.d, #32] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldff1b { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1b { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldff1b { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1b { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldff1d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldff1d-diagnostics.s +++ test/MC/AArch64/SVE/ldff1d-diagnostics.s @@ -111,3 +111,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. // CHECK-NEXT: ldff1d z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldff1d { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1d { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldff1d { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1d { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldff1h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldff1h-diagnostics.s +++ test/MC/AArch64/SVE/ldff1h-diagnostics.s @@ -141,3 +141,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. // CHECK-NEXT: ldff1h z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldff1h { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1h { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldff1h { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1h { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldff1sb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldff1sb-diagnostics.s +++ test/MC/AArch64/SVE/ldff1sb-diagnostics.s @@ -115,3 +115,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. // CHECK-NEXT: ldff1sb z0.d, p0/z, [z0.d, #32] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldff1sb { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1sb { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldff1sb { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1sb { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldff1sh-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldff1sh-diagnostics.s +++ test/MC/AArch64/SVE/ldff1sh-diagnostics.s @@ -135,3 +135,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. // CHECK-NEXT: ldff1sh z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldff1sh { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1sh { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldff1sh { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1sh { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldff1sw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldff1sw-diagnostics.s +++ test/MC/AArch64/SVE/ldff1sw-diagnostics.s @@ -116,3 +116,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. // CHECK-NEXT: ldff1sw z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldff1sw { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1sw { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldff1sw { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1sw { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldff1w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldff1w-diagnostics.s +++ test/MC/AArch64/SVE/ldff1w-diagnostics.s @@ -141,3 +141,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. // CHECK-NEXT: ldff1w z0.d, p0/z, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldff1w { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1w { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldff1w { z0.d }, p0/z, [z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldff1w { z0.d }, p0/z, [z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnf1b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnf1b-diagnostics.s +++ test/MC/AArch64/SVE/ldnf1b-diagnostics.s @@ -85,3 +85,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnf1b { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ldnf1b { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1b { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ldnf1b { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1b { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnf1d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnf1d-diagnostics.s +++ test/MC/AArch64/SVE/ldnf1d-diagnostics.s @@ -40,3 +40,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnf1d { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ldnf1d { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1d { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ldnf1d { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1d { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnf1h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnf1h-diagnostics.s +++ test/MC/AArch64/SVE/ldnf1h-diagnostics.s @@ -70,3 +70,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnf1h { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ldnf1h { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1h { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ldnf1h { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1h { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnf1sb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnf1sb-diagnostics.s +++ test/MC/AArch64/SVE/ldnf1sb-diagnostics.s @@ -84,3 +84,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnf1sb { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnf1sh-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnf1sh-diagnostics.s +++ test/MC/AArch64/SVE/ldnf1sh-diagnostics.s @@ -69,3 +69,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnf1sh { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnf1sw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnf1sw-diagnostics.s +++ test/MC/AArch64/SVE/ldnf1sw-diagnostics.s @@ -54,3 +54,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnf1sw { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnf1w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnf1w-diagnostics.s +++ test/MC/AArch64/SVE/ldnf1w-diagnostics.s @@ -55,3 +55,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnf1w { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +ldnf1w { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1w { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +ldnf1w { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnf1w { z21.d }, p5/z, [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnt1b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnt1b-diagnostics.s +++ test/MC/AArch64/SVE/ldnt1b-diagnostics.s @@ -59,3 +59,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnt1b { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.b, p0/z, z7.b +ldnt1b { z0.b }, p0/z, [x0, x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1b { z0.b }, p0/z, [x0, x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldnt1b { z0.b }, p0/z, [x0, x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1b { z0.b }, p0/z, [x0, x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnt1d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnt1d-diagnostics.s +++ test/MC/AArch64/SVE/ldnt1d-diagnostics.s @@ -59,3 +59,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnt1d { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnt1h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnt1h-diagnostics.s +++ test/MC/AArch64/SVE/ldnt1h-diagnostics.s @@ -59,3 +59,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnt1h { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.h, p0/z, z7.h +ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ldnt1w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/ldnt1w-diagnostics.s +++ test/MC/AArch64/SVE/ldnt1w-diagnostics.s @@ -59,3 +59,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: ldnt1w { v0.2d }, p0/z, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.s, p0/z, z7.s +ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/lsl-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/lsl-diagnostics.s +++ test/MC/AArch64/SVE/lsl-diagnostics.s @@ -120,3 +120,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: lsl z0.b, p8/m, z0.b, z1.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +lsl z31.d, z31.d, #63 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsl z31.d, z31.d, #63 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +lsl z31.d, z31.d, #63 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsl z31.d, z31.d, #63 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +lsl z0.s, z1.s, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsl z0.s, z1.s, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +lsl z0.s, z1.s, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsl z0.s, z1.s, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/lsl.s =================================================================== --- test/MC/AArch64/SVE/lsl.s +++ test/MC/AArch64/SVE/lsl.s @@ -162,3 +162,55 @@ // CHECK-ENCODING: [0x20,0x8c,0xa2,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 8c a2 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p0/z, z6.d +// CHECK-INST: movprfx z31.d, p0/z, z6.d +// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 20 d0 04 + +lsl z31.d, p0/m, z31.d, #63 +// CHECK-INST: lsl z31.d, p0/m, z31.d, #63 +// CHECK-ENCODING: [0xff,0x83,0xc3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 83 c3 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +lsl z31.d, p0/m, z31.d, #63 +// CHECK-INST: lsl z31.d, p0/m, z31.d, #63 +// CHECK-ENCODING: [0xff,0x83,0xc3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 83 c3 04 + +movprfx z0.s, p0/z, z7.s +// CHECK-INST: movprfx z0.s, p0/z, z7.s +// CHECK-ENCODING: [0xe0,0x20,0x90,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 20 90 04 + +lsl z0.s, p0/m, z0.s, z1.d +// CHECK-INST: lsl z0.s, p0/m, z0.s, z1.d +// CHECK-ENCODING: [0x20,0x80,0x9b,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 80 9b 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +lsl z0.s, p0/m, z0.s, z1.d +// CHECK-INST: lsl z0.s, p0/m, z0.s, z1.d +// CHECK-ENCODING: [0x20,0x80,0x9b,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 80 9b 04 Index: test/MC/AArch64/SVE/lslr.s =================================================================== --- test/MC/AArch64/SVE/lslr.s +++ test/MC/AArch64/SVE/lslr.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0x00,0x80,0xd7,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 80 d7 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +lslr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: lslr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x80,0xd7,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 80 d7 04 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +lslr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: lslr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x80,0xd7,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 80 d7 04 Index: test/MC/AArch64/SVE/lsr-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/lsr-diagnostics.s +++ test/MC/AArch64/SVE/lsr-diagnostics.s @@ -121,3 +121,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: lsr z0.b, p8/m, z0.b, z1.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +lsr z31.d, z31.d, #64 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsr z31.d, z31.d, #64 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +lsr z31.d, z31.d, #64 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsr z31.d, z31.d, #64 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +lsr z0.s, z1.s, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsr z0.s, z1.s, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +lsr z0.s, z1.s, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: lsr z0.s, z1.s, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/lsr.s =================================================================== --- test/MC/AArch64/SVE/lsr.s +++ test/MC/AArch64/SVE/lsr.s @@ -162,3 +162,55 @@ // CHECK-ENCODING: [0x20,0x84,0xa2,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 84 a2 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p0/z, z6.d +// CHECK-INST: movprfx z31.d, p0/z, z6.d +// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 20 d0 04 + +lsr z31.d, p0/m, z31.d, #64 +// CHECK-INST: lsr z31.d, p0/m, z31.d, #64 +// CHECK-ENCODING: [0x1f,0x80,0x81,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 1f 80 81 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +lsr z31.d, p0/m, z31.d, #64 +// CHECK-INST: lsr z31.d, p0/m, z31.d, #64 +// CHECK-ENCODING: [0x1f,0x80,0x81,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 1f 80 81 04 + +movprfx z0.s, p0/z, z7.s +// CHECK-INST: movprfx z0.s, p0/z, z7.s +// CHECK-ENCODING: [0xe0,0x20,0x90,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 20 90 04 + +lsr z0.s, p0/m, z0.s, z1.d +// CHECK-INST: lsr z0.s, p0/m, z0.s, z1.d +// CHECK-ENCODING: [0x20,0x80,0x99,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 80 99 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +lsr z0.s, p0/m, z0.s, z1.d +// CHECK-INST: lsr z0.s, p0/m, z0.s, z1.d +// CHECK-ENCODING: [0x20,0x80,0x99,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 80 99 04 Index: test/MC/AArch64/SVE/lsrr.s =================================================================== --- test/MC/AArch64/SVE/lsrr.s +++ test/MC/AArch64/SVE/lsrr.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0x00,0x80,0xd5,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 80 d5 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +lsrr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x80,0xd5,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 80 d5 04 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +lsrr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: lsrr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x80,0xd5,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 80 d5 04 Index: test/MC/AArch64/SVE/mad.s =================================================================== --- test/MC/AArch64/SVE/mad.s +++ test/MC/AArch64/SVE/mad.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xe0,0xdf,0xc1,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 df c1 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +mad z0.d, p7/m, z1.d, z31.d +// CHECK-INST: mad z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0xe0,0xdf,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 df c1 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +mad z0.d, p7/m, z1.d, z31.d +// CHECK-INST: mad z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0xe0,0xdf,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 df c1 04 Index: test/MC/AArch64/SVE/mla.s =================================================================== --- test/MC/AArch64/SVE/mla.s +++ test/MC/AArch64/SVE/mla.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0x20,0x5c,0xdf,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 5c df 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +mla z0.d, p7/m, z1.d, z31.d +// CHECK-INST: mla z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x5c,0xdf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 5c df 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +mla z0.d, p7/m, z1.d, z31.d +// CHECK-INST: mla z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x5c,0xdf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 5c df 04 Index: test/MC/AArch64/SVE/mls.s =================================================================== --- test/MC/AArch64/SVE/mls.s +++ test/MC/AArch64/SVE/mls.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0x20,0x7c,0xdf,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 7c df 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +mls z0.d, p7/m, z1.d, z31.d +// CHECK-INST: mls z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x7c,0xdf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 7c df 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +mls z0.d, p7/m, z1.d, z31.d +// CHECK-INST: mls z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0x20,0x7c,0xdf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 7c df 04 Index: test/MC/AArch64/SVE/mov-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/mov-diagnostics.s +++ test/MC/AArch64/SVE/mov-diagnostics.s @@ -412,3 +412,79 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]. // CHECK-NEXT: mov z24.q, z21.q[4] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.b, p0/z, z6.b +mov z31.b, wsp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z31.b, wsp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +mov z31.b, wsp +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z31.b, wsp +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +mov z0.d, #0xe0000000000003ff +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z0.d, #0xe0000000000003ff +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +mov z0.d, #0xe0000000000003ff +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z0.d, #0xe0000000000003ff +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z4.d, p7/z, z6.d +mov z4.d, p7/m, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z4.d, p7/m, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +mov z31.d, p15/m, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z31.d, p15/m, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +mov z0.d, d0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z0.d, d0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +mov z0.d, d0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z0.d, d0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p0/z, z6.d +mov z31.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z31.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +mov z31.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z31.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.d, p0/z, z6.d +mov z31.d, z31.d[7] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z31.d, z31.d[7] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +mov z31.d, z31.d[7] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: mov z31.d, z31.d[7] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/mov.s =================================================================== --- test/MC/AArch64/SVE/mov.s +++ test/MC/AArch64/SVE/mov.s @@ -660,3 +660,79 @@ // CHECK-ENCODING: [0xef,0x7d,0x0f,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ef 7d 0f 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31.d, p7/z, z6.d +// CHECK-INST: movprfx z31.d, p7/z, z6.d +// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df 3c d0 04 + +mov z31.d, p7/m, sp +// CHECK-INST: mov z31.d, p7/m, sp +// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff bf e8 05 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +mov z31.d, p7/m, sp +// CHECK-INST: mov z31.d, p7/m, sp +// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff bf e8 05 + +movprfx z21.d, p7/z, z28.d +// CHECK-INST: movprfx z21.d, p7/z, z28.d +// CHECK-ENCODING: [0x95,0x3f,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 95 3f d0 04 + +mov z21.d, p7/m, #-128, lsl #8 +// CHECK-INST: mov z21.d, p7/m, #-32768 +// CHECK-ENCODING: [0x15,0x70,0xd7,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 15 70 d7 05 + +movprfx z21, z28 +// CHECK-INST: movprfx z21, z28 +// CHECK-ENCODING: [0x95,0xbf,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 95 bf 20 04 + +mov z21.d, p15/m, #-128, lsl #8 +// CHECK-INST: mov z21.d, p15/m, #-32768 +// CHECK-ENCODING: [0x15,0x70,0xdf,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 15 70 df 05 + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +mov z4.d, p7/m, d31 +// CHECK-INST: mov z4.d, p7/m, d31 +// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 9f e0 05 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +mov z4.d, p7/m, d31 +// CHECK-INST: mov z4.d, p7/m, d31 +// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 9f e0 05 Index: test/MC/AArch64/SVE/movprfx-diagnostics.s =================================================================== --- /dev/null +++ test/MC/AArch64/SVE/movprfx-diagnostics.s @@ -0,0 +1,193 @@ +// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s + +// ------------------------------------------------------------------------- // +// Different destination register (unary) + +movprfx z0, z1 +abs z2.d, p0/m, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination +// CHECK-NEXT: abs z2.d, p0/m, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different destination register (binary) + +movprfx z0, z1 +add z2.d, p0/m, z2.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination +// CHECK-NEXT: add z2.d, p0/m, z2.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different destination register (wide element) + +movprfx z0, z1 +asr z2.s, p0/m, z2.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination +// CHECK-NEXT: asr z2.s, p0/m, z2.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different destination register (ternary) + +movprfx z0, z1 +mla z3.d, p0/m, z1.d, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx writing to a different destination +// CHECK-NEXT: mla z3.d, p0/m, z1.d, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Destination used in other operand (unary) + +movprfx z0, z1 +abs z0.d, p0/m, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source +// CHECK-NEXT: abs z0.d, p0/m, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z1.d +cpy z0.d, p0/m, d0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source +// CHECK-NEXT: cpy z0.d, p0/m, d0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z1.d +mov z0.d, p0/m, d0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source +// CHECK-NEXT: mov z0.d, p0/m, d0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Destination used in other operand (binary) + +movprfx z0, z1 +add z0.d, p0/m, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source +// CHECK-NEXT: add z0.d, p0/m, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Destination used in other operand (wide element) + +movprfx z0, z1 +asr z0.s, p0/m, z0.s, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source +// CHECK-NEXT: asr z0.s, p0/m, z0.s, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Destination used in other operand (ternary) + +movprfx z0, z1 +mla z0.d, p0/m, z0.d, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx and destination also used as non-destructive source +// CHECK-NEXT: mla z0.d, p0/m, z0.d, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different general predicate (unary) + +movprfx z0.d, p0/m, z1.d +abs z0.d, p1/m, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate +// CHECK-NEXT: abs z0.d, p1/m, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different general predicate (binary) + +movprfx z0.d, p0/m, z1.d +add z0.d, p1/m, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate +// CHECK-NEXT: add z0.d, p1/m, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different general predicate (wide element) + +movprfx z0.d, p0/m, z1.d +asr z0.s, p1/m, z0.s, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate +// CHECK-NEXT: asr z0.s, p1/m, z0.s, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different general predicate (ternary) + +movprfx z0.d, p0/m, z1.d +mla z0.d, p1/m, z1.d, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx using a different general predicate +// CHECK-NEXT: mla z0.d, p1/m, z1.d, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different element size (unary) + +movprfx z0.s, p0/m, z1.s +abs z0.d, p0/m, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size +// CHECK-NEXT: abs z0.d, p0/m, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different element size (binary) + +movprfx z0.s, p0/m, z1.s +add z0.d, p0/m, z0.d, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size +// CHECK-NEXT: add z0.d, p0/m, z0.d, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different element size (wide element) + +movprfx z0.d, p0/m, z1.d +asr z0.s, p0/m, z0.s, z1.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size +// CHECK-NEXT: asr z0.s, p0/m, z0.s, z1.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Different element size (ternary) + +movprfx z0.s, p0/m, z1.s +mla z0.d, p0/m, z1.d, z2.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size +// CHECK-NEXT: mla z0.d, p0/m, z1.d, z2.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Predicated movprfx with non-predicated instruction. + +movprfx z0.d, p0/m, z1.d +add z0.d, z0.d, #1 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: add z0.d, z0.d, #1 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// ------------------------------------------------------------------------- // +// Ensure we don't try to apply a prefix to subsequent instructions (upon failure) + +movprfx z0, z1 +add z0.d, z1.d, z2.d +add z0.d, z1.d, z2.d +// CHECK: [[@LINE-2]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: add z0.d, z1.d, z2.d +// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: +// CHECK: add z0.d, z1.d, z2.d Index: test/MC/AArch64/SVE/movprfx.s =================================================================== --- /dev/null +++ test/MC/AArch64/SVE/movprfx.s @@ -0,0 +1,97 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +// This test file is mostly empty because most 'movprfx' tests are embedded +// with other instructions that are destructive and can be prefixed +// by the movprfx instruction. A list of destructive instructions +// is given below by their mnemonic, which have tests in corresponding +// .s test files: +// +// abs decp fdivr fnmla fsubr mov sdivr sqincw umulh +// add eon fmad fnmls ftmad msb sdot sqsub uqadd +// and eor fmax fnmsb incd mul smax sub uqdecd +// asr ext fmaxnm frecpx inch neg smin subr uqdech +// asrd fabd fmin frinta incp not smulh sxtb uqdecp +// asrr fabs fminnm frinti incw orn splice sxth uqdecw +// bic fadd fmla frintm insr orr sqadd sxtw uqincd +// clasta fcadd fmls frintn lsl rbit sqdecd uabd uqinch +// clastb fcmla fmov frintp lslr revb sqdech ucvtf uqincp +// cls fcpy fmsb frintx lsr revh sqdecp udiv uqincw +// clz fcvt fmul frintz lsrr revw sqdecw udivr uqsub +// cnot fcvtzs fmulx fscale mad sabd sqincd udot uxtb +// cnt fcvtzu fneg fsqrt mla scvtf sqinch umax uxth +// cpy fdiv fnmad fsub mls sdiv sqincp umin uxtw + + +// ------------------------------------------------------------------------- // +// Test compatibility with MOVPRFX instruction with BRK and HLT. +// +// Section 7.1.2 of the SVE Architecture Reference Manual Supplement: +// "it is permitted to use MOVPRFX to prefix an A64 BRK or HLT instruction" + +movprfx z0, z1 +// CHECK-INST: movprfx z0, z1 +// CHECK-ENCODING: [0x20,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 bc 20 04 + +hlt #1 +// CHECK-INST: hlt #0x1 +// CHECK-ENCODING: [0x20,0x00,0x40,0xd4] + +movprfx z0.d, p0/z, z1.d +// CHECK-INST: movprfx z0.d, p0/z, z1.d +// CHECK-ENCODING: [0x20,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 20 d0 04 + +hlt #1 +// CHECK-INST: hlt #0x1 +// CHECK-ENCODING: [0x20,0x00,0x40,0xd4] + +movprfx z0, z1 +// CHECK-INST: movprfx z0, z1 +// CHECK-ENCODING: [0x20,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 bc 20 04 + +brk #1 +// CHECK-INST: brk #0x1 +// CHECK-ENCODING: [0x20,0x00,0x20,0xd4] + +movprfx z0.d, p0/z, z1.d +// CHECK-INST: movprfx z0.d, p0/z, z1.d +// CHECK-ENCODING: [0x20,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 20 d0 04 + +brk #1 +// CHECK-INST: brk #0x1 +// CHECK-ENCODING: [0x20,0x00,0x20,0xd4] + +// ------------------------------------------------------------------------- // +// Ensure we don't try to apply a prefix to subsequent instructions (upon success) + +movprfx z0, z1 +// CHECK-INST: movprfx z0, z1 +// CHECK-ENCODING: [0x20,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 bc 20 04 + +add z0.d, p0/m, z0.d, z1.d +// CHECK-INST: add z0.d, p0/m, z0.d, z1.d +// CHECK-ENCODING: [0x20,0x00,0xc0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 00 c0 04 + +add z0.d, p0/m, z0.d, z1.d +// CHECK-INST: add z0.d, p0/m, z0.d, z1.d +// CHECK-ENCODING: [0x20,0x00,0xc0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 00 c0 04 Index: test/MC/AArch64/SVE/msb.s =================================================================== --- test/MC/AArch64/SVE/msb.s +++ test/MC/AArch64/SVE/msb.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xe0,0xff,0xc1,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 ff c1 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +msb z0.d, p7/m, z1.d, z31.d +// CHECK-INST: msb z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0xe0,0xff,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 ff c1 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +msb z0.d, p7/m, z1.d, z31.d +// CHECK-INST: msb z0.d, p7/m, z1.d, z31.d +// CHECK-ENCODING: [0xe0,0xff,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 ff c1 04 Index: test/MC/AArch64/SVE/mul-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/mul-diagnostics.s +++ test/MC/AArch64/SVE/mul-diagnostics.s @@ -36,3 +36,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: mul z0.b, p8/m, z0.b, z1.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +mul z31.d, z31.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: mul z31.d, z31.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/mul.s =================================================================== --- test/MC/AArch64/SVE/mul.s +++ test/MC/AArch64/SVE/mul.s @@ -78,3 +78,43 @@ // CHECK-ENCODING: [0xff,0xcf,0xf0,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff cf f0 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +mul z0.d, p7/m, z0.d, z31.d +// CHECK-INST: mul z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +mul z0.d, p7/m, z0.d, z31.d +// CHECK-INST: mul z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d0 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +mul z31.d, z31.d, #127 +// CHECK-INST: mul z31.d, z31.d, #127 +// CHECK-ENCODING: [0xff,0xcf,0xf0,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff cf f0 25 Index: test/MC/AArch64/SVE/neg.s =================================================================== --- test/MC/AArch64/SVE/neg.s +++ test/MC/AArch64/SVE/neg.s @@ -54,3 +54,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd7,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d7 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +neg z4.d, p7/m, z31.d +// CHECK-INST: neg z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd7,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d7 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +neg z4.d, p7/m, z31.d +// CHECK-INST: neg z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd7,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d7 04 Index: test/MC/AArch64/SVE/not.s =================================================================== --- test/MC/AArch64/SVE/not.s +++ test/MC/AArch64/SVE/not.s @@ -42,3 +42,31 @@ // CHECK-ENCODING: [0xef,0x7f,0x0f,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ef 7f 0f 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +not z4.d, p7/m, z31.d +// CHECK-INST: not z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xde,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf de 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +not z4.d, p7/m, z31.d +// CHECK-INST: not z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xde,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf de 04 Index: test/MC/AArch64/SVE/orn-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/orn-diagnostics.s +++ test/MC/AArch64/SVE/orn-diagnostics.s @@ -77,3 +77,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: orn p0.b, p0/m, p1.b, p2.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +orn z0.d, z0.d, #0x6 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: orn z0.d, z0.d, #0x6 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/orn.s =================================================================== --- test/MC/AArch64/SVE/orn.s +++ test/MC/AArch64/SVE/orn.s @@ -66,3 +66,19 @@ // CHECK-ENCODING: [0xff,0x7d,0x8f,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 7d 8f 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +orn z0.d, z0.d, #0x6 +// CHECK-INST: orr z0.d, z0.d, #0xfffffffffffffff9 +// CHECK-ENCODING: [0xa0,0xef,0x03,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: a0 ef 03 05 Index: test/MC/AArch64/SVE/orr-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/orr-diagnostics.s +++ test/MC/AArch64/SVE/orr-diagnostics.s @@ -92,3 +92,37 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: orr p0.b, p0/m, p1.b, p2.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +orr z0.d, z0.d, #0x6 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: orr z0.d, z0.d, #0x6 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23.d, p0/z, z30.d +orr z23.d, z13.d, z8.d // should not use mov-alias +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: orr z23.d, z13.d, z8.d // should not use mov-alias +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +orr z23.d, z13.d, z8.d // should not use mov-alias +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: orr z23.d, z13.d, z8.d // should not use mov-alias +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +orr z0.d, z0.d, z0.d // should use mov-alias +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: orr z0.d, z0.d, z0.d // should use mov-alias +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +orr z0.d, z0.d, z0.d // should use mov-alias +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: orr z0.d, z0.d, z0.d // should use mov-alias +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/orr.s =================================================================== --- test/MC/AArch64/SVE/orr.s +++ test/MC/AArch64/SVE/orr.s @@ -110,3 +110,43 @@ // CHECK-ENCODING: [0xef,0x7d,0x8f,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ef 7d 8f 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +orr z4.d, p7/m, z4.d, z31.d +// CHECK-INST: orr z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xd8,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f d8 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +orr z4.d, p7/m, z4.d, z31.d +// CHECK-INST: orr z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xd8,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f d8 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +orr z0.d, z0.d, #0x6 +// CHECK-INST: orr z0.d, z0.d, #0x6 +// CHECK-ENCODING: [0x20,0xf8,0x03,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 f8 03 05 Index: test/MC/AArch64/SVE/orv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/orv-diagnostics.s +++ test/MC/AArch64/SVE/orv-diagnostics.s @@ -31,4 +31,19 @@ orv h0, p8, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: orv h0, p8, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +orv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: orv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +orv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: orv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/prfb-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/prfb-diagnostics.s +++ test/MC/AArch64/SVE/prfb-diagnostics.s @@ -128,3 +128,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: prfb #0, p8, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +prfb pldl1keep, p0, [x0, z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfb pldl1keep, p0, [x0, z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +prfb pldl1keep, p0, [x0, z0.d] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfb pldl1keep, p0, [x0, z0.d] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/prfd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/prfd-diagnostics.s +++ test/MC/AArch64/SVE/prfd-diagnostics.s @@ -114,3 +114,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: prfd #0, p8, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +prfd pldl1keep, p0, [x0, z0.d, lsl #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfd pldl1keep, p0, [x0, z0.d, lsl #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +prfd pldl1keep, p0, [x0, z0.d, lsl #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfd pldl1keep, p0, [x0, z0.d, lsl #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/prfh-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/prfh-diagnostics.s +++ test/MC/AArch64/SVE/prfh-diagnostics.s @@ -153,3 +153,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: prfh #0, p8, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +prfh pldl1keep, p0, [x0, z0.d, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfh pldl1keep, p0, [x0, z0.d, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +prfh pldl1keep, p0, [x0, z0.d, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfh pldl1keep, p0, [x0, z0.d, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/prfw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/prfw-diagnostics.s +++ test/MC/AArch64/SVE/prfw-diagnostics.s @@ -154,3 +154,31 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: prfw #0, p8, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z8.d, p3/z, z15.d +prfw #7, p3, [x13, z8.d, uxtw #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfw #7, p3, [x13, z8.d, uxtw #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z8, z15 +prfw #7, p3, [x13, z8.d, uxtw #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfw #7, p3, [x13, z8.d, uxtw #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21.d, p5/z, z28.d +prfw pldl3strm, p5, [x10, z21.d, lsl #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfw pldl3strm, p5, [x10, z21.d, lsl #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +prfw pldl3strm, p5, [x10, z21.d, lsl #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: prfw pldl3strm, p5, [x10, z21.d, lsl #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/rbit.s =================================================================== --- test/MC/AArch64/SVE/rbit.s +++ test/MC/AArch64/SVE/rbit.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xe7,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f e7 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +rbit z0.d, p7/m, z31.d +// CHECK-INST: rbit z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe7,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e7 05 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +rbit z0.d, p7/m, z31.d +// CHECK-INST: rbit z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe7,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e7 05 Index: test/MC/AArch64/SVE/rev-diagnostics.s =================================================================== --- /dev/null +++ test/MC/AArch64/SVE/rev-diagnostics.s @@ -0,0 +1,17 @@ +// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +rev z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: rev z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +rev z0.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: rev z0.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/revb.s =================================================================== --- test/MC/AArch64/SVE/revb.s +++ test/MC/AArch64/SVE/revb.s @@ -24,3 +24,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xe4,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f e4 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +revb z0.d, p7/m, z31.d +// CHECK-INST: revb z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe4,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e4 05 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +revb z0.d, p7/m, z31.d +// CHECK-INST: revb z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe4,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e4 05 Index: test/MC/AArch64/SVE/revh.s =================================================================== --- test/MC/AArch64/SVE/revh.s +++ test/MC/AArch64/SVE/revh.s @@ -18,3 +18,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xe5,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f e5 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +revh z0.d, p7/m, z31.d +// CHECK-INST: revh z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe5,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e5 05 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +revh z0.d, p7/m, z31.d +// CHECK-INST: revh z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe5,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e5 05 Index: test/MC/AArch64/SVE/revw.s =================================================================== --- test/MC/AArch64/SVE/revw.s +++ test/MC/AArch64/SVE/revw.s @@ -12,3 +12,31 @@ // CHECK-ENCODING: [0xe0,0x9f,0xe6,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 9f e6 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +revw z0.d, p7/m, z31.d +// CHECK-INST: revw z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe6,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e6 05 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +revw z0.d, p7/m, z31.d +// CHECK-INST: revw z0.d, p7/m, z31.d +// CHECK-ENCODING: [0xe0,0x9f,0xe6,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 9f e6 05 Index: test/MC/AArch64/SVE/sabd.s =================================================================== --- test/MC/AArch64/SVE/sabd.s +++ test/MC/AArch64/SVE/sabd.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0x1f,0xcc,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 1f cc 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +sabd z4.d, p7/m, z4.d, z31.d +// CHECK-INST: sabd z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xcc,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f cc 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +sabd z4.d, p7/m, z4.d, z31.d +// CHECK-INST: sabd z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xcc,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f cc 04 Index: test/MC/AArch64/SVE/saddv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/saddv-diagnostics.s +++ test/MC/AArch64/SVE/saddv-diagnostics.s @@ -31,4 +31,19 @@ saddv d0, p8, z31.b // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: saddv d0, p8, z31.b -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.s, p7/z, z6.s +saddv d0, p7, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: saddv d0, p7, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +saddv d0, p7, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: saddv d0, p7, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/scvtf.s =================================================================== --- test/MC/AArch64/SVE/scvtf.s +++ test/MC/AArch64/SVE/scvtf.s @@ -48,3 +48,31 @@ // CHECK-ENCODING: [0x00,0xa0,0xd6,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 a0 d6 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +scvtf z5.d, p0/m, z0.d +// CHECK-INST: scvtf z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xd6,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 d6 65 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +scvtf z5.d, p0/m, z0.d +// CHECK-INST: scvtf z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xd6,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 d6 65 Index: test/MC/AArch64/SVE/sdiv.s =================================================================== --- test/MC/AArch64/SVE/sdiv.s +++ test/MC/AArch64/SVE/sdiv.s @@ -18,3 +18,31 @@ // CHECK-ENCODING: [0xe0,0x1f,0xd4,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 1f d4 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +sdiv z0.d, p7/m, z0.d, z31.d +// CHECK-INST: sdiv z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd4,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d4 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sdiv z0.d, p7/m, z0.d, z31.d +// CHECK-INST: sdiv z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd4,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d4 04 Index: test/MC/AArch64/SVE/sdivr.s =================================================================== --- test/MC/AArch64/SVE/sdivr.s +++ test/MC/AArch64/SVE/sdivr.s @@ -18,3 +18,31 @@ // CHECK-ENCODING: [0xe0,0x1f,0xd6,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 1f d6 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +sdivr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: sdivr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd6,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d6 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sdivr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: sdivr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd6,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d6 04 Index: test/MC/AArch64/SVE/sdot-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sdot-diagnostics.s +++ test/MC/AArch64/SVE/sdot-diagnostics.s @@ -56,3 +56,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. // CHECK-NEXT: sdot z0.d, z1.h, z15.h[2] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +sdot z0.d, z1.h, z31.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sdot z0.d, z1.h, z31.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +sdot z0.d, z1.h, z15.h[1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sdot z0.d, z1.h, z15.h[1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sdot.s =================================================================== --- test/MC/AArch64/SVE/sdot.s +++ test/MC/AArch64/SVE/sdot.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0x20,0x00,0xff,0x44] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 00 ff 44 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sdot z0.d, z1.h, z31.h +// CHECK-INST: sdot z0.d, z1.h, z31.h +// CHECK-ENCODING: [0x20,0x00,0xdf,0x44] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 00 df 44 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sdot z0.d, z1.h, z15.h[1] +// CHECK-INST: sdot z0.d, z1.h, z15.h[1] +// CHECK-ENCODING: [0x20,0x00,0xff,0x44] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 00 ff 44 Index: test/MC/AArch64/SVE/sel-diagnostics.s =================================================================== --- /dev/null +++ test/MC/AArch64/SVE/sel-diagnostics.s @@ -0,0 +1,17 @@ +// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z28.b, p7/z, z30.b +sel z28.b, p7, z13.b, z8.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sel z28.b, p7, z13.b, z8.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z23, z30 +sel z23.b, p11, z13.b, z8.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sel z23.b, p11, z13.b, z8.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/smax-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/smax-diagnostics.s +++ test/MC/AArch64/SVE/smax-diagnostics.s @@ -14,3 +14,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: smax z0.b, p8/m, z0.b, z0.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +smax z31.d, z31.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: smax z31.d, z31.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/smax.s =================================================================== --- test/MC/AArch64/SVE/smax.s +++ test/MC/AArch64/SVE/smax.s @@ -78,3 +78,43 @@ // CHECK-ENCODING: [0xff,0x1f,0xc8,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 1f c8 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +smax z4.d, p7/m, z4.d, z31.d +// CHECK-INST: smax z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xc8,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f c8 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +smax z4.d, p7/m, z4.d, z31.d +// CHECK-INST: smax z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xc8,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f c8 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +smax z31.d, z31.d, #127 +// CHECK-INST: smax z31.d, z31.d, #127 +// CHECK-ENCODING: [0xff,0xcf,0xe8,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff cf e8 25 Index: test/MC/AArch64/SVE/smaxv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/smaxv-diagnostics.s +++ test/MC/AArch64/SVE/smaxv-diagnostics.s @@ -31,4 +31,19 @@ smaxv h0, p8, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: smaxv h0, p8, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +smaxv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: smaxv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +smaxv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: smaxv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/smin-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/smin-diagnostics.s +++ test/MC/AArch64/SVE/smin-diagnostics.s @@ -14,3 +14,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: smin z0.b, p8/m, z0.b, z0.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +smin z31.d, z31.d, #127 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: smin z31.d, z31.d, #127 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/smin.s =================================================================== --- test/MC/AArch64/SVE/smin.s +++ test/MC/AArch64/SVE/smin.s @@ -78,3 +78,43 @@ // CHECK-ENCODING: [0xff,0x1f,0xca,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 1f ca 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +smin z4.d, p7/m, z4.d, z31.d +// CHECK-INST: smin z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xca,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f ca 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +smin z4.d, p7/m, z4.d, z31.d +// CHECK-INST: smin z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xca,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f ca 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +smin z31.d, z31.d, #127 +// CHECK-INST: smin z31.d, z31.d, #127 +// CHECK-ENCODING: [0xff,0xcf,0xea,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff cf ea 25 Index: test/MC/AArch64/SVE/sminv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sminv-diagnostics.s +++ test/MC/AArch64/SVE/sminv-diagnostics.s @@ -31,4 +31,19 @@ sminv h0, p8, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: sminv h0, p8, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +sminv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sminv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +sminv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sminv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/smulh.s =================================================================== --- test/MC/AArch64/SVE/smulh.s +++ test/MC/AArch64/SVE/smulh.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xe0,0x1f,0xd2,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 1f d2 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +smulh z0.d, p7/m, z0.d, z31.d +// CHECK-INST: smulh z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd2,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d2 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +smulh z0.d, p7/m, z0.d, z31.d +// CHECK-INST: smulh z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd2,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d2 04 Index: test/MC/AArch64/SVE/splice-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/splice-diagnostics.s +++ test/MC/AArch64/SVE/splice-diagnostics.s @@ -25,3 +25,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: splice z0.b, p8, z0.b, z1.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z4.d, p7/z, z6.d +splice z4.d, p7, z4.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: splice z4.d, p7, z4.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/splice.s =================================================================== --- test/MC/AArch64/SVE/splice.s +++ test/MC/AArch64/SVE/splice.s @@ -30,3 +30,19 @@ // CHECK-ENCODING: [0xff,0x9f,0xec,0x05] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 9f ec 05 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +splice z4.d, p7, z4.d, z31.d +// CHECK-INST: splice z4.d, p7, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x9f,0xec,0x05] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 9f ec 05 Index: test/MC/AArch64/SVE/sqadd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqadd-diagnostics.s +++ test/MC/AArch64/SVE/sqadd-diagnostics.s @@ -86,3 +86,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280] // CHECK-NEXT: sqadd z0.d, z0.d, #65536 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +sqadd z31.d, z31.d, #65280 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqadd z31.d, z31.d, #65280 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +sqadd z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sqadd z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +sqadd z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sqadd z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqadd.s =================================================================== --- test/MC/AArch64/SVE/sqadd.s +++ test/MC/AArch64/SVE/sqadd.s @@ -115,3 +115,19 @@ // CHECK-ENCODING: [0xff,0xff,0xe4,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff ff e4 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +sqadd z31.d, z31.d, #65280 +// CHECK-INST: sqadd z31.d, z31.d, #65280 +// CHECK-ENCODING: [0xff,0xff,0xe4,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff ff e4 25 Index: test/MC/AArch64/SVE/sqdecd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqdecd-diagnostics.s +++ test/MC/AArch64/SVE/sqdecd-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: sqdecd x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +sqdecd z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdecd z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +sqdecd z0.d, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdecd z0.d, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +sqdecd z0.d, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdecd z0.d, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqdecd.s =================================================================== --- test/MC/AArch64/SVE/sqdecd.s +++ test/MC/AArch64/SVE/sqdecd.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xfb,0xf0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 fb f0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdecd z0.d +// CHECK-INST: sqdecd z0.d +// CHECK-ENCODING: [0xe0,0xcb,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 cb e0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdecd z0.d, pow2, mul #16 +// CHECK-INST: sqdecd z0.d, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc8,0xef,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c8 ef 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdecd z0.d, pow2 +// CHECK-INST: sqdecd z0.d, pow2 +// CHECK-ENCODING: [0x00,0xc8,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c8 e0 04 Index: test/MC/AArch64/SVE/sqdech-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqdech-diagnostics.s +++ test/MC/AArch64/SVE/sqdech-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: sqdech x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.h, p0/z, z7.h +sqdech z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdech z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +sqdech z0.h, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdech z0.h, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +sqdech z0.h, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdech z0.h, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqdech.s =================================================================== --- test/MC/AArch64/SVE/sqdech.s +++ test/MC/AArch64/SVE/sqdech.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xfb,0x70,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 fb 70 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdech z0.h +// CHECK-INST: sqdech z0.h +// CHECK-ENCODING: [0xe0,0xcb,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 cb 60 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdech z0.h, pow2, mul #16 +// CHECK-INST: sqdech z0.h, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc8,0x6f,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c8 6f 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdech z0.h, pow2 +// CHECK-INST: sqdech z0.h, pow2 +// CHECK-ENCODING: [0x00,0xc8,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c8 60 04 Index: test/MC/AArch64/SVE/sqdecp-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqdecp-diagnostics.s +++ test/MC/AArch64/SVE/sqdecp-diagnostics.s @@ -51,3 +51,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register // CHECK-NEXT: sqdecp x0, p0.q // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +sqdecp z0.d, p0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdecp z0.d, p0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqdecp.s =================================================================== --- test/MC/AArch64/SVE/sqdecp.s +++ test/MC/AArch64/SVE/sqdecp.s @@ -72,3 +72,19 @@ // CHECK-ENCODING: [0x00,0x80,0xea,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 80 ea 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdecp z0.d, p0 +// CHECK-INST: sqdecp z0.d, p0 +// CHECK-ENCODING: [0x00,0x80,0xea,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 80 ea 25 Index: test/MC/AArch64/SVE/sqdecw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqdecw-diagnostics.s +++ test/MC/AArch64/SVE/sqdecw-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: sqdecw x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.s, p0/z, z7.s +sqdecw z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdecw z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +sqdecw z0.s, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdecw z0.s, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +sqdecw z0.s, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqdecw z0.s, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqdecw.s =================================================================== --- test/MC/AArch64/SVE/sqdecw.s +++ test/MC/AArch64/SVE/sqdecw.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xfb,0xb0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 fb b0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdecw z0.s +// CHECK-INST: sqdecw z0.s +// CHECK-ENCODING: [0xe0,0xcb,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 cb a0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdecw z0.s, pow2, mul #16 +// CHECK-INST: sqdecw z0.s, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc8,0xaf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c8 af 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqdecw z0.s, pow2 +// CHECK-INST: sqdecw z0.s, pow2 +// CHECK-ENCODING: [0x00,0xc8,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c8 a0 04 Index: test/MC/AArch64/SVE/sqincd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqincd-diagnostics.s +++ test/MC/AArch64/SVE/sqincd-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: sqincd x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +sqincd z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqincd z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +sqincd z0.d, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqincd z0.d, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +sqincd z0.d, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqincd z0.d, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqincd.s =================================================================== --- test/MC/AArch64/SVE/sqincd.s +++ test/MC/AArch64/SVE/sqincd.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xf3,0xf0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 f3 f0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqincd z0.d +// CHECK-INST: sqincd z0.d +// CHECK-ENCODING: [0xe0,0xc3,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 e0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqincd z0.d, pow2, mul #16 +// CHECK-INST: sqincd z0.d, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc0,0xef,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 ef 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqincd z0.d, pow2 +// CHECK-INST: sqincd z0.d, pow2 +// CHECK-ENCODING: [0x00,0xc0,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 e0 04 Index: test/MC/AArch64/SVE/sqinch-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqinch-diagnostics.s +++ test/MC/AArch64/SVE/sqinch-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: sqinch x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.h, p0/z, z7.h +sqinch z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqinch z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +sqinch z0.h, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqinch z0.h, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +sqinch z0.h, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqinch z0.h, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqinch.s =================================================================== --- test/MC/AArch64/SVE/sqinch.s +++ test/MC/AArch64/SVE/sqinch.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xf3,0x70,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 f3 70 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqinch z0.h +// CHECK-INST: sqinch z0.h +// CHECK-ENCODING: [0xe0,0xc3,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 60 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqinch z0.h, pow2, mul #16 +// CHECK-INST: sqinch z0.h, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc0,0x6f,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 6f 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqinch z0.h, pow2 +// CHECK-INST: sqinch z0.h, pow2 +// CHECK-ENCODING: [0x00,0xc0,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 60 04 Index: test/MC/AArch64/SVE/sqincp-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqincp-diagnostics.s +++ test/MC/AArch64/SVE/sqincp-diagnostics.s @@ -46,3 +46,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register // CHECK-NEXT: uqdecp x0, p0.q // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +sqincp z0.d, p0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqincp z0.d, p0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqincp.s =================================================================== --- test/MC/AArch64/SVE/sqincp.s +++ test/MC/AArch64/SVE/sqincp.s @@ -72,3 +72,19 @@ // CHECK-ENCODING: [0x00,0x80,0xe8,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 80 e8 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqincp z0.d, p0 +// CHECK-INST: sqincp z0.d, p0 +// CHECK-ENCODING: [0x00,0x80,0xe8,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 80 e8 25 Index: test/MC/AArch64/SVE/sqincw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqincw-diagnostics.s +++ test/MC/AArch64/SVE/sqincw-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: sqincw x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.s, p0/z, z7.s +sqincw z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqincw z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +sqincw z0.s, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqincw z0.s, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +sqincw z0.s, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqincw z0.s, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqincw.s =================================================================== --- test/MC/AArch64/SVE/sqincw.s +++ test/MC/AArch64/SVE/sqincw.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xf3,0xb0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 f3 b0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqincw z0.s +// CHECK-INST: sqincw z0.s +// CHECK-ENCODING: [0xe0,0xc3,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c3 a0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqincw z0.s, pow2, mul #16 +// CHECK-INST: sqincw z0.s, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc0,0xaf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 af 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +sqincw z0.s, pow2 +// CHECK-INST: sqincw z0.s, pow2 +// CHECK-ENCODING: [0x00,0xc0,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 a0 04 Index: test/MC/AArch64/SVE/sqsub-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sqsub-diagnostics.s +++ test/MC/AArch64/SVE/sqsub-diagnostics.s @@ -86,3 +86,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280] // CHECK-NEXT: sqsub z0.d, z0.d, #65536 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +sqsub z31.d, z31.d, #65280 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sqsub z31.d, z31.d, #65280 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +sqsub z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sqsub z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +sqsub z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sqsub z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sqsub.s =================================================================== --- test/MC/AArch64/SVE/sqsub.s +++ test/MC/AArch64/SVE/sqsub.s @@ -115,3 +115,19 @@ // CHECK-ENCODING: [0xff,0xff,0xe6,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff ff e6 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +sqsub z31.d, z31.d, #65280 +// CHECK-INST: sqsub z31.d, z31.d, #65280 +// CHECK-ENCODING: [0xff,0xff,0xe6,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff ff e6 25 Index: test/MC/AArch64/SVE/st1b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st1b-diagnostics.s +++ test/MC/AArch64/SVE/st1b-diagnostics.s @@ -175,3 +175,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. // CHECK-NEXT: st1b z0.d, p0, [z0.d, #32] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +st1b { z31.d }, p7, [z31.d, #31] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1b { z31.d }, p7, [z31.d, #31] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +st1b { z31.d }, p7, [z31.d, #31] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1b { z31.d }, p7, [z31.d, #31] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st1d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st1d-diagnostics.s +++ test/MC/AArch64/SVE/st1d-diagnostics.s @@ -131,3 +131,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248]. // CHECK-NEXT: st1d z0.d, p0, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +st1d { z31.d }, p7, [z31.d, #248] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1d { z31.d }, p7, [z31.d, #248] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +st1d { z31.d }, p7, [z31.d, #248] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1d { z31.d }, p7, [z31.d, #248] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st1h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st1h-diagnostics.s +++ test/MC/AArch64/SVE/st1h-diagnostics.s @@ -189,3 +189,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62]. // CHECK-NEXT: st1h z0.d, p0, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +st1h { z31.d }, p7, [z31.d, #62] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +st1h { z31.d }, p7, [z31.d, #62] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1h { z31.d }, p7, [z31.d, #62] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st1w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st1w-diagnostics.s +++ test/MC/AArch64/SVE/st1w-diagnostics.s @@ -178,3 +178,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124]. // CHECK-NEXT: st1w z0.d, p0, [z0.d, #3] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +st1w { z31.d }, p7, [z31.d, #124] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1w { z31.d }, p7, [z31.d, #124] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +st1w { z31.d }, p7, [z31.d, #124] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st1w { z31.d }, p7, [z31.d, #124] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st2b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st2b-diagnostics.s +++ test/MC/AArch64/SVE/st2b-diagnostics.s @@ -89,3 +89,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st2b { v0.2d, v1.2d }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.b, p5/z, z28.b +st2b { z21.b, z22.b }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2b { z21.b, z22.b }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st2b { z21.b, z22.b }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2b { z21.b, z22.b }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st2d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st2d-diagnostics.s +++ test/MC/AArch64/SVE/st2d-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st2d { v0.2d, v1.2d }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +st2d { z21.d, z22.d }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2d { z21.d, z22.d }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st2d { z21.d, z22.d }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2d { z21.d, z22.d }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st2h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st2h-diagnostics.s +++ test/MC/AArch64/SVE/st2h-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st2h { v0.2d, v1.2d }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.h, p5/z, z28.h +st2h { z21.h, z22.h }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2h { z21.h, z22.h }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st2h { z21.h, z22.h }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2h { z21.h, z22.h }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st2w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st2w-diagnostics.s +++ test/MC/AArch64/SVE/st2w-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st2w { v0.2d, v1.2d }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.s, p5/z, z28.s +st2w { z21.s, z22.s }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2w { z21.s, z22.s }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st2w { z21.s, z22.s }, p5, [x10, #10, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st2w { z21.s, z22.s }, p5, [x10, #10, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st3b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st3b-diagnostics.s +++ test/MC/AArch64/SVE/st3b-diagnostics.s @@ -89,3 +89,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st3b { v0.16b, v1.16b, v2.16b }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.b, p5/z, z28.b +st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st3d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st3d-diagnostics.s +++ test/MC/AArch64/SVE/st3d-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st3d { v0.2d, v1.2d, v2.2d }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st3h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st3h-diagnostics.s +++ test/MC/AArch64/SVE/st3h-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st3h { v0.8h, v1.8h, v2.8h }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.h, p5/z, z28.h +st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st3w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st3w-diagnostics.s +++ test/MC/AArch64/SVE/st3w-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st3w { v0.4s, v1.4s, v2.4s }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.s, p5/z, z28.s +st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st4b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st4b-diagnostics.s +++ test/MC/AArch64/SVE/st4b-diagnostics.s @@ -89,3 +89,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st4b { v0.16b, v1.16b, v2.16b }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.b, p5/z, z28.b +st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st4d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st4d-diagnostics.s +++ test/MC/AArch64/SVE/st4d-diagnostics.s @@ -95,3 +95,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st4d { v0.2d, v1.2d, v2.2d }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.d, p5/z, z28.d +st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st4h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st4h-diagnostics.s +++ test/MC/AArch64/SVE/st4h-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st4h { v0.8h, v1.8h, v2.8h }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.h, p5/z, z28.h +st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/st4w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/st4w-diagnostics.s +++ test/MC/AArch64/SVE/st4w-diagnostics.s @@ -94,3 +94,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: st4w { v0.4s, v1.4s, v2.4s }, p0, [x0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z21.s, p5/z, z28.s +st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z21, z28 +st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/stnt1b-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/stnt1b-diagnostics.s +++ test/MC/AArch64/SVE/stnt1b-diagnostics.s @@ -64,3 +64,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: stnt1b { v0.2d }, p0, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.b, p0/z, z7.b +stnt1b { z0.b }, p0, [x0, x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1b { z0.b }, p0, [x0, x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +stnt1b { z0.b }, p0, [x0, x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1b { z0.b }, p0, [x0, x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/stnt1d-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/stnt1d-diagnostics.s +++ test/MC/AArch64/SVE/stnt1d-diagnostics.s @@ -64,3 +64,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: stnt1d { v0.2d }, p0, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +stnt1d { z0.d }, p0, [x0, x0, lsl #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1d { z0.d }, p0, [x0, x0, lsl #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +stnt1d { z0.d }, p0, [x0, x0, lsl #3] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1d { z0.d }, p0, [x0, x0, lsl #3] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/stnt1h-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/stnt1h-diagnostics.s +++ test/MC/AArch64/SVE/stnt1h-diagnostics.s @@ -64,3 +64,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: stnt1h { v0.2d }, p0, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.h, p0/z, z7.h +stnt1h { z0.h }, p0, [x0, x0, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1h { z0.h }, p0, [x0, x0, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +stnt1h { z0.h }, p0, [x0, x0, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1h { z0.h }, p0, [x0, x0, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/stnt1w-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/stnt1w-diagnostics.s +++ test/MC/AArch64/SVE/stnt1w-diagnostics.s @@ -64,3 +64,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: stnt1w { v0.2d }, p0, [x1, #1, MUL VL] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.s, p0/z, z7.s +stnt1w { z0.s }, p0, [x0, x0, lsl #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1w { z0.s }, p0, [x0, x0, lsl #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +stnt1w { z0.s }, p0, [x0, x0, lsl #2] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: stnt1w { z0.s }, p0, [x0, x0, lsl #2] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sub-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sub-diagnostics.s +++ test/MC/AArch64/SVE/sub-diagnostics.s @@ -144,3 +144,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280] // CHECK-NEXT: sub z0.d, z0.d, #65536 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +sub z31.d, z31.d, #65280 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: sub z31.d, z31.d, #65280 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31.s, p0/z, z6.s +sub z31.s, z31.s, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sub z31.s, z31.s, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +sub z31.s, z31.s, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sub z31.s, z31.s, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sub.s =================================================================== --- test/MC/AArch64/SVE/sub.s +++ test/MC/AArch64/SVE/sub.s @@ -286,3 +286,43 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff ff e1 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z23.b, p3/z, z30.b +// CHECK-INST: movprfx z23.b, p3/z, z30.b +// CHECK-ENCODING: [0xd7,0x2f,0x10,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: d7 2f 10 04 + +sub z23.b, p3/m, z23.b, z13.b +// CHECK-INST: sub z23.b, p3/m, z23.b, z13.b +// CHECK-ENCODING: [0xb7,0x0d,0x01,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 01 04 + +movprfx z23, z30 +// CHECK-INST: movprfx z23, z30 +// CHECK-ENCODING: [0xd7,0xbf,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: d7 bf 20 04 + +sub z23.b, p3/m, z23.b, z13.b +// CHECK-INST: sub z23.b, p3/m, z23.b, z13.b +// CHECK-ENCODING: [0xb7,0x0d,0x01,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 01 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +sub z31.d, z31.d, #65280 +// CHECK-INST: sub z31.d, z31.d, #65280 +// CHECK-ENCODING: [0xff,0xff,0xe1,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff ff e1 25 Index: test/MC/AArch64/SVE/subr-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/subr-diagnostics.s +++ test/MC/AArch64/SVE/subr-diagnostics.s @@ -138,3 +138,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280] // CHECK-NEXT: subr z0.d, z0.d, #65536 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +subr z31.d, z31.d, #65280 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: subr z31.d, z31.d, #65280 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/subr.s =================================================================== --- test/MC/AArch64/SVE/subr.s +++ test/MC/AArch64/SVE/subr.s @@ -115,3 +115,43 @@ // CHECK-ENCODING: [0xff,0xff,0xe3,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff ff e3 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +subr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: subr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x00,0xc3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 00 c3 04 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +subr z5.d, p0/m, z5.d, z0.d +// CHECK-INST: subr z5.d, p0/m, z5.d, z0.d +// CHECK-ENCODING: [0x05,0x00,0xc3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 00 c3 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +subr z31.d, z31.d, #65280 +// CHECK-INST: subr z31.d, z31.d, #65280 +// CHECK-ENCODING: [0xff,0xff,0xe3,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff ff e3 25 Index: test/MC/AArch64/SVE/sunpkhi-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sunpkhi-diagnostics.s +++ test/MC/AArch64/SVE/sunpkhi-diagnostics.s @@ -18,3 +18,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: sunpkhi z0.d, z0.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +sunpkhi z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sunpkhi z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +sunpkhi z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sunpkhi z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sunpklo-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sunpklo-diagnostics.s +++ test/MC/AArch64/SVE/sunpklo-diagnostics.s @@ -18,3 +18,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: sunpklo z0.d, z0.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +sunpklo z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sunpklo z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +sunpklo z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: sunpklo z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sxtb.s =================================================================== --- test/MC/AArch64/SVE/sxtb.s +++ test/MC/AArch64/SVE/sxtb.s @@ -42,3 +42,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +sxtb z4.d, p7/m, z31.d +// CHECK-INST: sxtb z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d0 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +sxtb z4.d, p7/m, z31.d +// CHECK-INST: sxtb z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d0 04 Index: test/MC/AArch64/SVE/sxth.s =================================================================== --- test/MC/AArch64/SVE/sxth.s +++ test/MC/AArch64/SVE/sxth.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd2,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d2 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +sxth z4.d, p7/m, z31.d +// CHECK-INST: sxth z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd2,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d2 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +sxth z4.d, p7/m, z31.d +// CHECK-INST: sxth z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd2,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d2 04 Index: test/MC/AArch64/SVE/sxtw.s =================================================================== --- test/MC/AArch64/SVE/sxtw.s +++ test/MC/AArch64/SVE/sxtw.s @@ -18,3 +18,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd4,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d4 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +sxtw z4.d, p7/m, z31.d +// CHECK-INST: sxtw z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd4,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d4 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +sxtw z4.d, p7/m, z31.d +// CHECK-INST: sxtw z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd4,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d4 04 Index: test/MC/AArch64/SVE/tbl-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/tbl-diagnostics.s +++ test/MC/AArch64/SVE/tbl-diagnostics.s @@ -9,3 +9,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected // CHECK-NEXT: tbl { z0.h }, z0.h, z0.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +tbl z31.d, { z31.d }, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: tbl z31.d, { z31.d }, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +tbl z31.d, { z31.d }, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: tbl z31.d, { z31.d }, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/trn1-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/trn1-diagnostics.s +++ test/MC/AArch64/SVE/trn1-diagnostics.s @@ -41,3 +41,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: trn1 p1.s, p2.s, z3.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +trn1 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: trn1 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +trn1 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: trn1 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/trn2-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/trn2-diagnostics.s +++ test/MC/AArch64/SVE/trn2-diagnostics.s @@ -41,3 +41,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: trn2 p1.s, p2.s, z3.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +trn2 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: trn2 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +trn2 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: trn2 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uabd.s =================================================================== --- test/MC/AArch64/SVE/uabd.s +++ test/MC/AArch64/SVE/uabd.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0x1f,0xcd,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 1f cd 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +uabd z4.d, p7/m, z4.d, z31.d +// CHECK-INST: uabd z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xcd,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f cd 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +uabd z4.d, p7/m, z4.d, z31.d +// CHECK-INST: uabd z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xcd,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f cd 04 Index: test/MC/AArch64/SVE/uaddv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uaddv-diagnostics.s +++ test/MC/AArch64/SVE/uaddv-diagnostics.s @@ -26,4 +26,19 @@ uaddv d0, p8, z31.b // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: uaddv d0, p8, z31.b -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +uaddv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uaddv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +uaddv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uaddv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/ucvtf.s =================================================================== --- test/MC/AArch64/SVE/ucvtf.s +++ test/MC/AArch64/SVE/ucvtf.s @@ -48,3 +48,31 @@ // CHECK-ENCODING: [0x00,0xa0,0xd7,0x65] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 a0 d7 65 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z5.d, p0/z, z7.d +// CHECK-INST: movprfx z5.d, p0/z, z7.d +// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 20 d0 04 + +ucvtf z5.d, p0/m, z0.d +// CHECK-INST: ucvtf z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xd7,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 d7 65 + +movprfx z5, z7 +// CHECK-INST: movprfx z5, z7 +// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e5 bc 20 04 + +ucvtf z5.d, p0/m, z0.d +// CHECK-INST: ucvtf z5.d, p0/m, z0.d +// CHECK-ENCODING: [0x05,0xa0,0xd7,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 05 a0 d7 65 Index: test/MC/AArch64/SVE/udiv.s =================================================================== --- test/MC/AArch64/SVE/udiv.s +++ test/MC/AArch64/SVE/udiv.s @@ -18,3 +18,31 @@ // CHECK-ENCODING: [0xe0,0x1f,0xd5,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 1f d5 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +udiv z0.d, p7/m, z0.d, z31.d +// CHECK-INST: udiv z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd5,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d5 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +udiv z0.d, p7/m, z0.d, z31.d +// CHECK-INST: udiv z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd5,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d5 04 Index: test/MC/AArch64/SVE/udivr.s =================================================================== --- test/MC/AArch64/SVE/udivr.s +++ test/MC/AArch64/SVE/udivr.s @@ -18,3 +18,31 @@ // CHECK-ENCODING: [0xe0,0x1f,0xd7,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 1f d7 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +udivr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: udivr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd7,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d7 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +udivr z0.d, p7/m, z0.d, z31.d +// CHECK-INST: udivr z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd7,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d7 04 Index: test/MC/AArch64/SVE/udot-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/udot-diagnostics.s +++ test/MC/AArch64/SVE/udot-diagnostics.s @@ -56,3 +56,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1]. // CHECK-NEXT: udot z0.d, z1.h, z15.h[2] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +udot z0.d, z1.h, z31.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: udot z0.d, z1.h, z31.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +udot z0.d, z1.h, z15.h[1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: udot z0.d, z1.h, z15.h[1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/udot.s =================================================================== --- test/MC/AArch64/SVE/udot.s +++ test/MC/AArch64/SVE/udot.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0x20,0x04,0xff,0x44] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 20 04 ff 44 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +udot z0.d, z1.h, z31.h +// CHECK-INST: udot z0.d, z1.h, z31.h +// CHECK-ENCODING: [0x20,0x04,0xdf,0x44] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 04 df 44 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +udot z0.d, z1.h, z15.h[1] +// CHECK-INST: udot z0.d, z1.h, z15.h[1] +// CHECK-ENCODING: [0x20,0x04,0xff,0x44] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 04 ff 44 Index: test/MC/AArch64/SVE/umax-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/umax-diagnostics.s +++ test/MC/AArch64/SVE/umax-diagnostics.s @@ -14,3 +14,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: umax z0.b, p8/m, z0.b, z0.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.b, p0/z, z6.b +umax z31.b, z31.b, #255 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: umax z31.b, z31.b, #255 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/umax.s =================================================================== --- test/MC/AArch64/SVE/umax.s +++ test/MC/AArch64/SVE/umax.s @@ -78,3 +78,43 @@ // CHECK-ENCODING: [0xff,0x1f,0xc9,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 1f c9 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +umax z4.d, p7/m, z4.d, z31.d +// CHECK-INST: umax z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xc9,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f c9 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +umax z4.d, p7/m, z4.d, z31.d +// CHECK-INST: umax z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xc9,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f c9 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +umax z31.b, z31.b, #255 +// CHECK-INST: umax z31.b, z31.b, #255 +// CHECK-ENCODING: [0xff,0xdf,0x29,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff df 29 25 Index: test/MC/AArch64/SVE/umaxv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/umaxv-diagnostics.s +++ test/MC/AArch64/SVE/umaxv-diagnostics.s @@ -31,4 +31,19 @@ umaxv h0, p8, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: umaxv h0, p8, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +umaxv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: umaxv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +umaxv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: umaxv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/umin-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/umin-diagnostics.s +++ test/MC/AArch64/SVE/umin-diagnostics.s @@ -14,3 +14,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: umin z0.b, p8/m, z0.b, z0.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.b, p0/z, z6.b +umin z31.b, z31.b, #255 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: umin z31.b, z31.b, #255 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/umin.s =================================================================== --- test/MC/AArch64/SVE/umin.s +++ test/MC/AArch64/SVE/umin.s @@ -78,3 +78,43 @@ // CHECK-ENCODING: [0xff,0x1f,0xcb,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 1f cb 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +umin z4.d, p7/m, z4.d, z31.d +// CHECK-INST: umin z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xcb,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f cb 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +umin z4.d, p7/m, z4.d, z31.d +// CHECK-INST: umin z4.d, p7/m, z4.d, z31.d +// CHECK-ENCODING: [0xe4,0x1f,0xcb,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 1f cb 04 + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +umin z31.b, z31.b, #255 +// CHECK-INST: umin z31.b, z31.b, #255 +// CHECK-ENCODING: [0xff,0xdf,0x2b,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff df 2b 25 Index: test/MC/AArch64/SVE/uminv-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uminv-diagnostics.s +++ test/MC/AArch64/SVE/uminv-diagnostics.s @@ -31,4 +31,19 @@ uminv h0, p8, z31.h // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. // CHECK-NEXT: uminv h0, p8, z31.h -// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p7/z, z6.d +uminv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uminv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +uminv d0, p7, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uminv d0, p7, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/umulh.s =================================================================== --- test/MC/AArch64/SVE/umulh.s +++ test/MC/AArch64/SVE/umulh.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xe0,0x1f,0xd3,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: e0 1f d3 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0.d, p7/z, z7.d +// CHECK-INST: movprfx z0.d, p7/z, z7.d +// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 3c d0 04 + +umulh z0.d, p7/m, z0.d, z31.d +// CHECK-INST: umulh z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d3 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +umulh z0.d, p7/m, z0.d, z31.d +// CHECK-INST: umulh z0.d, p7/m, z0.d, z31.d +// CHECK-ENCODING: [0xe0,0x1f,0xd3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 1f d3 04 Index: test/MC/AArch64/SVE/uqadd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqadd-diagnostics.s +++ test/MC/AArch64/SVE/uqadd-diagnostics.s @@ -86,3 +86,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280] // CHECK-NEXT: uqadd z0.d, z0.d, #65536 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +uqadd z31.d, z31.d, #65280 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqadd z31.d, z31.d, #65280 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +uqadd z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uqadd z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +uqadd z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uqadd z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqadd.s =================================================================== --- test/MC/AArch64/SVE/uqadd.s +++ test/MC/AArch64/SVE/uqadd.s @@ -115,3 +115,19 @@ // CHECK-ENCODING: [0xff,0xff,0xe5,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff ff e5 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +uqadd z31.d, z31.d, #65280 +// CHECK-INST: uqadd z31.d, z31.d, #65280 +// CHECK-ENCODING: [0xff,0xff,0xe5,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff ff e5 25 Index: test/MC/AArch64/SVE/uqdecd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqdecd-diagnostics.s +++ test/MC/AArch64/SVE/uqdecd-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: uqdecd x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +uqdecd z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdecd z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +uqdecd z0.d, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdecd z0.d, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +uqdecd z0.d, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdecd z0.d, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqdecd.s =================================================================== --- test/MC/AArch64/SVE/uqdecd.s +++ test/MC/AArch64/SVE/uqdecd.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xff,0xf0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 ff f0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdecd z0.d +// CHECK-INST: uqdecd z0.d +// CHECK-ENCODING: [0xe0,0xcf,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 cf e0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdecd z0.d, pow2, mul #16 +// CHECK-INST: uqdecd z0.d, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xcc,0xef,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 cc ef 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdecd z0.d, pow2 +// CHECK-INST: uqdecd z0.d, pow2 +// CHECK-ENCODING: [0x00,0xcc,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 cc e0 04 Index: test/MC/AArch64/SVE/uqdech-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqdech-diagnostics.s +++ test/MC/AArch64/SVE/uqdech-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: uqdech x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.h, p0/z, z7.h +uqdech z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdech z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +uqdech z0.h, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdech z0.h, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +uqdech z0.h, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdech z0.h, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqdech.s =================================================================== --- test/MC/AArch64/SVE/uqdech.s +++ test/MC/AArch64/SVE/uqdech.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xff,0x70,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 ff 70 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdech z0.h +// CHECK-INST: uqdech z0.h +// CHECK-ENCODING: [0xe0,0xcf,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 cf 60 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdech z0.h, pow2, mul #16 +// CHECK-INST: uqdech z0.h, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xcc,0x6f,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 cc 6f 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdech z0.h, pow2 +// CHECK-INST: uqdech z0.h, pow2 +// CHECK-ENCODING: [0x00,0xcc,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 cc 60 04 Index: test/MC/AArch64/SVE/uqdecp-diagnostics.s =================================================================== --- /dev/null +++ test/MC/AArch64/SVE/uqdecp-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve 2>&1 < %s | FileCheck %s + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +uqdecp z0.d, p0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdecp z0.d, p0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqdecp.s =================================================================== --- test/MC/AArch64/SVE/uqdecp.s +++ test/MC/AArch64/SVE/uqdecp.s @@ -72,3 +72,19 @@ // CHECK-ENCODING: [0x00,0x80,0xeb,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 80 eb 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdecp z0.d, p0 +// CHECK-INST: uqdecp z0.d, p0 +// CHECK-ENCODING: [0x00,0x80,0xeb,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 80 eb 25 Index: test/MC/AArch64/SVE/uqdecw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqdecw-diagnostics.s +++ test/MC/AArch64/SVE/uqdecw-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: uqdecw x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.s, p0/z, z7.s +uqdecw z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdecw z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +uqdecw z0.s, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdecw z0.s, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +uqdecw z0.s, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqdecw z0.s, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqdecw.s =================================================================== --- test/MC/AArch64/SVE/uqdecw.s +++ test/MC/AArch64/SVE/uqdecw.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xff,0xb0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 ff b0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdecw z0.s +// CHECK-INST: uqdecw z0.s +// CHECK-ENCODING: [0xe0,0xcf,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 cf a0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdecw z0.s, pow2, mul #16 +// CHECK-INST: uqdecw z0.s, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xcc,0xaf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 cc af 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqdecw z0.s, pow2 +// CHECK-INST: uqdecw z0.s, pow2 +// CHECK-ENCODING: [0x00,0xcc,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 cc a0 04 Index: test/MC/AArch64/SVE/uqincd-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqincd-diagnostics.s +++ test/MC/AArch64/SVE/uqincd-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: uqincd x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +uqincd z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqincd z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +uqincd z0.d, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqincd z0.d, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +uqincd z0.d, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqincd z0.d, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqincd.s =================================================================== --- test/MC/AArch64/SVE/uqincd.s +++ test/MC/AArch64/SVE/uqincd.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xf7,0xf0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 f7 f0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqincd z0.d +// CHECK-INST: uqincd z0.d +// CHECK-ENCODING: [0xe0,0xc7,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c7 e0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqincd z0.d, pow2, mul #16 +// CHECK-INST: uqincd z0.d, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc4,0xef,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c4 ef 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqincd z0.d, pow2 +// CHECK-INST: uqincd z0.d, pow2 +// CHECK-ENCODING: [0x00,0xc4,0xe0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c4 e0 04 Index: test/MC/AArch64/SVE/uqinch-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqinch-diagnostics.s +++ test/MC/AArch64/SVE/uqinch-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: uqinch x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.h, p0/z, z7.h +uqinch z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqinch z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +uqinch z0.h, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqinch z0.h, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.h, p0/z, z7.h +uqinch z0.h, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqinch z0.h, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqinch.s =================================================================== --- test/MC/AArch64/SVE/uqinch.s +++ test/MC/AArch64/SVE/uqinch.s @@ -296,3 +296,43 @@ // CHECK-ENCODING: [0x80,0xf7,0x70,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 f7 70 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqinch z0.h +// CHECK-INST: uqinch z0.h +// CHECK-ENCODING: [0xe0,0xc7,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c7 60 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqinch z0.h, pow2, mul #16 +// CHECK-INST: uqinch z0.h, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc4,0x6f,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c4 6f 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqinch z0.h, pow2 +// CHECK-INST: uqinch z0.h, pow2 +// CHECK-ENCODING: [0x00,0xc4,0x60,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c4 60 04 Index: test/MC/AArch64/SVE/uqincp-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqincp-diagnostics.s +++ test/MC/AArch64/SVE/uqincp-diagnostics.s @@ -46,3 +46,13 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register // CHECK-NEXT: uqincp x0, p0.q // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.d, p0/z, z7.d +uqincp z0.d, p0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqincp z0.d, p0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqincp.s =================================================================== --- test/MC/AArch64/SVE/uqincp.s +++ test/MC/AArch64/SVE/uqincp.s @@ -72,3 +72,19 @@ // CHECK-ENCODING: [0x00,0x80,0xe9,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 80 e9 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqincp z0.d, p0 +// CHECK-INST: uqincp z0.d, p0 +// CHECK-ENCODING: [0x00,0x80,0xe9,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 80 e9 25 Index: test/MC/AArch64/SVE/uqincw-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqincw-diagnostics.s +++ test/MC/AArch64/SVE/uqincw-diagnostics.s @@ -79,3 +79,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK-NEXT: uqincw x0, #32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z0.s, p0/z, z7.s +uqincw z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqincw z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +uqincw z0.s, pow2, mul #16 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqincw z0.s, pow2, mul #16 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.s, p0/z, z7.s +uqincw z0.s, pow2 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqincw z0.s, pow2 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqincw.s =================================================================== --- test/MC/AArch64/SVE/uqincw.s +++ test/MC/AArch64/SVE/uqincw.s @@ -294,3 +294,43 @@ // CHECK-ENCODING: [0x80,0xf7,0xb0,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 80 f7 b0 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqincw z0.s +// CHECK-INST: uqincw z0.s +// CHECK-ENCODING: [0xe0,0xc7,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 c7 a0 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqincw z0.s, pow2, mul #16 +// CHECK-INST: uqincw z0.s, pow2, mul #16 +// CHECK-ENCODING: [0x00,0xc4,0xaf,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c4 af 04 + +movprfx z0, z7 +// CHECK-INST: movprfx z0, z7 +// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e0 bc 20 04 + +uqincw z0.s, pow2 +// CHECK-INST: uqincw z0.s, pow2 +// CHECK-ENCODING: [0x00,0xc4,0xa0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c4 a0 04 Index: test/MC/AArch64/SVE/uqsub-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uqsub-diagnostics.s +++ test/MC/AArch64/SVE/uqsub-diagnostics.s @@ -86,3 +86,25 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280] // CHECK-NEXT: uqsub z0.d, z0.d, #65536 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +uqsub z31.d, z31.d, #65280 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx +// CHECK-NEXT: uqsub z31.d, z31.d, #65280 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0.d, p0/z, z7.d +uqsub z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uqsub z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z0, z7 +uqsub z0.d, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uqsub z0.d, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uqsub.s =================================================================== --- test/MC/AArch64/SVE/uqsub.s +++ test/MC/AArch64/SVE/uqsub.s @@ -115,3 +115,19 @@ // CHECK-ENCODING: [0xff,0xff,0xe7,0x25] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff ff e7 25 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z31, z6 +// CHECK-INST: movprfx z31, z6 +// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: df bc 20 04 + +uqsub z31.d, z31.d, #65280 +// CHECK-INST: uqsub z31.d, z31.d, #65280 +// CHECK-ENCODING: [0xff,0xff,0xe7,0x25] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff ff e7 25 Index: test/MC/AArch64/SVE/uunpkhi-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uunpkhi-diagnostics.s +++ test/MC/AArch64/SVE/uunpkhi-diagnostics.s @@ -18,3 +18,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: uunpkhi z0.d, z0.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +uunpkhi z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uunpkhi z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +uunpkhi z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uunpkhi z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uunpklo-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uunpklo-diagnostics.s +++ test/MC/AArch64/SVE/uunpklo-diagnostics.s @@ -18,3 +18,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: uunpklo z0.d, z0.h // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +uunpklo z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uunpklo z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +uunpklo z31.d, z31.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uunpklo z31.d, z31.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uxtb.s =================================================================== --- test/MC/AArch64/SVE/uxtb.s +++ test/MC/AArch64/SVE/uxtb.s @@ -42,3 +42,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd1,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d1 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +uxtb z4.d, p7/m, z31.d +// CHECK-INST: uxtb z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d1 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +uxtb z4.d, p7/m, z31.d +// CHECK-INST: uxtb z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d1 04 Index: test/MC/AArch64/SVE/uxth.s =================================================================== --- test/MC/AArch64/SVE/uxth.s +++ test/MC/AArch64/SVE/uxth.s @@ -30,3 +30,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd3,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d3 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +uxth z4.d, p7/m, z31.d +// CHECK-INST: uxth z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d3 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +uxth z4.d, p7/m, z31.d +// CHECK-INST: uxth z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd3,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d3 04 Index: test/MC/AArch64/SVE/uxtw.s =================================================================== --- test/MC/AArch64/SVE/uxtw.s +++ test/MC/AArch64/SVE/uxtw.s @@ -18,3 +18,31 @@ // CHECK-ENCODING: [0xff,0xbf,0xd5,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff bf d5 04 + + +// --------------------------------------------------------------------------// +// Test compatibility with MOVPRFX instruction. + +movprfx z4.d, p7/z, z6.d +// CHECK-INST: movprfx z4.d, p7/z, z6.d +// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 3c d0 04 + +uxtw z4.d, p7/m, z31.d +// CHECK-INST: uxtw z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd5,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d5 04 + +movprfx z4, z6 +// CHECK-INST: movprfx z4, z6 +// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: c4 bc 20 04 + +uxtw z4.d, p7/m, z31.d +// CHECK-INST: uxtw z4.d, p7/m, z31.d +// CHECK-ENCODING: [0xe4,0xbf,0xd5,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: e4 bf d5 04 Index: test/MC/AArch64/SVE/uzp1-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uzp1-diagnostics.s +++ test/MC/AArch64/SVE/uzp1-diagnostics.s @@ -41,3 +41,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: uzp1 p1.s, p2.s, z3.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +uzp1 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uzp1 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +uzp1 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uzp1 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/uzp2-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/uzp2-diagnostics.s +++ test/MC/AArch64/SVE/uzp2-diagnostics.s @@ -41,3 +41,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: uzp2 p1.s, p2.s, z3.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +uzp2 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uzp2 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +uzp2 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: uzp2 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/zip1-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/zip1-diagnostics.s +++ test/MC/AArch64/SVE/zip1-diagnostics.s @@ -41,3 +41,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: zip1 p1.s, p2.s, z3.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +zip1 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: zip1 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +zip1 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: zip1 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/zip2-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/zip2-diagnostics.s +++ test/MC/AArch64/SVE/zip2-diagnostics.s @@ -41,3 +41,19 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: zip2 p1.s, p2.s, z3.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Negative tests for instructions that are incompatible with movprfx + +movprfx z31.d, p0/z, z6.d +zip2 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: zip2 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +movprfx z31, z6 +zip2 z31.d, z31.d, z31.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov +// CHECK-NEXT: zip2 z31.d, z31.d, z31.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: