Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp
===================================================================
--- lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -83,6 +83,13 @@
     InitialFeatures = Features;
   }
 
+  void resetToInitialValues() {
+    aTReg = 1;
+    reorder = true;
+    macro = true;
+    CurrentFeatures = InitialFeatures;
+  }
+
 private:
   unsigned aTReg;
   bool reorder;
@@ -185,6 +192,7 @@
   const MCExpr *evaluateRelocExpr(const MCExpr *Expr, StringRef RelocStr);
 
   bool isEvaluated(const MCExpr *Expr);
+  bool parseSetMips0Directive();
   bool parseSetFeature(uint64_t Feature);
   bool parseDirectiveCPLoad(SMLoc Loc);
   bool parseDirectiveCPSetup();
@@ -2733,6 +2741,19 @@
   return false;
 }
 
+bool MipsAsmParser::parseSetMips0Directive() {
+  Parser.Lex();
+  if (getLexer().isNot(AsmToken::EndOfStatement))
+    return reportParseError("unexpected token, expected end of statement");
+
+  // Reset assembler options to their initial values.
+  AssemblerOptions.top()->resetToInitialValues();
+  setAvailableFeatures(MipsAssemblerOptions::getInitialFeatures());
+
+  getTargetStreamer().emitDirectiveSetMips0();
+  return false;
+}
+
 bool MipsAsmParser::parseSetFeature(uint64_t Feature) {
   Parser.Lex();
   if (getLexer().isNot(AsmToken::EndOfStatement))
@@ -2946,6 +2967,8 @@
     return false;
   } else if (Tok.getString() == "micromips") {
     return parseSetFeature(Mips::FeatureMicroMips);
+  } else if (Tok.getString() == "mips0") {
+    return parseSetMips0Directive();
   } else if (Tok.getString() == "mips1") {
     return parseSetFeature(Mips::FeatureMips1);
   } else if (Tok.getString() == "mips2") {
Index: lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
===================================================================
--- lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -56,6 +56,7 @@
 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
 }
+void MipsTargetStreamer::emitDirectiveSetMips0() {}
 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
@@ -176,6 +177,8 @@
      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
 }
 
+void MipsTargetAsmStreamer::emitDirectiveSetMips0() { OS << "\t.set\tmips0\n"; }
+
 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
   OS << "\t.set\tmips1\n";
   MipsTargetStreamer::emitDirectiveSetMips1();
Index: lib/Target/Mips/MipsTargetStreamer.h
===================================================================
--- lib/Target/Mips/MipsTargetStreamer.h
+++ lib/Target/Mips/MipsTargetStreamer.h
@@ -48,6 +48,7 @@
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
 
+  virtual void emitDirectiveSetMips0();
   virtual void emitDirectiveSetMips1();
   virtual void emitDirectiveSetMips2();
   virtual void emitDirectiveSetMips3();
@@ -149,6 +150,7 @@
   void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override;
   void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override;
 
+  void emitDirectiveSetMips0() override;
   void emitDirectiveSetMips1() override;
   void emitDirectiveSetMips2() override;
   void emitDirectiveSetMips3() override;
Index: test/MC/Mips/set-mips0-directive.s
===================================================================
--- /dev/null
+++ test/MC/Mips/set-mips0-directive.s
@@ -0,0 +1,49 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa | \
+# RUN: FileCheck %s
+# FIXME: Also test resetting of .set macro/nomacro option.
+
+    .text
+    rotr        $7, $7, 22
+    addvi.h     $w26, $w17, 4
+    lw          $1, 65536($1)
+    b           1332
+
+    .set mips32r6               # Test if the ISA is reset correctly.
+    .set nomsa                  # Test if the ASE is reset correctly.
+    mod         $2, $4, $6
+    .set at=$3                  # Test if the $at register is reset correctly.
+    lw          $1, 65536($1)
+    .set noreorder              # Test if reordering reset correctly.
+    b           3000
+
+    .set mips0
+    rotr        $2, $2, 15
+    addvi.b     $w14, $w12, 14
+    lw          $1, 65536($1)
+    b           2464
+
+# CHECK: rotr     $7, $7, 22
+# CHECK: addvi.h  $w26, $w17, 4
+# CHECK: lui      $1, 1
+# CHECK: addu     $1, $1, $1
+# CHECK: lw       $1, 0($1)
+# CHECK: b        1332
+# CHECK: nop
+
+# CHECK: .set     mips32r6
+# CHECK: .set     nomsa
+# CHECK: mod      $2, $4, $6
+# CHECK: lui      $3, 1
+# CHECK: addu     $3, $3, $1
+# CHECK: lw       $1, 0($3)
+# CHECK: b        3000
+# CHECK-NOT: nop
+
+# CHECK: .set     mips0
+# CHECK: rotr     $2, $2, 15
+# CHECK: addvi.b  $w14, $w12, 14
+# CHECK: lui      $1, 1
+# CHECK: addu     $1, $1, $1
+# CHECK: lw       $1, 0($1)
+# CHECK: b        2464
+# CHECK: nop