Index: lib/CodeGen/SelectionDAG/TargetLowering.cpp =================================================================== --- lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1187,6 +1187,7 @@ bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT); bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32); if ((OpVTLegal || i32Legal) && VT.isSimple() && + Op.getOperand(0).getValueType() != MVT::f16 && Op.getOperand(0).getValueType() != MVT::f128) { // Cannot eliminate/lower SHL for f128 yet. EVT Ty = OpVTLegal ? VT : MVT::i32; Index: test/CodeGen/Generic/pr38038.ll =================================================================== --- test/CodeGen/Generic/pr38038.ll +++ test/CodeGen/Generic/pr38038.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s +; PR38038 + +define i8 @crash(half) { +entry: + %1 = bitcast half %0 to i16 + %.lobit = lshr i16 %1, 15 + %2 = trunc i16 %.lobit to i8 + ret i8 %2 +}