Index: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td =================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td +++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td @@ -894,7 +894,7 @@ (PseudoCVT_D64_L GPR64Opnd:$src)>, FGR_64; def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), - (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS3, FGR_64; + (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS2, FGR_64; def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src), (TRUNC_L_S FGR32Opnd:$src)>, ISA_MIPS2, FGR_64; def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), Index: llvm/trunk/test/CodeGen/Mips/double2int.ll =================================================================== --- llvm/trunk/test/CodeGen/Mips/double2int.ll +++ llvm/trunk/test/CodeGen/Mips/double2int.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=mips < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s define i32 @f1(double %d) nounwind readnone { entry: