Index: lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- lib/Target/ARM/ARMISelLowering.cpp
+++ lib/Target/ARM/ARMISelLowering.cpp
@@ -12529,34 +12529,7 @@
       return R;
   }
 
-  // Simplify
-  //   mov     r1, r0
-  //   cmp     r1, x
-  //   mov     r0, y
-  //   moveq   r0, x
-  // to
-  //   cmp     r0, x
-  //   movne   r0, y
-  //
-  //   mov     r1, r0
-  //   cmp     r1, x
-  //   mov     r0, x
-  //   movne   r0, y
-  // to
-  //   cmp     r0, x
-  //   movne   r0, y
-  /// FIXME: Turn this into a target neutral optimization?
   SDValue Res;
-  if (CC == ARMCC::NE && FalseVal == RHS && FalseVal != LHS) {
-    Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc,
-                      N->getOperand(3), Cmp);
-  } else if (CC == ARMCC::EQ && TrueVal == RHS) {
-    SDValue ARMcc;
-    SDValue NewCmp = getARMCmp(LHS, RHS, ISD::SETNE, ARMcc, DAG, dl);
-    Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc,
-                      N->getOperand(3), NewCmp);
-  }
-
   // (cmov F T ne CPSR (cmpz (cmov 0 1 CC CPSR Cmp) 0))
   // -> (cmov F T CC CPSR Cmp)
   if (CC == ARMCC::NE && LHS.getOpcode() == ARMISD::CMOV && LHS->hasOneUse()) {
Index: test/CodeGen/ARM/select.ll
===================================================================
--- test/CodeGen/ARM/select.ll
+++ test/CodeGen/ARM/select.ll
@@ -142,3 +142,20 @@
   ret float %2
 }
 
+; CHECK-LABEL: f13
+; CHECK: ldr
+; CHECK: ldr
+; CHECK: cmp
+; CHECK: moveq r0, r1
+; CHECK: mov pc
+define i16 @f13(i8* %arg0, i16* %arg1) {
+entry:
+  %0 = load i8, i8* %arg0
+  %conv = zext i8 %0 to i16
+  %conv1 = zext i8 %0 to i32
+  %1 = load i16, i16* %arg1
+  %conv2 = zext i16 %1 to i32
+  %cmp = icmp eq i32 %conv1, %conv2
+  %res = select i1 %cmp, i16 %1, i16 %conv
+  ret i16 %res
+}