Index: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp =================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -3154,8 +3154,8 @@ if (NoOp0WrapProblem && ICmpInst::isSigned(Pred)) { Value *X; if (match(BO0, m_Neg(m_Value(X)))) - if (ConstantInt *RHSC = dyn_cast(Op1)) - if (!RHSC->isMinValue(/*isSigned=*/true)) + if (Constant *RHSC = dyn_cast(Op1)) + if (RHSC->isNotMinSignedValue()) return new ICmpInst(I.getSwappedPredicate(), X, ConstantExpr::getNeg(RHSC)); } Index: llvm/trunk/test/Transforms/InstCombine/abs_abs.ll =================================================================== --- llvm/trunk/test/Transforms/InstCombine/abs_abs.ll +++ llvm/trunk/test/Transforms/InstCombine/abs_abs.ll @@ -332,12 +332,9 @@ define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) { ; CHECK-LABEL: @abs_abs_x02_vec( ; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer ; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer -; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]] -; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]] -; CHECK-NEXT: ret <2 x i32> [[COND18]] +; CHECK-NEXT: ret <2 x i32> [[COND]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, @@ -669,14 +666,9 @@ define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @nabs_nabs_x01_vec( ; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer ; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]] -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer -; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]] -; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]] -; CHECK-NEXT: ret <2 x i32> [[COND18]] -; - +; CHECK-NEXT: ret <2 x i32> [[COND]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, @@ -1008,12 +1000,9 @@ define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @abs_nabs_x01_vec( ; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]] -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer -; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]] -; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]] -; CHECK-NEXT: ret <2 x i32> [[COND18]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer +; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] +; CHECK-NEXT: ret <2 x i32> [[COND]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, @@ -1345,13 +1334,9 @@ define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) { ; CHECK-LABEL: @nabs_abs_x01_vec( ; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], -; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer -; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]] -; CHECK-NEXT: [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]] -; CHECK-NEXT: ret <2 x i32> [[COND18]] -; +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer +; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]] +; CHECK-NEXT: ret <2 x i32> [[COND]] ; %sub = sub nsw <2 x i32> zeroinitializer, %x %cmp = icmp sgt <2 x i32> %sub, Index: llvm/trunk/test/Transforms/InstCombine/icmp.ll =================================================================== --- llvm/trunk/test/Transforms/InstCombine/icmp.ll +++ llvm/trunk/test/Transforms/InstCombine/icmp.ll @@ -3341,3 +3341,16 @@ ret <2 x i1> %res } +; fold (icmp pred (sub (0, X)) C1) for vec type +define <2 x i32> @Op1Negated_Vec(<2 x i32> %x) { +; CHECK-LABEL: @Op1Negated_Vec( +; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer +; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]] +; CHECK-NEXT: ret <2 x i32> [[COND]] +; + %sub = sub nsw <2 x i32> zeroinitializer, %x + %cmp = icmp sgt <2 x i32> %sub, + %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x + ret <2 x i32> %cond +}