Index: lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
===================================================================
--- lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -243,15 +243,6 @@
     Res = tryDecodeInst(DecoderTableGFX964, MI, QW, Address);
   } while (false);
 
-  if (Res && (MI.getOpcode() == AMDGPU::V_MAC_F32_e64_vi ||
-              MI.getOpcode() == AMDGPU::V_MAC_F32_e64_si ||
-              MI.getOpcode() == AMDGPU::V_MAC_F16_e64_vi ||
-              MI.getOpcode() == AMDGPU::V_FMAC_F32_e64_vi)) {
-    // Insert dummy unused src2_modifiers.
-    insertNamedMCOperand(MI, MCOperand::createImm(0),
-                         AMDGPU::OpName::src2_modifiers);
-  }
-
   if (Res && (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::MIMG)) {
     Res = convertMIMGInst(MI);
   }
Index: lib/Target/AMDGPU/VOPInstructions.td
===================================================================
--- lib/Target/AMDGPU/VOPInstructions.td
+++ lib/Target/AMDGPU/VOPInstructions.td
@@ -143,6 +143,8 @@
   let isPseudo = 0;
   let isCodeGenOnly = 0;
   let UseNamedOperandTable = 1;
+  // Leave a gap when decoding a vop3 mac for the missing src2 modifiers.
+  let hasDummyOperands = 1;
 
   let Constraints     = ps.Constraints;
   let DisableEncoding = ps.DisableEncoding;