[AArch64] Add support for SHF_ARM_PURECODE.

[ivanlozano]

Summary

Adds support for the execute-only section flag SHF_ARM_PURECODE on AArch64 targets.

[ruiu]

ELF/OutputSections.cpp

46

Please format using clang-format-diff.

test/ELF/aarch64-execute-only.s

10

Do you actually need a newline character after ;? If not, please remove \ and the following newline character.

If you have to include a newline character, please do:

echo foo > %t.s
echo next line >> %t.s

because this is less error-prone.

22–36

I don't think you need to verify these conditions.

[peter.smith]

I've left a comment about the ABI problems with using SHF_ARM_PURECODE. I've raised an issue to support execute only on AArch64 with the ABI team at Arm.

ELF/OutputSections.cpp

47

As mentioned in D48791 SHF_ARM_PURECODE is defined in the SHF_MASKPROC space and is currently defined for ARM Processor so we shouldn't be using that flag when the machine isn't EM_ARM. I think it is highly likely that a SHF_AARCH64_PURECODE flag gets defined. When that arises this code might be best extracted into a function such as isExecuteOnly(Flags) so that this becomes:

if (!isExecuteOnly(Flags))
  Ret |= PF_R;

[ivanlozano]

Alternative solution committed: rL338271

ELF/OutputSections.cpp

 OutputSection *Out::PreinitArray;
 OutputSection *Out::InitArray;
 OutputSection *Out::FiniArray;
 
 std::vector<OutputSection *> elf::OutputSections;
 
 uint32_t OutputSection::getPhdrFlags() const {
   uint32_t Ret = 0;
-  if (Config->EMachine != EM_ARM || !(Flags & SHF_ARM_PURECODE))
+  if ((Config->EMachine != EM_ARM && Config->EMachine != EM_AARCH64 ) ||
+      !(Flags & SHF_ARM_PURECODE))
     Ret |= PF_R;
   if (Flags & SHF_WRITE)
     Ret |= PF_W;
   if (Flags & SHF_EXECINSTR)
     Ret |= PF_X;
   return Ret;
 }
 
if (Type != IS->Type) {
               "\n>>> output section " + Name + ": " +
               getELFSectionTypeName(Config->EMachine, Type));
       Type = SHT_PROGBITS;
     }
   }
 
   IS->Parent = this;
   uint64_t AndMask =
-      Config->EMachine == EM_ARM ? (uint64_t)SHF_ARM_PURECODE : 0;
+      (Config->EMachine == EM_ARM ||
+       Config->EMachine == EM_AARCH64) ? (uint64_t)SHF_ARM_PURECODE : 0;
   uint64_t OrMask = ~AndMask;
   uint64_t AndFlags = (Flags & IS->Flags) & AndMask;
   uint64_t OrFlags = (Flags | IS->Flags) & OrMask;
   Flags = AndFlags | OrFlags;
 
   Alignment = std::max(Alignment, IS->Alignment);
 
   // If this section contains a table of fixed-size entries, sh_entsize

test/ELF/aarch64-execute-only.s

+// REQUIRES: aarch64
+
+// RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %s -o %t.o
+// RUN: ld.lld %t.o -o %t.so -shared
+// RUN: llvm-readelf -l %t.so | FileCheck %s
+
+// RUN: ld.lld %t.o %t.o -o %t.so -shared
+// RUN: llvm-readelf -l %t.so | FileCheck %s
+
+// RUN: echo ".section .foo,\"ax\"; \
+// RUN:       br lr" > %t.s
+// RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %t.s -o %t2.o
+// RUN: ld.lld %t.o %t2.o -o %t.so -shared
+// RUN: llvm-readelf -l %t.so | FileCheck --check-prefix=DIFF %s
+
+// CHECK-NOT:  LOAD
+// CHECK:      LOAD           0x000000 0x0000000000000000 0x0000000000000000 0x000245 0x000245 R   0x10000
+// CHECK:      LOAD           0x010000 0x0000000000010000 0x0000000000010000 0x{{.*}} 0x{{.*}} R E 0x10000
+// CHECK:      LOAD           0x020000 0x0000000000020000 0x0000000000020000 0x{{.*}} 0x{{.*}}   E 0x10000
+// CHECK:      LOAD           0x030000 0x0000000000030000 0x0000000000030000 0x000070 0x000070 RW  0x10000
+// CHECK-NOT:  LOAD
+
+// CHECK: 01     .dynsym .gnu.hash .hash .dynstr
+// CHECK: 02     .text
+// CHECK: 03     .foo
+// CHECK: 04     .dynamic
+
+// DIFF-NOT:  LOAD
+// DIFF:      LOAD           0x000000 0x0000000000000000 0x0000000000000000 0x00020d 0x00020d R   0x10000
+// DIFF:      LOAD           0x010000 0x0000000000010000 0x0000000000010000 0x00000c 0x00000c R E 0x10000
+// DIFF:      LOAD           0x020000 0x0000000000020000 0x0000000000020000 0x000070 0x000070 RW  0x10000
+// DIFF-NOT:  LOAD
+
+// DIFF: 01     .dynsym .gnu.hash .hash .dynstr
+// DIFF: 02     .text .foo
+// DIFF: 03     .dynamic
+
+        br lr
+        .section .foo,"axy"
+        br lr