Index: lib/CodeGen/PPCGCodeGeneration.cpp =================================================================== --- lib/CodeGen/PPCGCodeGeneration.cpp +++ lib/CodeGen/PPCGCodeGeneration.cpp @@ -578,8 +578,9 @@ /// Insert function calls to retrieve the SPIR group/local ids. /// - /// @param The kernel to generate the function calls for. - void insertKernelCallsSPIR(ppcg_kernel *Kernel); + /// @param Kernel The kernel to generate the function calls for. + /// @param SizeTypeIs64Bit Whether size_t of the openCl device is 64bit. + void insertKernelCallsSPIR(ppcg_kernel *Kernel, bool SizeTypeIs64bit); /// Setup the creation of functions referenced by the GPU kernel. /// @@ -2097,7 +2098,8 @@ } } -void GPUNodeBuilder::insertKernelCallsSPIR(ppcg_kernel *Kernel) { +void GPUNodeBuilder::insertKernelCallsSPIR(ppcg_kernel *Kernel, + bool SizeTypeIs64bit) { const char *GroupName[3] = {"__gen_ocl_get_group_id0", "__gen_ocl_get_group_id1", "__gen_ocl_get_group_id2"}; @@ -2105,8 +2107,11 @@ const char *LocalName[3] = {"__gen_ocl_get_local_id0", "__gen_ocl_get_local_id1", "__gen_ocl_get_local_id2"}; + IntegerType *SizeT = + SizeTypeIs64bit ? Builder.getInt64Ty() : Builder.getInt32Ty(); - auto createFunc = [this](const char *Name, __isl_take isl_id *Id) mutable { + auto createFunc = [this](const char *Name, __isl_take isl_id *Id, + IntegerType *SizeT) mutable { Module *M = Builder.GetInsertBlock()->getParent()->getParent(); Function *FN = M->getFunction(Name); @@ -2114,22 +2119,23 @@ if (!FN) { GlobalValue::LinkageTypes Linkage = Function::ExternalLinkage; std::vector Args; - FunctionType *Ty = FunctionType::get(Builder.getInt32Ty(), Args, false); + FunctionType *Ty = FunctionType::get(SizeT, Args, false); FN = Function::Create(Ty, Linkage, Name, M); FN->setCallingConv(CallingConv::SPIR_FUNC); } Value *Val = Builder.CreateCall(FN, {}); - Val = Builder.CreateIntCast(Val, Builder.getInt64Ty(), false, Name); + if (SizeT == Builder.getInt32Ty()) + Val = Builder.CreateIntCast(Val, Builder.getInt64Ty(), false, Name); IDToValue[Id] = Val; KernelIDs.insert(std::unique_ptr(Id)); }; for (int i = 0; i < Kernel->n_grid; ++i) - createFunc(GroupName[i], isl_id_list_get_id(Kernel->block_ids, i)); + createFunc(GroupName[i], isl_id_list_get_id(Kernel->block_ids, i), SizeT); for (int i = 0; i < Kernel->n_block; ++i) - createFunc(LocalName[i], isl_id_list_get_id(Kernel->thread_ids, i)); + createFunc(LocalName[i], isl_id_list_get_id(Kernel->thread_ids, i), SizeT); } void GPUNodeBuilder::prepareKernelArguments(ppcg_kernel *Kernel, Function *FN) { @@ -2307,8 +2313,10 @@ insertKernelIntrinsics(Kernel); break; case GPUArch::SPIR32: + insertKernelCallsSPIR(Kernel, false); + break; case GPUArch::SPIR64: - insertKernelCallsSPIR(Kernel); + insertKernelCallsSPIR(Kernel, true); break; } } Index: test/GPGPU/spir-typesize.ll =================================================================== --- /dev/null +++ test/GPGPU/spir-typesize.ll @@ -0,0 +1,90 @@ +; RUN: opt %loadPolly -O3 -polly -polly-target=gpu \ +; RUN: -polly-gpu-arch=spir64 \ +; RUN: -polly-acc-dump-kernel-ir -polly-process-unprofitable -disable-output < %s | \ +; RUN: FileCheck -check-prefix=I64 %s + +; RUN: opt %loadPolly -O3 -polly -polly-target=gpu \ +; RUN: -polly-gpu-arch=spir32 \ +; RUN: -polly-acc-dump-kernel-ir -polly-process-unprofitable -disable-output < %s | \ +; RUN: FileCheck -check-prefix=I32 %s + +; REQUIRES pollyacc + +; This test case checks whether the openCl runtime functions (get_local_id/get_group_id) return the right types for 32 and 64bit devices. + +; I32: target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024" +; I32-NEXT: target triple = "spir-unknown-unknown" + +; I32-LABEL: define spir_kernel void @FUNC_double_parallel_loop_SCOP_0_KERNEL_0(i8 addrspace(1)* %MemRef_A) #0 !kernel_arg_addr_space !0 !kernel_arg_name !1 !kernel_arg_access_qual !1 !kernel_arg_type !1 !kernel_arg_type_qual !1 !kernel_arg_base_type !1 { +; I32-NEXT: entry: +; I32-NEXT: %0 = call i32 @__gen_ocl_get_group_id0() +; I32-NEXT: %__gen_ocl_get_group_id0 = zext i32 %0 to i64 +; I32-NEXT: %1 = call i32 @__gen_ocl_get_group_id1() +; I32-NEXT: %__gen_ocl_get_group_id1 = zext i32 %1 to i64 +; I32-NEXT: %2 = call i32 @__gen_ocl_get_local_id0() +; I32-NEXT: %__gen_ocl_get_local_id0 = zext i32 %2 to i64 +; I32-NEXT: %3 = call i32 @__gen_ocl_get_local_id1() +; I32-NEXT: %__gen_ocl_get_local_id1 = zext i32 %3 to i64 +; I32-NEXT: br label %polly.loop_preheader + +; I64: target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024" +; I64-next: target triple = "spir64-unknown-unknown" + +; I64-LABEL: define spir_kernel void @FUNC_double_parallel_loop_SCOP_0_KERNEL_0(i8 addrspace(1)* %MemRef_A) #0 !kernel_arg_addr_space !0 !kernel_arg_name !1 !kernel_arg_access_qual !1 !kernel_arg_type !1 !kernel_arg_type_qual !1 !kernel_arg_base_type !1 { +; I64-NEXT: entry: +; I64-NEXT: %0 = call i64 @__gen_ocl_get_group_id0() +; I64-NEXT: %1 = call i64 @__gen_ocl_get_group_id1() +; I64-NEXT: %2 = call i64 @__gen_ocl_get_local_id0() +; I64-NEXT: %3 = call i64 @__gen_ocl_get_local_id1() +; I64-NEXT: br label %polly.loop_preheader + + +; void double_parallel_loop(float A[][1024]) { +; for (long i = 0; i < 1024; i++) +; for (long j = 0; j < 1024; j++) +; A[i][j] += i * j; +; } +; + +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" + +define void @double_parallel_loop([1024 x float]* %A) { +bb: + br label %bb2 + +bb2: ; preds = %bb13, %bb + %i.0 = phi i64 [ 0, %bb ], [ %tmp14, %bb13 ] + %exitcond1 = icmp ne i64 %i.0, 1024 + br i1 %exitcond1, label %bb3, label %bb15 + +bb3: ; preds = %bb2 + br label %bb4 + +bb4: ; preds = %bb10, %bb3 + %j.0 = phi i64 [ 0, %bb3 ], [ %tmp11, %bb10 ] + %exitcond = icmp ne i64 %j.0, 1024 + br i1 %exitcond, label %bb5, label %bb12 + +bb5: ; preds = %bb4 + %tmp = mul nuw nsw i64 %i.0, %j.0 + %tmp6 = sitofp i64 %tmp to float + %tmp7 = getelementptr inbounds [1024 x float], [1024 x float]* %A, i64 %i.0, i64 %j.0 + %tmp8 = load float, float* %tmp7, align 4 + %tmp9 = fadd float %tmp8, %tmp6 + store float %tmp9, float* %tmp7, align 4 + br label %bb10 + +bb10: ; preds = %bb5 + %tmp11 = add nuw nsw i64 %j.0, 1 + br label %bb4 + +bb12: ; preds = %bb4 + br label %bb13 + +bb13: ; preds = %bb12 + %tmp14 = add nuw nsw i64 %i.0, 1 + br label %bb2 + +bb15: ; preds = %bb2 + ret void +}