Index: llvm/trunk/include/llvm/CodeGen/TargetLowering.h =================================================================== --- llvm/trunk/include/llvm/CodeGen/TargetLowering.h +++ llvm/trunk/include/llvm/CodeGen/TargetLowering.h @@ -748,10 +748,10 @@ /// operations don't trap except for integer divide and remainder. virtual bool canOpTrap(unsigned Op, EVT VT) const; - /// Similar to isShuffleMaskLegal. This is used by Targets can use this to - /// indicate if there is a suitable VECTOR_SHUFFLE that can be used to replace - /// a VAND with a constant pool entry. - virtual bool isVectorClearMaskLegal(const SmallVectorImpl &/*Mask*/, + /// Similar to isShuffleMaskLegal. Targets can use this to indicate if there + /// is a suitable VECTOR_SHUFFLE that can be used to replace a VAND with a + /// constant pool entry. + virtual bool isVectorClearMaskLegal(ArrayRef /*Mask*/, EVT /*VT*/) const { return false; } Index: llvm/trunk/lib/Target/X86/X86ISelLowering.h =================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h @@ -993,11 +993,10 @@ /// be legal. bool isShuffleMaskLegal(ArrayRef Mask, EVT VT) const override; - /// Similar to isShuffleMaskLegal. This is used by Targets can use this to - /// indicate if there is a suitable VECTOR_SHUFFLE that can be used to - /// replace a VAND with a constant pool entry. - bool isVectorClearMaskLegal(const SmallVectorImpl &Mask, - EVT VT) const override; + /// Similar to isShuffleMaskLegal. Targets can use this to indicate if there + /// is a suitable VECTOR_SHUFFLE that can be used to replace a VAND with a + /// constant pool entry. + bool isVectorClearMaskLegal(ArrayRef Mask, EVT VT) const override; /// Returns true if lowering to a jump table is allowed. bool areJTsAllowed(const Function *Fn) const override; Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp @@ -26331,9 +26331,8 @@ return isTypeLegal(VT.getSimpleVT()); } -bool -X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl &Mask, - EVT VT) const { +bool X86TargetLowering::isVectorClearMaskLegal(ArrayRef Mask, + EVT VT) const { // Don't convert an 'and' into a shuffle that we don't directly support. // vpblendw and vpshufb for 256-bit vectors are not available on AVX1. if (!Subtarget.hasAVX2())