Index: llvm/trunk/include/llvm/ADT/Triple.h =================================================================== --- llvm/trunk/include/llvm/ADT/Triple.h +++ llvm/trunk/include/llvm/ADT/Triple.h @@ -658,6 +658,21 @@ return getArch() == Triple::aarch64 || getArch() == Triple::aarch64_be; } + /// Tests whether the target is MIPS 32-bit (little and big endian). + bool isMIPS32() const { + return getArch() == Triple::mips || getArch() == Triple::mipsel; + } + + /// Tests whether the target is MIPS 64-bit (little and big endian). + bool isMIPS64() const { + return getArch() == Triple::mips64 || getArch() == Triple::mips64el; + } + + /// Tests whether the target is MIPS (little and big endian, 32- or 64-bit). + bool isMIPS() const { + return isMIPS32() || isMIPS64(); + } + /// Tests whether the target supports comdat bool supportsCOMDAT() const { return !isOSBinFormatMachO(); Index: llvm/trunk/lib/Analysis/TargetLibraryInfo.cpp =================================================================== --- llvm/trunk/lib/Analysis/TargetLibraryInfo.cpp +++ llvm/trunk/lib/Analysis/TargetLibraryInfo.cpp @@ -85,8 +85,7 @@ } // Mips, on the other hand, needs signext on i32 parameters corresponding // to both signed and unsigned ints. - if (T.getArch() == Triple::mips || T.getArch() == Triple::mipsel || - T.getArch() == Triple::mips64 || T.getArch() == Triple::mips64el) { + if (T.isMIPS()) { ShouldSignExtI32Param = true; } TLI.setShouldExtI32Param(ShouldExtI32Param); Index: llvm/trunk/lib/MC/MCObjectFileInfo.cpp =================================================================== --- llvm/trunk/lib/MC/MCObjectFileInfo.cpp +++ llvm/trunk/lib/MC/MCObjectFileInfo.cpp @@ -529,8 +529,7 @@ // MIPS .debug_* sections should have SHT_MIPS_DWARF section type // to distinguish among sections contain DWARF and ECOFF debug formats. // Sections with ECOFF debug format are obsoleted and marked by SHT_PROGBITS. - if (T.getArch() == Triple::mips || T.getArch() == Triple::mipsel || - T.getArch() == Triple::mips64 || T.getArch() == Triple::mips64el) + if (T.isMIPS()) DebugSecType = ELF::SHT_MIPS_DWARF; // Debug Info Sections. Index: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -513,11 +513,7 @@ CpRestoreOffset = -1; const Triple &TheTriple = sti.getTargetTriple(); - if ((TheTriple.getArch() == Triple::mips) || - (TheTriple.getArch() == Triple::mips64)) - IsLittleEndian = false; - else - IsLittleEndian = true; + IsLittleEndian = TheTriple.isLittleEndian(); if (getSTI().getCPU() == "mips64r6" && inMicroMipsMode()) report_fatal_error("microMIPS64R6 is not supported", false); Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp @@ -57,7 +57,7 @@ return MipsABIInfo::N64(); assert(Options.getABIName().empty() && "Unknown ABI option for MIPS"); - if (TT.getArch() == Triple::mips64 || TT.getArch() == Triple::mips64el) + if (TT.isMIPS64()) return MipsABIInfo::N64(); return MipsABIInfo::O32(); } Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -21,16 +21,14 @@ MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { IsLittleEndian = TheTriple.isLittleEndian(); - if ((TheTriple.getArch() == Triple::mips64el) || - (TheTriple.getArch() == Triple::mips64)) { + if (TheTriple.isMIPS64()) { CodePointerSize = CalleeSaveStackSlotSize = 8; } // FIXME: This condition isn't quite right but it's the best we can do until // this object can identify the ABI. It will misbehave when using O32 // on a mips64*-* triple. - if ((TheTriple.getArch() == Triple::mipsel) || - (TheTriple.getArch() == Triple::mips)) { + if (TheTriple.isMIPS32()) { PrivateGlobalPrefix = "$"; PrivateLabelPrefix = "$"; } @@ -54,8 +52,7 @@ HasMipsExpressions = true; // Enable IAS by default for O32. - if (TheTriple.getArch() == Triple::mips || - TheTriple.getArch() == Triple::mipsel) + if (TheTriple.isMIPS32()) UseIntegratedAssembler = true; // Enable IAS by default for Debian mips64/mips64el. Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -47,7 +47,7 @@ /// FIXME: Merge with the copy in MipsSubtarget.cpp StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { if (CPU.empty() || CPU == "generic") { - if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel) + if (TT.isMIPS32()) CPU = "mips32"; else CPU = "mips64"; Index: llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp =================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp +++ llvm/trunk/lib/Transforms/Instrumentation/AddressSanitizer.cpp @@ -493,10 +493,8 @@ bool IsSystemZ = TargetTriple.getArch() == Triple::systemz; bool IsX86 = TargetTriple.getArch() == Triple::x86; bool IsX86_64 = TargetTriple.getArch() == Triple::x86_64; - bool IsMIPS32 = TargetTriple.getArch() == Triple::mips || - TargetTriple.getArch() == Triple::mipsel; - bool IsMIPS64 = TargetTriple.getArch() == Triple::mips64 || - TargetTriple.getArch() == Triple::mips64el; + bool IsMIPS32 = TargetTriple.isMIPS32(); + bool IsMIPS64 = TargetTriple.isMIPS64(); bool IsArmOrThumb = TargetTriple.isARM() || TargetTriple.isThumb(); bool IsAArch64 = TargetTriple.getArch() == Triple::aarch64; bool IsWindows = TargetTriple.isOSWindows(); Index: llvm/trunk/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp =================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp +++ llvm/trunk/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp @@ -539,8 +539,7 @@ bool DataFlowSanitizer::doInitialization(Module &M) { Triple TargetTriple(M.getTargetTriple()); bool IsX86_64 = TargetTriple.getArch() == Triple::x86_64; - bool IsMIPS64 = TargetTriple.getArch() == Triple::mips64 || - TargetTriple.getArch() == Triple::mips64el; + bool IsMIPS64 = TargetTriple.isMIPS64(); bool IsAArch64 = TargetTriple.getArch() == Triple::aarch64 || TargetTriple.getArch() == Triple::aarch64_be; Index: llvm/trunk/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp =================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp +++ llvm/trunk/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp @@ -537,7 +537,7 @@ bool EfficiencySanitizer::initOnModule(Module &M) { Triple TargetTriple(M.getTargetTriple()); - if (TargetTriple.getArch() == Triple::mips64 || TargetTriple.getArch() == Triple::mips64el) + if (TargetTriple.isMIPS64()) ShadowParams = ShadowParams40; else ShadowParams = ShadowParams47; Index: llvm/trunk/lib/Transforms/Instrumentation/MemorySanitizer.cpp =================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ llvm/trunk/lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -3980,8 +3980,7 @@ Triple TargetTriple(Func.getParent()->getTargetTriple()); if (TargetTriple.getArch() == Triple::x86_64) return new VarArgAMD64Helper(Func, Msan, Visitor); - else if (TargetTriple.getArch() == Triple::mips64 || - TargetTriple.getArch() == Triple::mips64el) + else if (TargetTriple.isMIPS64()) return new VarArgMIPS64Helper(Func, Msan, Visitor); else if (TargetTriple.getArch() == Triple::aarch64) return new VarArgAArch64Helper(Func, Msan, Visitor);