Index: llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td
@@ -62,6 +62,9 @@
                        Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],
                                  [IntrNoMem]>;
 
+  def int_ppc_truncf128_round_to_odd
+      : GCCBuiltin<"__builtin_truncf128_round_to_odd">,
+        Intrinsic <[llvm_double_ty], [llvm_f128_ty], [IntrNoMem]>;
   def int_ppc_sqrtf128_round_to_odd
       : GCCBuiltin<"__builtin_sqrtf128_round_to_odd">,
         Intrinsic <[llvm_f128_ty], [llvm_f128_ty], [IntrNoMem]>;
Index: llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
@@ -2555,7 +2555,10 @@
 
   // Round & Convert QP -> DP (dword[1] is set to zero)
   def XSCVQPDP  : X_VT5_XO5_VB5_VSFR<63, 20, 836, "xscvqpdp" , []>;
-  def XSCVQPDPO : X_VT5_XO5_VB5_VSFR_Ro<63, 20, 836, "xscvqpdpo", []>;
+  def XSCVQPDPO : X_VT5_XO5_VB5_VSFR_Ro<63, 20, 836, "xscvqpdpo",
+                                        [(set f64:$vT,
+                                        (int_ppc_truncf128_round_to_odd
+                                        f128:$vB))]>;
 
   // Truncate & Convert QP -> (Un)Signed (D)Word (dword[1] is set to zero)
   def XSCVQPSDZ : X_VT5_XO5_VB5<63, 25, 836, "xscvqpsdz", []>;
Index: llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
+++ llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
@@ -80,3 +80,13 @@
 
 declare fp128 @llvm.ppc.divf128.round.to.odd(fp128, fp128)
 
+define double @testTruncOdd() {
+entry:
+  %0 = load fp128, fp128* @A, align 16
+  %1 = call double @llvm.ppc.truncf128.round.to.odd(fp128 %0)
+  ret double %1
+  ; CHECK-LABEL: testTruncOdd
+  ; CHECK: xscvqpdpo
+}
+
+declare double @llvm.ppc.truncf128.round.to.odd(fp128)