Index: ELF/Writer.cpp
===================================================================
--- ELF/Writer.cpp
+++ ELF/Writer.cpp
@@ -701,10 +701,10 @@
   RF_WRITE = 1 << 15,
   RF_EXEC_WRITE = 1 << 14,
   RF_EXEC = 1 << 13,
-  RF_NON_TLS_BSS = 1 << 12,
-  RF_NON_TLS_BSS_RO = 1 << 11,
-  RF_NOT_TLS = 1 << 10,
-  RF_ALLOC_FIRST = 1 << 9,
+  RF_PROGBITS_NOT_EXEC_OR_WRITE = 1 << 12,
+  RF_NON_TLS_BSS = 1 << 11,
+  RF_NON_TLS_BSS_RO = 1 << 10,
+  RF_NOT_TLS = 1 << 9,
   RF_BSS = 1 << 8,
   RF_NOTE = 1 << 7,
   RF_PPC_NOT_TOCBSS = 1 << 6,
@@ -736,16 +736,6 @@
   if (!(Sec->Flags & SHF_ALLOC))
     return Rank | RF_NOT_ALLOC;
 
-  // Place .dynsym and .dynstr at the beginning of SHF_ALLOC
-  // sections. We want to do this to mitigate the possibility that
-  // huge .dynsym and .dynstr sections placed between ro-data and text
-  // sections cause relocation overflow.  Note: .dynstr has SHT_STRTAB
-  // type and SHF_ALLOC attribute, whereas sections that only have
-  // SHT_STRTAB but without SHF_ALLOC is placed at the end. All "Sec"
-  // reaching here has SHF_ALLOC bit set.
-  if (Sec->Type == SHT_DYNSYM || Sec->Type == SHT_STRTAB)
-    return Rank | RF_ALLOC_FIRST;
-
   // Sort sections based on their access permission in the following
   // order: R, RX, RWX, RW.  This order is based on the following
   // considerations:
@@ -764,11 +754,17 @@
   if (IsExec) {
     if (IsWrite)
       Rank |= RF_EXEC_WRITE;
-    else if (!Config->SingleRoRx)
+    else
       Rank |= RF_EXEC;
   } else {
     if (IsWrite)
       Rank |= RF_WRITE;
+    // Make non-executable and non-writable PROGBITS sections (e.g .rodata
+    // .eh_frame) closer to .text . They likely contain PC or GOT relative
+    // relocations and there could be relocation overflow if other huge sections
+    // (.dynstr .dynsym) were placed in between.
+    else if (Sec->Type == SHT_PROGBITS)
+      Rank |= RF_PROGBITS_NOT_EXEC_OR_WRITE;
   }
 
   // If we got here we know that both A and B are in the same PT_LOAD.