Index: lib/Target/Mips/MicroMipsDSPInstrFormats.td =================================================================== --- lib/Target/Mips/MicroMipsDSPInstrFormats.td +++ lib/Target/Mips/MicroMipsDSPInstrFormats.td @@ -10,7 +10,7 @@ class MMDSPInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> { let ASEPredicate = [HasDSP]; - let AdditionalPredicates = [InMicroMips]; + let EncodingPredicates = [InMicroMips]; string BaseOpcode = opstr; string Arch = "mmdsp"; let DecoderNamespace = "MicroMips"; Index: lib/Target/Mips/MicroMipsDSPInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsDSPInstrInfo.td +++ lib/Target/Mips/MicroMipsDSPInstrInfo.td @@ -417,11 +417,11 @@ NoItinerary>; let DecoderNamespace = "MicroMipsDSP", Arch = "mmdsp", - AdditionalPredicates = [HasDSP, InMicroMips] in { - def LWDSP_MM : Load<"lw", DSPROpnd, null_frag, II_LW>, DspMMRel, - LW_FM_MM<0x3f>; - def SWDSP_MM : Store<"sw", DSPROpnd, null_frag, II_SW>, DspMMRel, - LW_FM_MM<0x3e>; + EncodingPredicates = [InMicroMips], ASEPredicate = [HasDSP] in { + def LWDSP_MM : Load<"lw", DSPROpnd, null_frag, II_LW>, DspMMRel, + LW_FM_MM<0x3f>; + def SWDSP_MM : Store<"sw", DSPROpnd, null_frag, II_SW>, DspMMRel, + LW_FM_MM<0x3e>; } // Instruction defs. // microMIPS DSP Rev 1 @@ -531,7 +531,7 @@ def MULSAQ_S_W_PH_MM : DspMMRel, MULSAQ_S_W_PH_MM_ENC, MULSAQ_S_W_PH_DESC; def BITREV_MM : DspMMRel, BITREV_MM_ENC, BITREV_MM_DESC; def BPOSGE32_MM : DspMMRel, BPOSGE32_MM_ENC, BPOSGE32_MM_DESC, - ISA_MIPS1_NOT_32R6_64R6; + ISA_MICROMIPS32_NOT_MIPS32R6; def CMP_EQ_PH_MM : DspMMRel, CMP_EQ_PH_MM_ENC, CMP_EQ_PH_DESC; def CMP_LT_PH_MM : DspMMRel, CMP_LT_PH_MM_ENC, CMP_LT_PH_DESC; def CMP_LE_PH_MM : DspMMRel, CMP_LE_PH_MM_ENC, CMP_LE_PH_DESC; Index: lib/Target/Mips/MipsDSPInstrInfo.td =================================================================== --- lib/Target/Mips/MipsDSPInstrInfo.td +++ lib/Target/Mips/MipsDSPInstrInfo.td @@ -1289,7 +1289,7 @@ } let DecoderNamespace = "MipsDSP", Arch = "dsp", - AdditionalPredicates = [HasDSP] in { + ASEPredicate = [HasDSP] in { def LWDSP : Load<"lw", DSPROpnd, null_frag, II_LW>, DspMMRel, LW_FM<0x23>; def SWDSP : Store<"sw", DSPROpnd, null_frag, II_SW>, DspMMRel, LW_FM<0x2b>; }