Index: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -72,6 +72,7 @@
   case ISD::CTLZ_ZERO_UNDEF:
   case ISD::CTPOP:
   case ISD::CTTZ:
+  case ISD::CTTZ_ZERO_UNDEF:
   case ISD::FABS:
   case ISD::FCEIL:
   case ISD::FCOS:
Index: test/CodeGen/Mips/cttz-v.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Mips/cttz-v.ll
@@ -0,0 +1,37 @@
+; RUN: llc  < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32
+; RUN: llc  < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
+
+declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1)
+
+define <2 x i32> @cttzv2i32(<2 x i32> %x) {
+entry:
+; MIPS32: addiu   $1, $4, -1
+; MIPS32: not     $2, $4
+; MIPS32: and     $1, $2, $1
+; MIPS32: clz     $1, $1
+; MIPS32: addiu   $3, $zero, 32
+; MIPS32: subu    $2, $3, $1
+; MIPS32: addiu   $1, $5, -1
+; MIPS32: not     $4, $5
+; MIPS32: and     $1, $4, $1
+; MIPS32: clz     $1, $1
+; MIPS32: jr      $ra
+; MIPS32: subu    $3, $3, $1
+
+; MIPS64: addiu   $1, $4, -1
+; MIPS64: not     $2, $4
+; MIPS64: and     $1, $2, $1
+; MIPS64: clz     $1, $1
+; MIPS64: addiu   $3, $zero, 32
+; MIPS64: subu    $2, $3, $1
+; MIPS64: addiu   $1, $5, -1
+; MIPS64: not     $4, $5
+; MIPS64: and     $1, $4, $1
+; MIPS64: clz     $1, $1
+; MIPS64: jr      $ra
+; MIPS64: subu    $3, $3, $1
+
+  %ret = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 true)
+  ret <2 x i32> %ret
+}
+