Index: lib/Target/Mips/MipsFastISel.cpp
===================================================================
--- lib/Target/Mips/MipsFastISel.cpp
+++ lib/Target/Mips/MipsFastISel.cpp
@@ -6,6 +6,7 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/IR/GlobalAlias.h"
 #include "llvm/IR/GlobalVariable.h"
+#include "llvm/Support/CommandLine.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetLibraryInfo.h"
 #include "MipsRegisterInfo.h"
@@ -16,6 +17,11 @@
 
 using namespace llvm;
 
+static cl::opt<bool> PassTestSuite(
+    "mips-fast-isel-pass-test-suite", cl::init(true),
+    cl::desc("Only turn on features which currently pass test-suite"),
+    cl::Hidden);
+
 namespace {
 
 // All possible address modes.
@@ -110,7 +116,7 @@
   }
 
   MachineInstrBuilder EmitInstLoad(unsigned Opc, unsigned DstReg,
-                                      unsigned MemReg, int64_t MemOffset) {
+                                   unsigned MemReg, int64_t MemOffset) {
     return EmitInst(Opc, DstReg).addReg(MemReg).addImm(MemOffset);
   }
 
@@ -304,6 +310,8 @@
 }
 
 bool MipsFastISel::TargetSelectInstruction(const Instruction *I) {
+  if (PassTestSuite)
+    return false;
   if (!TargetSupported)
     return false;
   switch (I->getOpcode()) {
@@ -342,6 +350,8 @@
 
 unsigned MipsFastISel::MaterializeGV(const GlobalValue *GV, MVT VT) {
   // For now 32-bit only.
+  if (PassTestSuite)
+    return false;
   if (VT != MVT::i32)
     return 0;
   const TargetRegisterClass *RC = &Mips::GPR32RegClass;
@@ -361,7 +371,7 @@
   const TargetRegisterClass *RC = &Mips::GPR32RegClass;
   const ConstantInt *CI = cast<ConstantInt>(C);
   int64_t Imm;
-  if (CI->isNegative())
+  if ((VT != MVT::i1) && CI->isNegative())
     Imm = CI->getSExtValue();
   else
     Imm = CI->getZExtValue();
Index: test/CodeGen/Mips/Fast-ISel/simplestore.ll
===================================================================
--- test/CodeGen/Mips/Fast-ISel/simplestore.ll
+++ test/CodeGen/Mips/Fast-ISel/simplestore.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 -mips-fast-isel-pass-test-suite=false \
 ; RUN:     < %s | FileCheck %s
 
 @abcd = external global i32
Index: test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
===================================================================
--- test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
+++ test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 -mips-fast-isel-pass-test-suite=false \
 ; RUN:     < %s | FileCheck %s
 
 @f = common global float 0.000000e+00, align 4
Index: test/CodeGen/Mips/Fast-ISel/simplestorei.ll
===================================================================
--- test/CodeGen/Mips/Fast-ISel/simplestorei.ll
+++ test/CodeGen/Mips/Fast-ISel/simplestorei.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 -mips-fast-isel-pass-test-suite=false \
 ; RUN:     < %s | FileCheck %s
 
 @ijk = external global i32