Index: utils/TableGen/CodeGenRegisters.h =================================================================== --- utils/TableGen/CodeGenRegisters.h +++ utils/TableGen/CodeGenRegisters.h @@ -562,6 +562,9 @@ // Give each register unit set an order based on sorting criteria. std::vector RegUnitSetOrder; + // Keep track of synthesized definitions generated in TupleExpander. + std::vector> SynthDefs; + // Add RC to *2RC maps. void addToMaps(CodeGenRegisterClass*); Index: utils/TableGen/CodeGenRegisters.cpp =================================================================== --- utils/TableGen/CodeGenRegisters.cpp +++ utils/TableGen/CodeGenRegisters.cpp @@ -605,6 +605,13 @@ namespace { struct TupleExpander : SetTheory::Expander { + // Reference to SynthDefs in the containing CodeGenRegBank, to keep track of + // the synthesized definitions for their lifetime. + std::vector> &SynthDefs; + + TupleExpander(std::vector> &SynthDefs) + : SynthDefs(SynthDefs) {} + void expand(SetTheory &ST, Record *Def, SetTheory::RecSet &Elts) override { std::vector Indices = Def->getValueAsListOfDefs("SubRegIndices"); unsigned Dim = Indices.size(); @@ -649,7 +656,9 @@ // Create a new Record representing the synthesized register. This record // is only for consumption by CodeGenRegister, it is not added to the // RecordKeeper. - Record *NewReg = new Record(Name, Def->getLoc(), Def->getRecords()); + SynthDefs.emplace_back( + llvm::make_unique(Name, Def->getLoc(), Def->getRecords())); + Record *NewReg = SynthDefs.back().get(); Elts.insert(NewReg); // Copy Proto super-classes. @@ -1075,7 +1084,8 @@ // Configure register Sets to understand register classes and tuples. Sets.addFieldExpander("RegisterClass", "MemberList"); Sets.addFieldExpander("CalleeSavedRegs", "SaveList"); - Sets.addExpander("RegisterTuples", llvm::make_unique()); + Sets.addExpander("RegisterTuples", + llvm::make_unique(SynthDefs)); // Read in the user-defined (named) sub-register indices. // More indices will be synthesized later.