Index: lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp
@@ -23,9 +23,12 @@
 
 MCSection *AMDGPUTargetObjectFile::SelectSectionForGlobal(
     const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const {
-  if (Kind.isReadOnly() && AMDGPU::isReadOnlySegment(GO) &&
-      AMDGPU::shouldEmitConstantsToTextSection(TM.getTargetTriple()))
-    return TextSection;
-
+  if (Kind.isReadOnly()) {
+    if (AMDGPU::shouldEmitROGlobalsToTextSection(TM.getTargetTriple()))
+      return TextSection;
+    if (AMDGPU::isReadOnlySegment(GO) &&
+        AMDGPU::shouldEmitConstantsToTextSection(TM.getTargetTriple()))
+      return TextSection;
+  }
   return TargetLoweringObjectFileELF::SelectSectionForGlobal(GO, Kind, TM);
 }
Index: lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.cpp
+++ lib/Target/AMDGPU/SIISelLowering.cpp
@@ -4072,6 +4072,12 @@
 
 bool SITargetLowering::shouldEmitFixup(const GlobalValue *GV) const {
   const Triple &TT = getTargetMachine().getTargetTriple();
+  if (auto GVar = dyn_cast<GlobalVariable>(GV)) {
+    // Avoid an unnecessary reloc to a global variable that is going to be
+    // emitted into .text.
+    if (GVar->isConstant())
+      return AMDGPU::shouldEmitROGlobalsToTextSection(TT);
+  }
   return (GV->getType()->getAddressSpace() == AMDGPUASI.CONSTANT_ADDRESS ||
           GV->getType()->getAddressSpace() == AMDGPUASI.CONSTANT_ADDRESS_32BIT) &&
          AMDGPU::shouldEmitConstantsToTextSection(TT);
Index: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
===================================================================
--- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -178,6 +178,10 @@
 /// target triple \p TT, false otherwise.
 bool shouldEmitConstantsToTextSection(const Triple &TT);
 
+/// \returns True if any read-only global variables should be emitted to .text
+/// section for given target triple \p TT, false otherwise.
+bool shouldEmitROGlobalsToTextSection(const Triple &TT);
+
 /// \returns Integer value requested using \p F's \p Name attribute.
 ///
 /// \returns \p Default if attribute is not present.
Index: lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
===================================================================
--- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -465,6 +465,10 @@
   return TT.getOS() != Triple::AMDHSA;
 }
 
+bool shouldEmitROGlobalsToTextSection(const Triple &TT) {
+  return TT.getOS() == Triple::AMDPAL;
+}
+
 int getIntegerAttribute(const Function &F, StringRef Name, int Default) {
   Attribute A = F.getFnAttribute(Name);
   int Result = Default;
Index: test/CodeGen/AMDGPU/pal-ro-global-in-text.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/pal-ro-global-in-text.ll
@@ -0,0 +1,16 @@
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+
+@var = internal addrspace(1) constant [4 x i32] [ i32 42, i32 43, i32 44, i32 45 ]
+
+; Check that there is no reloc from the pc-relative addressing to the variable.
+
+; GCN-LABEL: {{^}}func:
+; GCN: s_add_u32 {{.*}}, var+4{{$}}
+
+define amdgpu_vs void @func(i32 %idx) {
+  %ptr = getelementptr [4 x i32], [4 x i32] addrspace(1)* @var, i32 0, i32 %idx
+  %res = load i32, i32 addrspace(1)* %ptr
+  store i32 %res, i32 addrspace(1)* undef
+  ret void
+}