Index: lib/Target/X86/X86SchedBroadwell.td
===================================================================
--- lib/Target/X86/X86SchedBroadwell.td
+++ lib/Target/X86/X86SchedBroadwell.td
@@ -1682,5 +1682,7 @@
 }
 def: InstRW<[BWWriteResGroup202], (instrs FSTENVm)>;
 
+def: InstRW<[WriteZero], (instrs CLC)>;
+
 } // SchedModel
 
Index: lib/Target/X86/X86SchedHaswell.td
===================================================================
--- lib/Target/X86/X86SchedHaswell.td
+++ lib/Target/X86/X86SchedHaswell.td
@@ -866,7 +866,7 @@
   let ResourceCycles = [1];
 }
 def: InstRW<[HWWriteResGroup10], (instrs CBW, CWDE, CDQE,
-                                         CLC, CMC, STC)>;
+                                         CMC, STC)>;
 def: InstRW<[HWWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
 def: InstRW<[HWWriteResGroup10], (instregex "NOOP",
                                             "SGDT64m",
@@ -1958,4 +1958,6 @@
 def: InstRW<[HWWriteResGroup192], (instrs VGATHERQPSrm,
                                           VGATHERDPSrm)>;
 
+def: InstRW<[WriteZero], (instrs CLC)>;
+
 } // SchedModel
Index: lib/Target/X86/X86SchedSandyBridge.td
===================================================================
--- lib/Target/X86/X86SchedSandyBridge.td
+++ lib/Target/X86/X86SchedSandyBridge.td
@@ -1152,4 +1152,6 @@
 }
 def: InstRW<[SBWriteResGroup131], (instregex "DIV(R?)_FI(16|32)m")>;
 
+def: InstRW<[WriteZero], (instrs CLC)>;
+
 } // SchedModel
Index: lib/Target/X86/X86SchedSkylakeClient.td
===================================================================
--- lib/Target/X86/X86SchedSkylakeClient.td
+++ lib/Target/X86/X86SchedSkylakeClient.td
@@ -584,7 +584,7 @@
   let ResourceCycles = [1];
 }
 def: InstRW<[SKLWriteResGroup10], (instrs CBW, CWDE, CDQE,
-                                          CLC, CMC, STC)>;
+                                          CMC, STC)>;
 def: InstRW<[SKLWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
 def: InstRW<[SKLWriteResGroup10], (instregex "NOOP",
                                              "SGDT64m",
@@ -1839,4 +1839,6 @@
 }
 def: InstRW<[SKLWriteResGroup223], (instrs FSTENVm)>;
 
+def: InstRW<[WriteZero], (instrs CLC)>;
+
 } // SchedModel
Index: lib/Target/X86/X86SchedSkylakeServer.td
===================================================================
--- lib/Target/X86/X86SchedSkylakeServer.td
+++ lib/Target/X86/X86SchedSkylakeServer.td
@@ -606,7 +606,7 @@
   let ResourceCycles = [1];
 }
 def: InstRW<[SKXWriteResGroup10], (instrs CBW, CWDE, CDQE,
-                                          CLC, CMC, STC)>;
+                                          CMC, STC)>;
 def: InstRW<[SKXWriteResGroup10], (instrs LAHF, SAHF)>; // TODO: This doesn't match Agner's data
 def: InstRW<[SKXWriteResGroup10], (instregex "NOOP",
                                              "SGDT64m",
@@ -2550,4 +2550,7 @@
   let ResourceCycles = [1,3];
 }
 def: InstRW<[SKXWriteResGroup267], (instrs PAUSE)>;
+
+def: InstRW<[WriteZero], (instrs CLC)>;
+
 } // SchedModel