Index: llvm/trunk/include/llvm/MC/MCAsmBackend.h =================================================================== --- llvm/trunk/include/llvm/MC/MCAsmBackend.h +++ llvm/trunk/include/llvm/MC/MCAsmBackend.h @@ -30,6 +30,7 @@ class MCFragment; class MCInst; class MCObjectStreamer; +class MCObjectTargetWriter; class MCObjectWriter; struct MCCodePaddingContext; class MCRelaxableFragment; @@ -56,8 +57,11 @@ /// Create a new MCObjectWriter instance for use by the assembler backend to /// emit the final object file. - virtual std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const = 0; + std::unique_ptr + createObjectWriter(raw_pwrite_stream &OS) const; + + virtual std::unique_ptr + createObjectTargetWriter() const = 0; /// \name Target Fixup Interfaces /// @{ Index: llvm/trunk/include/llvm/MC/MCELFObjectWriter.h =================================================================== --- llvm/trunk/include/llvm/MC/MCELFObjectWriter.h +++ llvm/trunk/include/llvm/MC/MCELFObjectWriter.h @@ -12,6 +12,7 @@ #include "llvm/ADT/Triple.h" #include "llvm/BinaryFormat/ELF.h" +#include "llvm/MC/MCObjectWriter.h" #include "llvm/Support/Casting.h" #include "llvm/Support/raw_ostream.h" #include @@ -50,7 +51,7 @@ void dump() const { print(errs()); } }; -class MCELFObjectTargetWriter { +class MCELFObjectTargetWriter : public MCObjectTargetWriter { const uint8_t OSABI; const uint16_t EMachine; const unsigned HasRelocationAddend : 1; @@ -63,6 +64,11 @@ public: virtual ~MCELFObjectTargetWriter() = default; + virtual Triple::ObjectFormatType getFormat() const { return Triple::ELF; } + static bool classof(const MCObjectTargetWriter *W) { + return W->getFormat() == Triple::ELF; + } + static uint8_t getOSABI(Triple::OSType OSType) { switch (OSType) { case Triple::CloudABI: Index: llvm/trunk/include/llvm/MC/MCMachObjectWriter.h =================================================================== --- llvm/trunk/include/llvm/MC/MCMachObjectWriter.h +++ llvm/trunk/include/llvm/MC/MCMachObjectWriter.h @@ -26,7 +26,7 @@ class MachObjectWriter; -class MCMachObjectTargetWriter { +class MCMachObjectTargetWriter : public MCObjectTargetWriter { const unsigned Is64Bit : 1; const uint32_t CPUType; const uint32_t CPUSubtype; @@ -43,6 +43,11 @@ public: virtual ~MCMachObjectTargetWriter(); + virtual Triple::ObjectFormatType getFormat() const { return Triple::MachO; } + static bool classof(const MCObjectTargetWriter *W) { + return W->getFormat() == Triple::MachO; + } + /// \name Lifetime Management /// @{ Index: llvm/trunk/include/llvm/MC/MCObjectWriter.h =================================================================== --- llvm/trunk/include/llvm/MC/MCObjectWriter.h +++ llvm/trunk/include/llvm/MC/MCObjectWriter.h @@ -12,6 +12,7 @@ #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Triple.h" #include "llvm/Support/Endian.h" #include "llvm/Support/EndianStream.h" #include "llvm/Support/raw_ostream.h" @@ -101,6 +102,14 @@ /// @} }; +/// Base class for classes that define behaviour that is specific to both the +/// target and the object format. +class MCObjectTargetWriter { +public: + virtual ~MCObjectTargetWriter() = default; + virtual Triple::ObjectFormatType getFormat() const = 0; +}; + } // end namespace llvm #endif // LLVM_MC_MCOBJECTWRITER_H Index: llvm/trunk/include/llvm/MC/MCWasmObjectWriter.h =================================================================== --- llvm/trunk/include/llvm/MC/MCWasmObjectWriter.h +++ llvm/trunk/include/llvm/MC/MCWasmObjectWriter.h @@ -10,16 +10,16 @@ #ifndef LLVM_MC_MCWASMOBJECTWRITER_H #define LLVM_MC_MCWASMOBJECTWRITER_H +#include "llvm/MC/MCObjectWriter.h" #include namespace llvm { class MCFixup; -class MCObjectWriter; class MCValue; class raw_pwrite_stream; -class MCWasmObjectTargetWriter { +class MCWasmObjectTargetWriter : public MCObjectTargetWriter { const unsigned Is64Bit : 1; protected: @@ -28,6 +28,11 @@ public: virtual ~MCWasmObjectTargetWriter(); + virtual Triple::ObjectFormatType getFormat() const { return Triple::Wasm; } + static bool classof(const MCObjectTargetWriter *W) { + return W->getFormat() == Triple::Wasm; + } + virtual unsigned getRelocType(const MCValue &Target, const MCFixup &Fixup) const = 0; Index: llvm/trunk/include/llvm/MC/MCWinCOFFObjectWriter.h =================================================================== --- llvm/trunk/include/llvm/MC/MCWinCOFFObjectWriter.h +++ llvm/trunk/include/llvm/MC/MCWinCOFFObjectWriter.h @@ -10,6 +10,7 @@ #ifndef LLVM_MC_MCWINCOFFOBJECTWRITER_H #define LLVM_MC_MCWINCOFFOBJECTWRITER_H +#include "llvm/MC/MCObjectWriter.h" #include namespace llvm { @@ -17,11 +18,10 @@ class MCAsmBackend; class MCContext; class MCFixup; -class MCObjectWriter; class MCValue; class raw_pwrite_stream; - class MCWinCOFFObjectTargetWriter { + class MCWinCOFFObjectTargetWriter : public MCObjectTargetWriter { virtual void anchor(); const unsigned Machine; @@ -32,6 +32,11 @@ public: virtual ~MCWinCOFFObjectTargetWriter() = default; + virtual Triple::ObjectFormatType getFormat() const { return Triple::COFF; } + static bool classof(const MCObjectTargetWriter *W) { + return W->getFormat() == Triple::COFF; + } + unsigned getMachine() const { return Machine; } virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsCrossSection, Index: llvm/trunk/lib/MC/MCAsmBackend.cpp =================================================================== --- llvm/trunk/lib/MC/MCAsmBackend.cpp +++ llvm/trunk/lib/MC/MCAsmBackend.cpp @@ -11,7 +11,12 @@ #include "llvm/ADT/None.h" #include "llvm/ADT/STLExtras.h" #include "llvm/MC/MCCodePadder.h" +#include "llvm/MC/MCELFObjectWriter.h" #include "llvm/MC/MCFixupKindInfo.h" +#include "llvm/MC/MCMachObjectWriter.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCWasmObjectWriter.h" +#include "llvm/MC/MCWinCOFFObjectWriter.h" #include #include #include @@ -23,6 +28,27 @@ MCAsmBackend::~MCAsmBackend() = default; +std::unique_ptr +MCAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { + auto TW = createObjectTargetWriter(); + switch (TW->getFormat()) { + case Triple::ELF: + return createELFObjectWriter(cast(std::move(TW)), OS, + Endian == support::little); + case Triple::MachO: + return createMachObjectWriter(cast(std::move(TW)), + OS, Endian == support::little); + case Triple::COFF: + return createWinCOFFObjectWriter( + cast(std::move(TW)), OS); + case Triple::Wasm: + return createWasmObjectWriter(cast(std::move(TW)), + OS); + default: + llvm_unreachable("unexpected object format"); + } +} + Optional MCAsmBackend::getFixupKind(StringRef Name) const { return None; } Index: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp @@ -430,9 +430,9 @@ const MCRegisterInfo &MRI) : AArch64AsmBackend(T, TT, /*IsLittleEndian*/ true), MRI(MRI) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createAArch64MachObjectWriter(OS, MachO::CPU_TYPE_ARM64, + std::unique_ptr + createObjectTargetWriter() const override { + return createAArch64MachObjectWriter(MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64_ALL); } @@ -581,10 +581,9 @@ : AArch64AsmBackend(T, TT, IsLittleEndian), OSABI(OSABI), IsILP32(IsILP32) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createAArch64ELFObjectWriter(OS, OSABI, - Endian == support::little, IsILP32); + std::unique_ptr + createObjectTargetWriter() const override { + return createAArch64ELFObjectWriter(OSABI, IsILP32); } }; @@ -596,9 +595,9 @@ COFFAArch64AsmBackend(const Target &T, const Triple &TheTriple) : AArch64AsmBackend(T, TheTriple, /*IsLittleEndian*/ true) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createAArch64WinCOFFObjectWriter(OS); + std::unique_ptr + createObjectTargetWriter() const override { + return createAArch64WinCOFFObjectWriter(); } }; } Index: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp @@ -31,7 +31,7 @@ class AArch64ELFObjectWriter : public MCELFObjectTargetWriter { public: - AArch64ELFObjectWriter(uint8_t OSABI, bool IsLittleEndian, bool IsILP32); + AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32); ~AArch64ELFObjectWriter() override = default; @@ -43,9 +43,7 @@ } // end anonymous namespace -AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, - bool IsLittleEndian, - bool IsILP32) +AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32) : MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI, ELF::EM_AARCH64, /*HasRelocationAddend*/ true), IsILP32(IsILP32) {} @@ -429,10 +427,7 @@ llvm_unreachable("Unimplemented fixup -> relocation"); } -std::unique_ptr -llvm::createAArch64ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - bool IsLittleEndian, bool IsILP32) { - auto MOTW = - llvm::make_unique(OSABI, IsLittleEndian, IsILP32); - return createELFObjectWriter(std::move(MOTW), OS, IsLittleEndian); +std::unique_ptr +llvm::createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32) { + return llvm::make_unique(OSABI, IsILP32); } Index: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h @@ -26,7 +26,7 @@ class MCInstrInfo; class MCInstPrinter; class MCRegisterInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCStreamer; class MCSubtargetInfo; class MCTargetOptions; @@ -53,16 +53,13 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr -createAArch64ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - bool IsLittleEndian, bool IsILP32); - -std::unique_ptr -createAArch64MachObjectWriter(raw_pwrite_stream &OS, uint32_t CPUType, - uint32_t CPUSubtype); +std::unique_ptr +createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32); -std::unique_ptr -createAArch64WinCOFFObjectWriter(raw_pwrite_stream &OS); +std::unique_ptr +createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype); + +std::unique_ptr createAArch64WinCOFFObjectWriter(); MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, Index: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp @@ -404,10 +404,7 @@ Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE); } -std::unique_ptr -llvm::createAArch64MachObjectWriter(raw_pwrite_stream &OS, uint32_t CPUType, - uint32_t CPUSubtype) { - return createMachObjectWriter( - llvm::make_unique(CPUType, CPUSubtype), OS, - /*IsLittleEndian=*/true); +std::unique_ptr +llvm::createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype) { + return llvm::make_unique(CPUType, CPUSubtype); } Index: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp @@ -120,10 +120,8 @@ namespace llvm { -std::unique_ptr -createAArch64WinCOFFObjectWriter(raw_pwrite_stream &OS) { - auto MOTW = llvm::make_unique(); - return createWinCOFFObjectWriter(std::move(MOTW), OS); +std::unique_ptr createAArch64WinCOFFObjectWriter() { + return llvm::make_unique(); } } // end namespace llvm Index: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp @@ -188,9 +188,9 @@ } } - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend, OS); + std::unique_ptr + createObjectTargetWriter() const override { + return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend); } }; Index: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp @@ -82,11 +82,9 @@ llvm_unreachable("unhandled relocation type"); } -std::unique_ptr +std::unique_ptr llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, - bool HasRelocationAddend, - raw_pwrite_stream &OS) { - auto MOTW = llvm::make_unique(Is64Bit, OSABI, - HasRelocationAddend); - return createELFObjectWriter(std::move(MOTW), OS, true); + bool HasRelocationAddend) { + return llvm::make_unique(Is64Bit, OSABI, + HasRelocationAddend); } Index: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h @@ -25,7 +25,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -50,9 +50,9 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr +std::unique_ptr createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, - bool HasRelocationAddend, raw_pwrite_stream &OS); + bool HasRelocationAddend); } // End llvm namespace #define GET_REGINFO_ENUM Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h =================================================================== --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h @@ -23,9 +23,9 @@ const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st) : ARMAsmBackend(T, STI, support::little), MRI(MRI), Subtype(st) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createARMMachObjectWriter(OS, /*Is64Bit=*/false, MachO::CPU_TYPE_ARM, + std::unique_ptr + createObjectTargetWriter() const override { + return createARMMachObjectWriter(/*Is64Bit=*/false, MachO::CPU_TYPE_ARM, Subtype); } Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h =================================================================== --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h @@ -24,9 +24,9 @@ support::endianness Endian) : ARMAsmBackend(T, STI, Endian), OSABI(OSABI) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createARMELFObjectWriter(OS, OSABI, Endian); + std::unique_ptr + createObjectTargetWriter() const override { + return createARMELFObjectWriter(OSABI); } }; } Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h =================================================================== --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h @@ -19,9 +19,9 @@ public: ARMAsmBackendWinCOFF(const Target &T, const MCSubtargetInfo &STI) : ARMAsmBackend(T, STI, support::little) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createARMWinCOFFObjectWriter(OS, /*Is64Bit=*/false); + std::unique_ptr + createObjectTargetWriter() const override { + return createARMWinCOFFObjectWriter(/*Is64Bit=*/false); } }; } Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp @@ -236,9 +236,7 @@ } } -std::unique_ptr -llvm::createARMELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - bool IsLittleEndian) { - return createELFObjectWriter(llvm::make_unique(OSABI), OS, - IsLittleEndian); +std::unique_ptr +llvm::createARMELFObjectWriter(uint8_t OSABI) { + return llvm::make_unique(OSABI); } Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h @@ -25,6 +25,7 @@ class MCContext; class MCInstrInfo; class MCInstPrinter; +class MCObjectTargetWriter; class MCObjectWriter; class MCRegisterInfo; class MCSubtargetInfo; @@ -86,19 +87,16 @@ bool IncrementalLinkerCompatible); /// Construct an ELF Mach-O object writer. -std::unique_ptr createARMELFObjectWriter(raw_pwrite_stream &OS, - uint8_t OSABI, - bool IsLittleEndian); +std::unique_ptr createARMELFObjectWriter(uint8_t OSABI); /// Construct an ARM Mach-O object writer. -std::unique_ptr createARMMachObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit, - uint32_t CPUType, - uint32_t CPUSubtype); +std::unique_ptr +createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType, + uint32_t CPUSubtype); /// Construct an ARM PE/COFF object writer. -std::unique_ptr -createARMWinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit); +std::unique_ptr +createARMWinCOFFObjectWriter(bool Is64Bit); /// Construct ARM Mach-O relocation info. MCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx); Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp @@ -484,10 +484,8 @@ Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE); } -std::unique_ptr -llvm::createARMMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, - uint32_t CPUType, uint32_t CPUSubtype) { - return createMachObjectWriter( - llvm::make_unique(Is64Bit, CPUType, CPUSubtype), OS, - /*IsLittleEndian=*/true); +std::unique_ptr +llvm::createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType, + uint32_t CPUSubtype) { + return llvm::make_unique(Is64Bit, CPUType, CPUSubtype); } Index: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp @@ -91,10 +91,9 @@ namespace llvm { -std::unique_ptr -createARMWinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit) { - auto MOTW = llvm::make_unique(Is64Bit); - return createWinCOFFObjectWriter(std::move(MOTW), OS); +std::unique_ptr +createARMWinCOFFObjectWriter(bool Is64Bit) { + return llvm::make_unique(Is64Bit); } } // end namespace llvm Index: llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h =================================================================== --- llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h +++ llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h @@ -37,7 +37,8 @@ void adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t &Value, MCContext *Ctx = nullptr) const; - std::unique_ptr createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef Data, Index: llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp +++ llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp @@ -352,10 +352,9 @@ } } -std::unique_ptr -AVRAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createAVRELFObjectWriter(OS, - MCELFObjectTargetWriter::getOSABI(OSType)); +std::unique_ptr +AVRAsmBackend::createObjectTargetWriter() const { + return createAVRELFObjectWriter(MCELFObjectTargetWriter::getOSABI(OSType)); } void AVRAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, Index: llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp +++ llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp @@ -152,10 +152,8 @@ } } -std::unique_ptr -createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) { - std::unique_ptr MOTW(new AVRELFObjectWriter(OSABI)); - return createELFObjectWriter(std::move(MOTW), OS, true); +std::unique_ptr createAVRELFObjectWriter(uint8_t OSABI) { + return make_unique(OSABI); } } // end of namespace llvm Index: llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h +++ llvm/trunk/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h @@ -24,7 +24,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -48,8 +48,7 @@ const llvm::MCTargetOptions &TO); /// Creates an ELF object writer for AVR. -std::unique_ptr -createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI); +std::unique_ptr createAVRELFObjectWriter(uint8_t OSABI); } // end namespace llvm Index: llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp +++ llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp @@ -29,8 +29,8 @@ const MCValue &Target, MutableArrayRef Data, uint64_t Value, bool IsResolved) const override; - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; // No instruction requires relaxation bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, @@ -88,9 +88,9 @@ } } -std::unique_ptr -BPFAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createBPFELFObjectWriter(OS, 0, Endian == support::little); +std::unique_ptr +BPFAsmBackend::createObjectTargetWriter() const { + return createBPFELFObjectWriter(0); } MCAsmBackend *llvm::createBPFAsmBackend(const Target &T, Index: llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp +++ llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp @@ -54,9 +54,7 @@ } } -std::unique_ptr -llvm::createBPFELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - bool IsLittleEndian) { - return createELFObjectWriter(llvm::make_unique(OSABI), OS, - IsLittleEndian); +std::unique_ptr +llvm::createBPFELFObjectWriter(uint8_t OSABI) { + return llvm::make_unique(OSABI); } Index: llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h +++ llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h @@ -24,7 +24,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -52,9 +52,7 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr createBPFELFObjectWriter(raw_pwrite_stream &OS, - uint8_t OSABI, - bool IsLittleEndian); +std::unique_ptr createBPFELFObjectWriter(uint8_t OSABI); } // Defines symbolic names for BPF registers. This defines a mapping from Index: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp +++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp @@ -66,9 +66,9 @@ MCII(T.createMCInstrInfo()), RelaxTarget(new MCInst *), Extender(nullptr) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createHexagonELFObjectWriter(OS, OSABI, CPU); + std::unique_ptr + createObjectTargetWriter() const override { + return createHexagonELFObjectWriter(OSABI, CPU); } void setExtender(MCContext &Context) const { Index: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp +++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp @@ -298,9 +298,7 @@ } } -std::unique_ptr -llvm::createHexagonELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - StringRef CPU) { - auto MOTW = llvm::make_unique(OSABI, CPU); - return createELFObjectWriter(std::move(MOTW), OS, /*IsLittleEndian*/ true); +std::unique_ptr +llvm::createHexagonELFObjectWriter(uint8_t OSABI, StringRef CPU) { + return llvm::make_unique(OSABI, CPU); } Index: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h +++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h @@ -27,7 +27,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -65,9 +65,8 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr -createHexagonELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - StringRef CPU); +std::unique_ptr +createHexagonELFObjectWriter(uint8_t OSABI, StringRef CPU); unsigned HexagonGetLastSlot(); Index: llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp +++ llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp @@ -53,8 +53,8 @@ const MCValue &Target, MutableArrayRef Data, uint64_t Value, bool IsResolved) const override; - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; // No instruction requires relaxation bool fixupNeedsRelaxation(const MCFixup & /*Fixup*/, uint64_t /*Value*/, @@ -127,10 +127,9 @@ } } -std::unique_ptr -LanaiAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createLanaiELFObjectWriter(OS, - MCELFObjectTargetWriter::getOSABI(OSType)); +std::unique_ptr +LanaiAsmBackend::createObjectTargetWriter() const { + return createLanaiELFObjectWriter(MCELFObjectTargetWriter::getOSABI(OSType)); } const MCFixupKindInfo & Index: llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp +++ llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp @@ -87,8 +87,7 @@ } } -std::unique_ptr -llvm::createLanaiELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) { - return createELFObjectWriter(llvm::make_unique(OSABI), - OS, /*IsLittleEndian=*/false); +std::unique_ptr +llvm::createLanaiELFObjectWriter(uint8_t OSABI) { + return llvm::make_unique(OSABI); } Index: llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h +++ llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h @@ -24,7 +24,7 @@ class MCContext; class MCInstrInfo; class MCInstrAnalysis; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRelocationInfo; class MCSubtargetInfo; class Target; @@ -42,8 +42,7 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr -createLanaiELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI); +std::unique_ptr createLanaiELFObjectWriter(uint8_t OSABI); } // namespace llvm // Defines symbolic names for Lanai registers. This defines a mapping from Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h @@ -37,8 +37,8 @@ : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big), TheTriple(TT), IsN32(N32) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef Data, Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -211,9 +211,9 @@ return Value; } -std::unique_ptr -MipsAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createMipsELFObjectWriter(OS, TheTriple, IsN32); +std::unique_ptr +MipsAsmBackend::createObjectTargetWriter() const { + return createMipsELFObjectWriter(TheTriple, IsN32); } // Little-endian fixup data byte ordering: Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp @@ -56,8 +56,7 @@ class MipsELFObjectWriter : public MCELFObjectTargetWriter { public: - MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64, - bool IsLittleEndian); + MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64); ~MipsELFObjectWriter() override = default; @@ -211,8 +210,7 @@ #endif MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI, - bool HasRelocationAddend, bool Is64, - bool IsLittleEndian) + bool HasRelocationAddend, bool Is64) : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {} unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx, @@ -658,13 +656,11 @@ } } -std::unique_ptr -llvm::createMipsELFObjectWriter(raw_pwrite_stream &OS, const Triple &TT, - bool IsN32) { +std::unique_ptr +llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) { uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); bool IsN64 = TT.isArch64Bit() && !IsN32; bool HasRelocationAddend = TT.isArch64Bit(); - auto MOTW = llvm::make_unique( - OSABI, HasRelocationAddend, IsN64, TT.isLittleEndian()); - return createELFObjectWriter(std::move(MOTW), OS, TT.isLittleEndian()); + return llvm::make_unique(OSABI, HasRelocationAddend, + IsN64); } Index: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h @@ -23,7 +23,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -49,8 +49,8 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr -createMipsELFObjectWriter(raw_pwrite_stream &OS, const Triple &TT, bool IsN32); +std::unique_ptr +createMipsELFObjectWriter(const Triple &TT, bool IsN32); namespace MIPS_MC { StringRef selectMipsCPU(const Triple &TT, StringRef CPU); Index: llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.h =================================================================== --- llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.h +++ llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.h @@ -33,8 +33,8 @@ Nios2AsmBackend(const Target &T, Triple::OSType OSType) : MCAsmBackend(support::little), OSType(OSType) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; bool writeNopData(raw_ostream &OS, uint64_t Count) const override; Index: llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp +++ llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp @@ -112,10 +112,9 @@ return Infos[Kind - FirstTargetFixupKind]; } -std::unique_ptr -Nios2AsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createNios2ELFObjectWriter(OS, - MCELFObjectTargetWriter::getOSABI(OSType)); +std::unique_ptr +Nios2AsmBackend::createObjectTargetWriter() const { + return createNios2ELFObjectWriter(MCELFObjectTargetWriter::getOSABI(OSType)); } bool Nios2AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const { Index: llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2ELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2ELFObjectWriter.cpp +++ llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2ELFObjectWriter.cpp @@ -37,8 +37,7 @@ return 0; } -std::unique_ptr -llvm::createNios2ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) { - auto MOTW = llvm::make_unique(OSABI); - return createELFObjectWriter(std::move(MOTW), OS, true); +std::unique_ptr +llvm::createNios2ELFObjectWriter(uint8_t OSABI) { + return llvm::make_unique(OSABI); } Index: llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h +++ llvm/trunk/lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h @@ -18,7 +18,7 @@ namespace llvm { class MCAsmBackend; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -33,8 +33,7 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr -createNios2ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI); +std::unique_ptr createNios2ELFObjectWriter(uint8_t OSABI); } // namespace llvm Index: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp @@ -202,11 +202,10 @@ public: DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, support::big) { } - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { + std::unique_ptr + createObjectTargetWriter() const override { bool is64 = getPointerSize() == 8; return createPPCMachObjectWriter( - OS, /*Is64Bit=*/is64, (is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC), MachO::CPU_SUBTYPE_POWERPC_ALL); @@ -220,11 +219,10 @@ uint8_t OSABI) : PPCAsmBackend(T, Endian), OSABI(OSABI) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { + std::unique_ptr + createObjectTargetWriter() const override { bool is64 = getPointerSize() == 8; - return createPPCELFObjectWriter(OS, is64, Endian == support::little, - OSABI); + return createPPCELFObjectWriter(is64, OSABI); } }; Index: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp @@ -417,9 +417,7 @@ } } -std::unique_ptr -llvm::createPPCELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, - bool IsLittleEndian, uint8_t OSABI) { - auto MOTW = llvm::make_unique(Is64Bit, OSABI); - return createELFObjectWriter(std::move(MOTW), OS, IsLittleEndian); +std::unique_ptr +llvm::createPPCELFObjectWriter(bool Is64Bit, uint8_t OSABI) { + return llvm::make_unique(Is64Bit, OSABI); } Index: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h @@ -27,7 +27,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -49,15 +49,11 @@ const MCTargetOptions &Options); /// Construct an PPC ELF object writer. -std::unique_ptr createPPCELFObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit, - bool IsLittleEndian, - uint8_t OSABI); +std::unique_ptr createPPCELFObjectWriter(bool Is64Bit, + uint8_t OSABI); /// Construct a PPC Mach-O object writer. -std::unique_ptr createPPCMachObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit, - uint32_t CPUType, - uint32_t CPUSubtype); +std::unique_ptr +createPPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype); /// Returns true iff Val consists of one contiguous run of 1s with any number of /// 0s on either side. The 1s are allowed to wrap from LSB to MSB, so Index: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp @@ -374,10 +374,8 @@ Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE); } -std::unique_ptr -llvm::createPPCMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, - uint32_t CPUType, uint32_t CPUSubtype) { - return createMachObjectWriter( - llvm::make_unique(Is64Bit, CPUType, CPUSubtype), OS, - /*IsLittleEndian=*/false); +std::unique_ptr +llvm::createPPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, + uint32_t CPUSubtype) { + return llvm::make_unique(Is64Bit, CPUType, CPUSubtype); } Index: llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -41,8 +41,8 @@ const MCValue &Target, MutableArrayRef Data, uint64_t Value, bool IsResolved) const override; - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; // If linker relaxation is enabled, always emit relocations even if the fixup // can be resolved. This is necessary for correctness as offsets may change @@ -335,9 +335,9 @@ } } -std::unique_ptr -RISCVAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createRISCVELFObjectWriter(OS, OSABI, Is64Bit); +std::unique_ptr +RISCVAsmBackend::createObjectTargetWriter() const { + return createRISCVELFObjectWriter(OSABI, Is64Bit); } } // end anonymous namespace Index: llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp +++ llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp @@ -81,10 +81,7 @@ } } -std::unique_ptr -llvm::createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - bool Is64Bit) { - return createELFObjectWriter( - llvm::make_unique(OSABI, Is64Bit), OS, - /*IsLittleEndian=*/true); +std::unique_ptr +llvm::createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit) { + return llvm::make_unique(OSABI, Is64Bit); } Index: llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h +++ llvm/trunk/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h @@ -24,7 +24,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class StringRef; @@ -44,8 +44,8 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr -createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool Is64Bit); +std::unique_ptr createRISCVELFObjectWriter(uint8_t OSABI, + bool Is64Bit); } // Defines symbolic names for RISC-V registers. Index: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp +++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp @@ -291,11 +291,10 @@ } } - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { + std::unique_ptr + createObjectTargetWriter() const override { uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType); - return createSparcELFObjectWriter(OS, Is64Bit, - Endian == support::little, OSABI); + return createSparcELFObjectWriter(Is64Bit, OSABI); } }; Index: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp +++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp @@ -132,9 +132,7 @@ } } -std::unique_ptr -llvm::createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, - bool IsLittleEndian, uint8_t OSABI) { - auto MOTW = llvm::make_unique(Is64Bit, OSABI); - return createELFObjectWriter(std::move(MOTW), OS, IsLittleEndian); +std::unique_ptr +llvm::createSparcELFObjectWriter(bool Is64Bit, uint8_t OSABI) { + return llvm::make_unique(Is64Bit, OSABI); } Index: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h +++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h @@ -23,7 +23,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -43,9 +43,8 @@ MCAsmBackend *createSparcAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr -createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, - bool IsLIttleEndian, uint8_t OSABI); +std::unique_ptr createSparcELFObjectWriter(bool Is64Bit, + uint8_t OSABI); } // End llvm namespace // Defines symbolic names for Sparc registers. This defines a mapping from Index: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp +++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp @@ -67,9 +67,9 @@ llvm_unreachable("SystemZ does do not have assembler relaxation"); } bool writeNopData(raw_ostream &OS, uint64_t Count) const override; - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createSystemZObjectWriter(OS, OSABI); + std::unique_ptr + createObjectTargetWriter() const override { + return createSystemZObjectWriter(OSABI); } }; } // end anonymous namespace Index: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp +++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp @@ -161,8 +161,7 @@ } } -std::unique_ptr -llvm::createSystemZObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI) { - return createELFObjectWriter(llvm::make_unique(OSABI), - OS, /*IsLittleEndian=*/false); +std::unique_ptr +llvm::createSystemZObjectWriter(uint8_t OSABI) { + return llvm::make_unique(OSABI); } Index: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h +++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h @@ -20,7 +20,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class MCTargetOptions; @@ -93,8 +93,7 @@ const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr createSystemZObjectWriter(raw_pwrite_stream &OS, - uint8_t OSABI); +std::unique_ptr createSystemZObjectWriter(uint8_t OSABI); } // end namespace llvm // Defines symbolic names for SystemZ registers. Index: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp +++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp @@ -41,8 +41,8 @@ const MCValue &Target, MutableArrayRef Data, uint64_t Value, bool IsPCRel) const override; - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; // No instruction requires relaxation bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, @@ -83,8 +83,8 @@ const MCValue &Target, MutableArrayRef Data, uint64_t Value, bool IsPCRel) const override; - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr + createObjectTargetWriter() const override; // No instruction requires relaxation bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, @@ -133,9 +133,9 @@ Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff); } -std::unique_ptr -WebAssemblyAsmBackendELF::createObjectWriter(raw_pwrite_stream &OS) const { - return createWebAssemblyELFObjectWriter(OS, Is64Bit, 0); +std::unique_ptr +WebAssemblyAsmBackendELF::createObjectTargetWriter() const { + return createWebAssemblyELFObjectWriter(Is64Bit, 0); } const MCFixupKindInfo & @@ -193,9 +193,9 @@ Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff); } -std::unique_ptr -WebAssemblyAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createWebAssemblyWasmObjectWriter(OS, Is64Bit); +std::unique_ptr +WebAssemblyAsmBackend::createObjectTargetWriter() const { + return createWebAssemblyWasmObjectWriter(Is64Bit); } } // end anonymous namespace Index: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyELFObjectWriter.cpp +++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyELFObjectWriter.cpp @@ -59,10 +59,7 @@ } } -std::unique_ptr -llvm::createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit, - uint8_t OSABI) { - auto MOTW = llvm::make_unique(Is64Bit, OSABI); - return createELFObjectWriter(std::move(MOTW), OS, /*IsLittleEndian=*/true); +std::unique_ptr +llvm::createWebAssemblyELFObjectWriter(bool Is64Bit, uint8_t OSABI) { + return llvm::make_unique(Is64Bit, OSABI); } Index: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h +++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h @@ -26,7 +26,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCSubtargetInfo; class MVT; class Target; @@ -40,13 +40,11 @@ MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT); -std::unique_ptr -createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit, uint8_t OSABI); - -std::unique_ptr -createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit); +std::unique_ptr +createWebAssemblyELFObjectWriter(bool Is64Bit, uint8_t OSABI); + +std::unique_ptr +createWebAssemblyWasmObjectWriter(bool Is64Bit); namespace WebAssembly { enum OperandType { Index: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp +++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp @@ -121,9 +121,7 @@ } } -std::unique_ptr -llvm::createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit) { - auto MOTW = llvm::make_unique(Is64Bit); - return createWasmObjectWriter(std::move(MOTW), OS); +std::unique_ptr +llvm::createWebAssemblyWasmObjectWriter(bool Is64Bit) { + return llvm::make_unique(Is64Bit); } Index: llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp =================================================================== --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp @@ -390,9 +390,9 @@ const MCSubtargetInfo &STI) : ELFX86AsmBackend(T, OSABI, STI) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI, ELF::EM_386); + std::unique_ptr + createObjectTargetWriter() const override { + return createX86ELFObjectWriter(/*IsELF64*/ false, OSABI, ELF::EM_386); } }; @@ -402,9 +402,9 @@ const MCSubtargetInfo &STI) : ELFX86AsmBackend(T, OSABI, STI) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI, + std::unique_ptr + createObjectTargetWriter() const override { + return createX86ELFObjectWriter(/*IsELF64*/ false, OSABI, ELF::EM_X86_64); } }; @@ -415,9 +415,9 @@ const MCSubtargetInfo &STI) : ELFX86AsmBackend(T, OSABI, STI) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createX86ELFObjectWriter(OS, /*IsELF64*/ false, OSABI, + std::unique_ptr + createObjectTargetWriter() const override { + return createX86ELFObjectWriter(/*IsELF64*/ false, OSABI, ELF::EM_IAMCU); } }; @@ -428,9 +428,9 @@ const MCSubtargetInfo &STI) : ELFX86AsmBackend(T, OSABI, STI) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createX86ELFObjectWriter(OS, /*IsELF64*/ true, OSABI, ELF::EM_X86_64); + std::unique_ptr + createObjectTargetWriter() const override { + return createX86ELFObjectWriter(/*IsELF64*/ true, OSABI, ELF::EM_X86_64); } }; @@ -452,9 +452,9 @@ .Default(MCAsmBackend::getFixupKind(Name)); } - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createX86WinCOFFObjectWriter(OS, Is64Bit); + std::unique_ptr + createObjectTargetWriter() const override { + return createX86WinCOFFObjectWriter(Is64Bit); } }; @@ -813,9 +813,9 @@ const MCSubtargetInfo &STI) : DarwinX86AsmBackend(T, MRI, STI, false) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createX86MachObjectWriter(OS, /*Is64Bit=*/false, + std::unique_ptr + createObjectTargetWriter() const override { + return createX86MachObjectWriter(/*Is64Bit=*/false, MachO::CPU_TYPE_I386, MachO::CPU_SUBTYPE_I386_ALL); } @@ -834,10 +834,10 @@ const MCSubtargetInfo &STI, MachO::CPUSubTypeX86 st) : DarwinX86AsmBackend(T, MRI, STI, true), Subtype(st) {} - std::unique_ptr - createObjectWriter(raw_pwrite_stream &OS) const override { - return createX86MachObjectWriter(OS, /*Is64Bit=*/true, - MachO::CPU_TYPE_X86_64, Subtype); + std::unique_ptr + createObjectTargetWriter() const override { + return createX86MachObjectWriter(/*Is64Bit=*/true, MachO::CPU_TYPE_X86_64, + Subtype); } /// Generate the compact unwind encoding for the CFI instructions. Index: llvm/trunk/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp @@ -301,9 +301,7 @@ return getRelocType32(Ctx, Modifier, getType32(Type), IsPCRel, Kind); } -std::unique_ptr -llvm::createX86ELFObjectWriter(raw_pwrite_stream &OS, bool IsELF64, - uint8_t OSABI, uint16_t EMachine) { - auto MOTW = llvm::make_unique(IsELF64, OSABI, EMachine); - return createELFObjectWriter(std::move(MOTW), OS, /*IsLittleEndian=*/true); +std::unique_ptr +llvm::createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine) { + return llvm::make_unique(IsELF64, OSABI, EMachine); } Index: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h =================================================================== --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h @@ -23,6 +23,7 @@ class MCCodeEmitter; class MCContext; class MCInstrInfo; +class MCObjectTargetWriter; class MCObjectWriter; class MCRegisterInfo; class MCSubtargetInfo; @@ -101,19 +102,15 @@ bool IncrementalLinkerCompatible); /// Construct an X86 Mach-O object writer. -std::unique_ptr createX86MachObjectWriter(raw_pwrite_stream &OS, - bool Is64Bit, - uint32_t CPUType, - uint32_t CPUSubtype); +std::unique_ptr +createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype); /// Construct an X86 ELF object writer. -std::unique_ptr createX86ELFObjectWriter(raw_pwrite_stream &OS, - bool IsELF64, - uint8_t OSABI, - uint16_t EMachine); +std::unique_ptr +createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine); /// Construct an X86 Win COFF object writer. -std::unique_ptr -createX86WinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit); +std::unique_ptr +createX86WinCOFFObjectWriter(bool Is64Bit); /// Returns the sub or super register of a specific X86 register. /// e.g. getX86SubSuperRegister(X86::EAX, 16) returns X86::AX. Index: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp @@ -598,10 +598,8 @@ Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE); } -std::unique_ptr -llvm::createX86MachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, - uint32_t CPUType, uint32_t CPUSubtype) { - return createMachObjectWriter( - llvm::make_unique(Is64Bit, CPUType, CPUSubtype), OS, - /*IsLittleEndian=*/true); +std::unique_ptr +llvm::createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType, + uint32_t CPUSubtype) { + return llvm::make_unique(Is64Bit, CPUType, CPUSubtype); } Index: llvm/trunk/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp =================================================================== --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp @@ -106,8 +106,7 @@ llvm_unreachable("Unsupported COFF machine type."); } -std::unique_ptr -llvm::createX86WinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit) { - auto MOTW = llvm::make_unique(Is64Bit); - return createWinCOFFObjectWriter(std::move(MOTW), OS); +std::unique_ptr +llvm::createX86WinCOFFObjectWriter(bool Is64Bit) { + return llvm::make_unique(Is64Bit); }