Index: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp =================================================================== --- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -96,7 +96,6 @@ bool parseDirectiveArch(SMLoc L); bool parseDirectiveCPU(SMLoc L); - bool parseDirectiveWord(unsigned Size, SMLoc L); bool parseDirectiveInst(SMLoc L); bool parseDirectiveTLSDescCall(SMLoc L); @@ -166,6 +165,13 @@ if (S.getTargetStreamer() == nullptr) new AArch64TargetStreamer(S); + // Alias .hword/.word/xword to the target-independent .2byte/.4byte/.8byte + // directives as they have the same form and semantics: + /// ::= (.hword | .word | .xword ) [ expression (, expression)* ] + Parser.addAliasForDirective(".hword", ".2byte"); + Parser.addAliasForDirective(".word", ".4byte"); + Parser.addAliasForDirective(".xword", ".8byte"); + // Initialize the set of available features. setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); } @@ -4369,12 +4375,6 @@ parseDirectiveArch(Loc); else if (IDVal == ".cpu") parseDirectiveCPU(Loc); - else if (IDVal == ".hword") - parseDirectiveWord(2, Loc); - else if (IDVal == ".word") - parseDirectiveWord(4, Loc); - else if (IDVal == ".xword") - parseDirectiveWord(8, Loc); else if (IDVal == ".tlsdesccall") parseDirectiveTLSDescCall(Loc); else if (IDVal == ".ltorg" || IDVal == ".pool") @@ -4539,22 +4539,6 @@ return false; } -/// parseDirectiveWord -/// ::= .word [ expression (, expression)* ] -bool AArch64AsmParser::parseDirectiveWord(unsigned Size, SMLoc L) { - auto parseOp = [&]() -> bool { - const MCExpr *Value; - if (getParser().parseExpression(Value)) - return true; - getParser().getStreamer().EmitValue(Value, Size, L); - return false; - }; - - if (parseMany(parseOp)) - return true; - return false; -} - /// parseDirectiveInst /// ::= .inst opcode [, ...] bool AArch64AsmParser::parseDirectiveInst(SMLoc Loc) {