Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -5372,6 +5372,9 @@ // | D | // Into: // (x & m) | (y & ~m) +// If y is a constant, and the 'andn' does not work with immediates, +// we unfold into a different pattern: +// ~(~x & m) & (m | y) // NOTE: we don't unfold the pattern if 'xor' is actually a 'not', because at // the very least that breaks andnpd / andnps patterns, and because those // patterns are simplified in IR and shouldn't be created in the DAG @@ -5390,8 +5393,9 @@ // There are 3 commutable operators in the pattern, // so we have to deal with 8 possible variants of the basic pattern. - SDValue X, Y, M; - auto matchAndXor = [&X, &Y, &M](SDValue And, unsigned XorIdx, SDValue Other) { + SDValue A, D, X, Y, M; + auto matchAndXor = [&A, &D, &X, &Y, &M](SDValue And, unsigned XorIdx, + SDValue Other) { if (And.getOpcode() != ISD::AND || !And.hasOneUse()) return false; SDValue Xor = And.getOperand(XorIdx); @@ -5406,16 +5410,18 @@ std::swap(Xor0, Xor1); if (Other != Xor1) return false; + A = And; + D = Xor; X = Xor0; Y = Xor1; M = And.getOperand(XorIdx ? 0 : 1); return true; }; - SDValue A = N->getOperand(0); - SDValue B = N->getOperand(1); - if (!matchAndXor(A, 0, B) && !matchAndXor(A, 1, B) && !matchAndXor(B, 0, A) && - !matchAndXor(B, 1, A)) + SDValue N0 = N->getOperand(0); + SDValue N1 = N->getOperand(1); + if (!matchAndXor(N0, 0, N1) && !matchAndXor(N0, 1, N1) && + !matchAndXor(N1, 0, N0) && !matchAndXor(N1, 1, N0)) return SDValue(); // Don't do anything if the mask is constant. This should not be reachable. @@ -5428,16 +5434,22 @@ if (!TLI.hasAndNot(M)) return SDValue(); - // If Y is a constant, check that 'andn' works with immediates. - if (!TLI.hasAndNot(Y)) - return SDValue(); - SDLoc DL(N); + // If Y is a constant, check that 'andn' works with immediates. + if (!TLI.hasAndNot(Y)) { + assert(TLI.hasAndNot(X) && "Only mask is a variable? Unreachable."); + // If not, we need to do a bit more work to make sure andn is still used. + SDValue NotX = DAG.getNOT(DL, X, VT); + SDValue LHS = DAG.getNode(ISD::AND, DL, VT, NotX, M); + SDValue NotLHS = DAG.getNOT(DL, LHS, VT); + SDValue RHS = DAG.getNode(ISD::OR, DL, VT, M, Y); + return DAG.getNode(ISD::AND, DL, VT, NotLHS, RHS); + } + SDValue LHS = DAG.getNode(ISD::AND, DL, VT, X, M); SDValue NotM = DAG.getNOT(DL, M, VT); SDValue RHS = DAG.getNode(ISD::AND, DL, VT, Y, NotM); - return DAG.getNode(ISD::OR, DL, VT, LHS, RHS); } Index: test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll =================================================================== --- test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll +++ test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll @@ -655,10 +655,9 @@ ; ; CHECK-BMI-LABEL: in_constant_varx_42: ; CHECK-BMI: # %bb.0: -; CHECK-BMI-NEXT: xorl $42, %edi -; CHECK-BMI-NEXT: andl %edx, %edi -; CHECK-BMI-NEXT: xorl $42, %edi -; CHECK-BMI-NEXT: movl %edi, %eax +; CHECK-BMI-NEXT: andnl %edx, %edi, %eax +; CHECK-BMI-NEXT: orl $42, %edx +; CHECK-BMI-NEXT: andnl %edx, %eax, %eax ; CHECK-BMI-NEXT: retq %n0 = xor i32 %x, 42 ; %x %n1 = and i32 %n0, %mask @@ -700,9 +699,10 @@ ; ; CHECK-BMI-LABEL: in_constant_varx_42_invmask: ; CHECK-BMI: # %bb.0: -; CHECK-BMI-NEXT: xorl $42, %edi -; CHECK-BMI-NEXT: andnl %edi, %edx, %eax -; CHECK-BMI-NEXT: xorl $42, %eax +; CHECK-BMI-NEXT: notl %edx +; CHECK-BMI-NEXT: andnl %edx, %edi, %eax +; CHECK-BMI-NEXT: orl $42, %edx +; CHECK-BMI-NEXT: andnl %edx, %eax, %eax ; CHECK-BMI-NEXT: retq %notmask = xor i32 %mask, -1 %n0 = xor i32 %x, 42 ; %x