Index: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td +++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td @@ -852,10 +852,9 @@ POOL32C_STEVA_LDEVA_FM_MM<0xa, 0x1>, ISA_MICROMIPS32_NOT_MIPS32R6, ASE_EVA; } -} -let DecoderNamespace = "MicroMips" in { - let Predicates = [InMicroMips] in - def LWXS_MM : LoadWordIndexedScaledMM<"lwxs", GPR32Opnd>, LWXS_FM_MM<0x118>; + + def LWXS_MM : LoadWordIndexedScaledMM<"lwxs", GPR32Opnd>, LWXS_FM_MM<0x118>, + ISA_MICROMIPS; /// Load and Store Instructions - unaligned def LWL_MM : MMRel, LoadLeftRightMM<"lwl", MipsLWL, GPR32Opnd, mem_mm_12, @@ -873,12 +872,12 @@ } let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { /// Load and Store Instructions - multiple - def SWM32_MM : StoreMultMM<"swm32", II_SWM>, LWM_FM_MM<0xd>; - def LWM32_MM : LoadMultMM<"lwm32", II_LWM>, LWM_FM_MM<0x5>; + def SWM32_MM : StoreMultMM<"swm32", II_SWM>, LWM_FM_MM<0xd>, ISA_MICROMIPS; + def LWM32_MM : LoadMultMM<"lwm32", II_LWM>, LWM_FM_MM<0x5>, ISA_MICROMIPS; /// Load and Store Pair Instructions - def SWP_MM : StorePairMM<"swp">, LWM_FM_MM<0x9>; - def LWP_MM : LoadPairMM<"lwp">, LWM_FM_MM<0x1>; + def SWP_MM : StorePairMM<"swp">, LWM_FM_MM<0x9>, ISA_MICROMIPS; + def LWP_MM : LoadPairMM<"lwp">, LWM_FM_MM<0x1>, ISA_MICROMIPS; /// Load and Store multiple pseudo Instructions class LoadWordMultMM : @@ -890,8 +889,8 @@ !strconcat(instr_asm, "\t$rt, $addr")> ; - def SWM_MM : StoreWordMultMM<"swm">; - def LWM_MM : LoadWordMultMM<"lwm">; + def SWM_MM : StoreWordMultMM<"swm">, ISA_MICROMIPS; + def LWM_MM : LoadWordMultMM<"lwm">, ISA_MICROMIPS; /// Move Conditional def MOVZ_I_MM : MMRel, CMov_I_I_FT<"movz", GPR32Opnd, GPR32Opnd, Index: llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s =================================================================== --- llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s +++ llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s @@ -1,6 +1,6 @@ -# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \ +# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips -show-inst \ # RUN: | FileCheck -check-prefix=CHECK-EL %s -# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \ +# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips -show-inst \ # RUN: | FileCheck -check-prefix=CHECK-EB %s # Check that the assembler can handle the documented syntax # for load and store instructions. @@ -24,26 +24,47 @@ # CHECK-EL: sc $2, 8($4) # encoding: [0x44,0x60,0x08,0xb0] # CHECK-EL: lwu $2, 8($4) # encoding: [0x44,0x60,0x08,0xe0] # CHECK-EL: lwxs $2, $3($4) # encoding: [0x64,0x00,0x18,0x11] +# CHECK-EL-NEXT: #