Index: lib/CodeGen/GlobalISel/LegalizerInfo.cpp
===================================================================
--- lib/CodeGen/GlobalISel/LegalizerInfo.cpp
+++ lib/CodeGen/GlobalISel/LegalizerInfo.cpp
@@ -562,6 +562,9 @@
     for (unsigned Opcode : FailedOpcodes)
       errs() << " " << MII.getName(Opcode);
     errs() << "\n";
+
+    report_fatal_error("ill-defined LegalizerInfo"
+                       ", try -debug-only=legalizer-info for details");
   }
 #endif
 }
Index: lib/Target/AArch64/AArch64LegalizerInfo.cpp
===================================================================
--- lib/Target/AArch64/AArch64LegalizerInfo.cpp
+++ lib/Target/AArch64/AArch64LegalizerInfo.cpp
@@ -179,9 +179,7 @@
 
   // Extensions
   getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
-      .legalFor({s1, s8, s16, s32, s64})
-      .maxScalar(0, s64)
-      .widenScalarToNextPow2(0);
+      .legalForCartesianProduct({s8, s16, s32, s64}, {s1, s8, s16, s32});
 
   // FP conversions
   getActionDefinitionsBuilder(G_FPTRUNC).legalFor(
@@ -227,7 +225,7 @@
       .unsupportedIf([&](const LegalityQuery &Query) {
         return Query.Types[0].getSizeInBits() != Query.Types[1].getSizeInBits();
       })
-      .legalFor({s64, p0});
+      .legalFor({{p0, s64}});
 
   // Casts for 32 and 64-bit width type are just copies.
   // Same for 128-bit width type, except they are on the FPR bank.
@@ -247,19 +245,14 @@
       .clampScalar(0, s8, s64)
       .widenScalarToNextPow2(0, /*Min*/ 8);
 
-  if (ST.hasLSE()) {
-    getActionDefinitionsBuilder(G_ATOMIC_CMPXCHG)
-        .legalForCartesianProduct({s8, s16, s32, s64}, {p0});
-  }
-
   if (ST.hasLSE()) {
     getActionDefinitionsBuilder(G_ATOMIC_CMPXCHG_WITH_SUCCESS)
-        .lowerFor({s8, s16, s32, s64});
+        .lowerForCartesianProduct({s8, s16, s32, s64}, {s1}, {p0});
 
     getActionDefinitionsBuilder(
         {G_ATOMICRMW_XCHG, G_ATOMICRMW_ADD, G_ATOMICRMW_SUB, G_ATOMICRMW_AND,
          G_ATOMICRMW_OR, G_ATOMICRMW_XOR, G_ATOMICRMW_MIN, G_ATOMICRMW_MAX,
-         G_ATOMICRMW_UMIN, G_ATOMICRMW_UMAX})
+         G_ATOMICRMW_UMIN, G_ATOMICRMW_UMAX, G_ATOMIC_CMPXCHG})
         .legalForCartesianProduct({s8, s16, s32, s64}, {p0});
   }
 
Index: lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -195,4 +195,5 @@
   }
 
   computeTables();
+  verify(*ST.getInstrInfo());
 }
Index: lib/Target/ARM/ARMLegalizerInfo.cpp
===================================================================
--- lib/Target/ARM/ARMLegalizerInfo.cpp
+++ lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -101,7 +101,8 @@
       setAction({Op, s32}, Libcall);
   }
 
-  getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT}).legalFor({s32});
+  getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
+      .legalForCartesianProduct({s32}, {s1, s8, s16});
 
   getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}});
   getActionDefinitionsBuilder(G_PTRTOINT).legalFor({{s32, p0}});
@@ -172,8 +173,8 @@
     else
       setFCmpLibcallsGNU();
 
-    getActionDefinitionsBuilder(G_FPEXT).libcallFor({s64, s32});
-    getActionDefinitionsBuilder(G_FPTRUNC).libcallFor({s32, s64});
+    getActionDefinitionsBuilder(G_FPEXT).libcallFor({{s64, s32}});
+    getActionDefinitionsBuilder(G_FPTRUNC).libcallFor({{s32, s64}});
 
     getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI})
         .libcallForCartesianProduct({s32}, {s32, s64});
@@ -189,6 +190,7 @@
   getActionDefinitionsBuilder({G_FREM, G_FPOW}).libcallFor({s32, s64});
 
   computeTables();
+  verify(*ST.getInstrInfo());
 }
 
 void ARMLegalizerInfo::setFCmpLibcallsAEABI() {
Index: lib/Target/Mips/MipsLegalizerInfo.cpp
===================================================================
--- lib/Target/Mips/MipsLegalizerInfo.cpp
+++ lib/Target/Mips/MipsLegalizerInfo.cpp
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "MipsLegalizerInfo.h"
+#include "MipsTargetMachine.h"
 
 using namespace llvm;
 
@@ -23,4 +24,5 @@
   getActionDefinitionsBuilder(G_ADD).legalFor({s32});
 
   computeTables();
+  verify(*ST.getInstrInfo());
 }
Index: lib/Target/X86/X86LegalizerInfo.cpp
===================================================================
--- lib/Target/X86/X86LegalizerInfo.cpp
+++ lib/Target/X86/X86LegalizerInfo.cpp
@@ -82,6 +82,7 @@
       G_CONSTANT, 0, widenToLargerTypesAndNarrowToLargest);
 
   computeTables();
+  verify(*STI.getInstrInfo());
 }
 
 void X86LegalizerInfo::setLegalizerInfo32bit() {
@@ -129,7 +130,7 @@
         .legalForCartesianProduct({s1, s8, s16, s32}, {p0})
         .maxScalar(0, s32)
         .widenScalarToNextPow2(0, /*Min*/ 8);
-    getActionDefinitionsBuilder(G_INTTOPTR).legalFor({s32, p0});
+    getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s32}});
 
     // Shifts and SDIV
     getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR, G_SDIV})
@@ -201,7 +202,7 @@
       .legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0})
       .maxScalar(0, s64)
       .widenScalarToNextPow2(0, /*Min*/ 8);
-  getActionDefinitionsBuilder(G_INTTOPTR).legalFor({s64, p0});
+  getActionDefinitionsBuilder(G_INTTOPTR).legalFor({{p0, s64}});
 
   // Constants
   setAction({TargetOpcode::G_CONSTANT, s64}, Legal);
Index: test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
@@ -1,9 +1,5 @@
 # RUN: not llc -mtriple=aarch64-- -run-pass=legalizer -simplify-mir %s -o - 2>&1 | FileCheck %s
 # REQUIRES: asserts
-# XFAIL: *
-
-# This is to demonstrate what kind of bugs we're missing w/o some kind of
-# validation for LegalizerInfo.
 
 # CHECK:      LLVM ERROR: unable to legalize instruction:
 # CHECK-SAME: %{{[0-9]+}}:_(s64) = G_INTTOPTR %{{[0-9]+}}:_(p0)
Index: test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
+++ test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
@@ -1,9 +1,5 @@
 # RUN: not llc -mtriple=aarch64-- -run-pass=legalizer -simplify-mir %s -o - 2>&1 | FileCheck %s
 # REQUIRES: asserts
-# XFAIL: *
-
-# This is to demonstrate what kind of bugs we're missing w/o some kind of
-# validation for LegalizerInfo.
 
 # CHECK:      LLVM ERROR: unable to legalize instruction:
 # CHECK-SAME: %{{[0-9]+}}:_(p0) = G_INTTOPTR %{{[0-9]+}}:_(<4 x s16>)
Index: test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
===================================================================
--- test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -1,8 +1,8 @@
 # RUN: llc -mtriple=aarch64-- -run-pass=legalizer %s \
-# RUN:     -mcpu=cortex-a75 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK       --match-full-lines
+# RUN:     -mcpu=cortex-a75 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK
 
 # RUN: llc -mtriple=aarch64-- -run-pass=legalizer %s -debug-only=legalizer-info \
-# RUN:     -mcpu=cortex-a75 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,DEBUG --match-full-lines
+# RUN:     -mcpu=cortex-a75 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,DEBUG
 
 # REQUIRES: asserts
 
@@ -73,7 +73,7 @@
 # DEBUG:      .. the first uncovered type index: 2, OK
 #
 # DEBUG-NEXT: G_INTTOPTR (opcode {{[0-9]+}}): 2 type indices
-# DEBUG:      .. the first uncovered type index: 1, FAIL
+# DEBUG:      .. the first uncovered type index: 2, OK
 #
 # DEBUG-NEXT: G_BITCAST (opcode {{[0-9]+}}): 2 type indices
 # DEBUG:      .. the first uncovered type index: 2, OK
@@ -91,7 +91,7 @@
 # DEBUG:      .. type index coverage check SKIPPED: user-defined predicate detected
 #
 # DEBUG-NEXT: G_ATOMIC_CMPXCHG_WITH_SUCCESS (opcode {{[0-9]+}}): 3 type indices
-# DEBUG:      .. the first uncovered type index: 1, FAIL
+# DEBUG:      .. the first uncovered type index: 3, OK
 #
 # DEBUG-NEXT: G_ATOMIC_CMPXCHG (opcode {{[0-9]+}}): 2 type indices
 # DEBUG:      .. the first uncovered type index: 2, OK
@@ -142,7 +142,7 @@
 # DEBUG:      .. type index coverage check SKIPPED: no rules defined
 #
 # DEBUG-NEXT: G_ANYEXT (opcode {{[0-9]+}}): 2 type indices
-# DEBUG:      .. the first uncovered type index: 1, FAIL
+# DEBUG:      .. the first uncovered type index: 2, OK
 #
 # DEBUG-NEXT: G_TRUNC (opcode {{[0-9]+}}): 2 type indices
 # DEBUG:      .. type index coverage check SKIPPED: no rules defined
@@ -160,10 +160,10 @@
 # DEBUG:      .. the first uncovered type index: 2, OK
 #
 # DEBUG-NEXT: G_SEXT (opcode {{[0-9]+}}): 2 type indices
-# DEBUG:      .. the first uncovered type index: 1, FAIL
+# DEBUG:      .. the first uncovered type index: 2, OK
 #
 # DEBUG-NEXT: G_ZEXT (opcode {{[0-9]+}}): 2 type indices
-# DEBUG:      .. the first uncovered type index: 1, FAIL
+# DEBUG:      .. the first uncovered type index: 2, OK
 #
 # DEBUG-NEXT: G_SHL (opcode {{[0-9]+}}): 1 type index
 # DEBUG:      .. the first uncovered type index: 1, OK
@@ -285,7 +285,7 @@
 # DEBUG-NEXT: G_BSWAP (opcode {{[0-9]+}}): 1 type index
 # DEBUG:      .. the first uncovered type index: 1, OK
 
-# CHECK: The following opcodes have ill-defined legalization rules: G_INTTOPTR G_ATOMIC_CMPXCHG_WITH_SUCCESS G_ANYEXT G_SEXT G_ZEXT
+# CHECK-NOT: ill-defined
 
 ---
 name: dummy