Index: lib/Target/AMDGPU/AMDGPUISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -785,6 +785,9 @@
 bool AMDGPUTargetLowering::isSDNodeSourceOfDivergence(const SDNode * N,
   FunctionLoweringInfo * FLI, DivergenceAnalysis * DA) const
 {
+  if (getTargetMachine().getTargetTriple().getArch() == Triple::r600)
+    return false;
+
   switch (N->getOpcode()) {
     case ISD::Register:
     case ISD::CopyFromReg:
@@ -809,10 +812,7 @@
         if (MRI.isLiveIn(Reg)) {
           // workitem.id.x workitem.id.y workitem.id.z
           // Any VGPR formal argument is also considered divergent
-          if ((MRI.getLiveInPhysReg(Reg) == AMDGPU::T0_X) ||
-              (MRI.getLiveInPhysReg(Reg) == AMDGPU::T0_Y) ||
-              (MRI.getLiveInPhysReg(Reg) == AMDGPU::T0_Z) ||
-              (TRI.isVGPR(MRI, Reg)))
+          if (TRI.isVGPR(MRI, Reg))
               return true;
           // Formal arguments of non-entry functions
           // are conservatively considered divergent