Index: lib/Target/AArch64/AArch64SVEInstrInfo.td
===================================================================
--- lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -354,6 +354,12 @@
   defm STNT1W_ZRR : sve_mem_cstnt_ss<0b10, "stnt1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
   defm STNT1D_ZRR : sve_mem_cstnt_ss<0b11, "stnt1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
 
+  // Fill/Spill
+  defm LDR_ZXI : sve_mem_z_fill<"ldr">;
+  defm LDR_PXI : sve_mem_p_fill<"ldr">;
+  defm STR_ZXI : sve_mem_z_spill<"str">;
+  defm STR_PXI : sve_mem_p_spill<"str">;
+
   defm ZIP1_ZZZ : sve_int_perm_bin_perm_zz<0b000, "zip1">;
   defm ZIP2_ZZZ : sve_int_perm_bin_perm_zz<0b001, "zip2">;
 
Index: lib/Target/AArch64/SVEInstrFormats.td
===================================================================
--- lib/Target/AArch64/SVEInstrFormats.td
+++ lib/Target/AArch64/SVEInstrFormats.td
@@ -779,6 +779,57 @@
                  (!cast<Instruction>(NAME) zprty:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, gprty:$Rm), 0>;
 }
 
+class sve_mem_z_spill<string asm>
+: I<(outs), (ins ZPRAny:$Zt, GPR64sp:$Rn, simm9:$imm9),
+  asm, "\t$Zt, [$Rn, $imm9, mul vl]",
+  "",
+  []>, Sched<[]> {
+  bits<5> Rn;
+  bits<5> Zt;
+  bits<9> imm9;
+  let Inst{31-22} = 0b1110010110;
+  let Inst{21-16} = imm9{8-3};
+  let Inst{15-13} = 0b010;
+  let Inst{12-10} = imm9{2-0};
+  let Inst{9-5}   = Rn;
+  let Inst{4-0}   = Zt;
+
+  let mayStore = 1;
+}
+
+multiclass sve_mem_z_spill<string asm> {
+  def NAME : sve_mem_z_spill<asm>;
+
+  def : InstAlias<asm # "\t$Zt, [$Rn]",
+                  (!cast<Instruction>(NAME) ZPRAny:$Zt, GPR64sp:$Rn, 0), 1>;
+}
+
+class sve_mem_p_spill<string asm>
+: I<(outs), (ins PPRAny:$Pt, GPR64sp:$Rn, simm9:$imm9),
+  asm, "\t$Pt, [$Rn, $imm9, mul vl]",
+  "",
+  []>, Sched<[]> {
+  bits<4> Pt;
+  bits<5> Rn;
+  bits<9> imm9;
+  let Inst{31-22} = 0b1110010110;
+  let Inst{21-16} = imm9{8-3};
+  let Inst{15-13} = 0b000;
+  let Inst{12-10} = imm9{2-0};
+  let Inst{9-5}   = Rn;
+  let Inst{4}     = 0b0;
+  let Inst{3-0}   = Pt;
+
+  let mayStore = 1;
+}
+
+multiclass sve_mem_p_spill<string asm> {
+  def NAME : sve_mem_p_spill<asm>;
+
+  def : InstAlias<asm # "\t$Pt, [$Rn]",
+                  (!cast<Instruction>(NAME) PPRAny:$Pt, GPR64sp:$Rn, 0), 1>;
+}
+
 //===----------------------------------------------------------------------===//
 // SVE Permute - Predicates Group
 //===----------------------------------------------------------------------===//
@@ -1187,6 +1238,57 @@
                   (!cast<Instruction>(NAME # _IMM_REAL) Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0), 1>;
 }
 
+class sve_mem_z_fill<string asm>
+: I<(outs ZPRAny:$Zt), (ins GPR64sp:$Rn, simm9:$imm9),
+  asm, "\t$Zt, [$Rn, $imm9, mul vl]",
+  "",
+  []>, Sched<[]> {
+  bits<5> Rn;
+  bits<5> Zt;
+  bits<9> imm9;
+  let Inst{31-22} = 0b1000010110;
+  let Inst{21-16} = imm9{8-3};
+  let Inst{15-13} = 0b010;
+  let Inst{12-10} = imm9{2-0};
+  let Inst{9-5}   = Rn;
+  let Inst{4-0}   = Zt;
+
+  let mayLoad = 1;
+}
+
+multiclass sve_mem_z_fill<string asm> {
+  def NAME : sve_mem_z_fill<asm>;
+
+  def : InstAlias<asm # "\t$Zt, [$Rn]",
+                  (!cast<Instruction>(NAME) ZPRAny:$Zt, GPR64sp:$Rn, 0), 1>;
+}
+
+class sve_mem_p_fill<string asm>
+: I<(outs PPRAny:$Pt), (ins GPR64sp:$Rn, simm9:$imm9),
+  asm, "\t$Pt, [$Rn, $imm9, mul vl]",
+  "",
+  []>, Sched<[]> {
+  bits<4> Pt;
+  bits<5> Rn;
+  bits<9> imm9;
+  let Inst{31-22} = 0b1000010110;
+  let Inst{21-16} = imm9{8-3};
+  let Inst{15-13} = 0b000;
+  let Inst{12-10} = imm9{2-0};
+  let Inst{9-5}   = Rn;
+  let Inst{4}     = 0b0;
+  let Inst{3-0}   = Pt;
+
+  let mayLoad = 1;
+}
+
+multiclass sve_mem_p_fill<string asm> {
+  def NAME : sve_mem_p_fill<asm>;
+
+  def : InstAlias<asm # "\t$Pt, [$Rn]",
+                  (!cast<Instruction>(NAME) PPRAny:$Pt, GPR64sp:$Rn, 0), 1>;
+}
+
 //===----------------------------------------------------------------------===//
 // SVE Memory - 64-bit Gather Group
 //===----------------------------------------------------------------------===//
@@ -1292,4 +1394,4 @@
                  (!cast<Instruction>(NAME # _IMM_REAL) ZPR64:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, imm_ty:$imm5), 0>;
   def : InstAlias<asm # "\t$Zt, $Pg/z, [$Zn]",
                   (!cast<Instruction>(NAME # _IMM_REAL) Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0), 1>;
-}
+}
\ No newline at end of file
Index: test/MC/AArch64/SVE/ldr-diagnostics.s
===================================================================
--- /dev/null
+++ test/MC/AArch64/SVE/ldr-diagnostics.s
@@ -0,0 +1,24 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Immediate out of upper bound [-256, 255].
+
+ldr p0, [x0, #-257, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: ldr p0, [x0, #-257, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldr p0, [x0, #256, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: ldr p0, [x0, #256, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldr z0, [x0, #-257, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: ldr z0, [x0, #-257, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ldr z0, [x0, #256, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: ldr z0, [x0, #256, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Index: test/MC/AArch64/SVE/ldr.s
===================================================================
--- /dev/null
+++ test/MC/AArch64/SVE/ldr.s
@@ -0,0 +1,44 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+ldr     z0, [x0]
+// CHECK-INST: ldr     z0, [x0]
+// CHECK-ENCODING: [0x00,0x40,0x80,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 40 80 85 <unknown>
+
+ldr     z31, [sp, #-256, mul vl]
+// CHECK-INST: ldr     z31, [sp, #-256, mul vl]
+// CHECK-ENCODING: [0xff,0x43,0xa0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 43 a0 85 <unknown>
+
+ldr     z23, [x13, #255, mul vl]
+// CHECK-INST: ldr     z23, [x13, #255, mul vl]
+// CHECK-ENCODING: [0xb7,0x5d,0x9f,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: b7 5d 9f 85 <unknown>
+
+ldr     p0, [x0]
+// CHECK-INST: ldr     p0, [x0]
+// CHECK-ENCODING: [0x00,0x00,0x80,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 00 80 85 <unknown>
+
+ldr     p7, [x13, #-256, mul vl]
+// CHECK-INST: ldr     p7, [x13, #-256, mul vl]
+// CHECK-ENCODING: [0xa7,0x01,0xa0,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: a7 01 a0 85 <unknown>
+
+ldr     p5, [x10, #255, mul vl]
+// CHECK-INST: ldr     p5, [x10, #255, mul vl]
+// CHECK-ENCODING: [0x45,0x1d,0x9f,0x85]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 45 1d 9f 85 <unknown>
Index: test/MC/AArch64/SVE/str-diagnostics.s
===================================================================
--- /dev/null
+++ test/MC/AArch64/SVE/str-diagnostics.s
@@ -0,0 +1,24 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// --------------------------------------------------------------------------//
+// Immediate out of upper bound [-256, 255].
+
+str p0, [x0, #-257, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: str p0, [x0, #-257, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+str p0, [x0, #256, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: str p0, [x0, #256, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+str z0, [x0, #-257, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: str z0, [x0, #-257, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+str z0, [x0, #256, MUL VL]
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-256, 255].
+// CHECK-NEXT: str z0, [x0, #256, MUL VL]
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
Index: test/MC/AArch64/SVE/str.s
===================================================================
--- /dev/null
+++ test/MC/AArch64/SVE/str.s
@@ -0,0 +1,44 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+str     z0, [x0]
+// CHECK-INST: str     z0, [x0]
+// CHECK-ENCODING: [0x00,0x40,0x80,0xe5]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 40 80 e5 <unknown>
+
+str     z21, [x10, #-256, mul vl]
+// CHECK-INST: str     z21, [x10, #-256, mul vl]
+// CHECK-ENCODING: [0x55,0x41,0xa0,0xe5]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 55 41 a0 e5 <unknown>
+
+str     z31, [sp, #255, mul vl]
+// CHECK-INST: str     z31, [sp, #255, mul vl]
+// CHECK-ENCODING: [0xff,0x5f,0x9f,0xe5]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ff 5f 9f e5 <unknown>
+
+str     p0, [x0]
+// CHECK-INST: str     p0, [x0]
+// CHECK-ENCODING: [0x00,0x00,0x80,0xe5]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 00 80 e5 <unknown>
+
+str     p15, [sp, #-256, mul vl]
+// CHECK-INST: str     p15, [sp, #-256, mul vl]
+// CHECK-ENCODING: [0xef,0x03,0xa0,0xe5]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: ef 03 a0 e5 <unknown>
+
+str     p5, [x10, #255, mul vl]
+// CHECK-INST: str     p5, [x10, #255, mul vl]
+// CHECK-ENCODING: [0x45,0x1d,0x9f,0xe5]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 45 1d 9f e5 <unknown>