Index: include/clang/Driver/Options.td
===================================================================
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1092,6 +1092,9 @@
 def mno_avx512cd : Flag<["-"], "mno-avx512cd">, Group<m_x86_Features_Group>;
 def mno_avx512er : Flag<["-"], "mno-avx512er">, Group<m_x86_Features_Group>;
 def mno_avx512pf : Flag<["-"], "mno-avx512pf">, Group<m_x86_Features_Group>;
+def mno_avx512dq : Flag<["-"], "mno-avx512dq">, Group<m_x86_Features_Group>;
+def mno_avx512bw : Flag<["-"], "mno-avx512bw">, Group<m_x86_Features_Group>;
+def mno_avx512vl : Flag<["-"], "mno-avx512vl">, Group<m_x86_Features_Group>;
 def mno_pclmul : Flag<["-"], "mno-pclmul">, Group<m_x86_Features_Group>;
 def mno_lzcnt : Flag<["-"], "mno-lzcnt">, Group<m_x86_Features_Group>;
 def mno_rdrnd : Flag<["-"], "mno-rdrnd">, Group<m_x86_Features_Group>;
@@ -1186,6 +1189,9 @@
 def mavx512cd : Flag<["-"], "mavx512cd">, Group<m_x86_Features_Group>;
 def mavx512er : Flag<["-"], "mavx512er">, Group<m_x86_Features_Group>;
 def mavx512pf : Flag<["-"], "mavx512pf">, Group<m_x86_Features_Group>;
+def mavx512dq : Flag<["-"], "mavx512dq">, Group<m_x86_Features_Group>;
+def mavx512bw : Flag<["-"], "mavx512bw">, Group<m_x86_Features_Group>;
+def mavx512vl : Flag<["-"], "mavx512vl">, Group<m_x86_Features_Group>;
 def mpclmul : Flag<["-"], "mpclmul">, Group<m_x86_Features_Group>;
 def mlzcnt : Flag<["-"], "mlzcnt">, Group<m_x86_Features_Group>;
 def mrdrnd : Flag<["-"], "mrdrnd">, Group<m_x86_Features_Group>;
Index: lib/Basic/Targets.cpp
===================================================================
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -1666,7 +1666,7 @@
   bool HasTBM;
   bool HasFMA;
   bool HasF16C;
-  bool HasAVX512CD, HasAVX512ER, HasAVX512PF;
+  bool HasAVX512CD, HasAVX512ER, HasAVX512PF, HasAVX512DQ, HasAVX512BW, HasAVX512VL;
   bool HasSHA;
   bool HasCX16;
 
@@ -1758,6 +1758,10 @@
     /// Knights Landing processor.
     CK_KNL,
 
+    /// \name Skylake Server
+    /// Skylake server processor.
+    CK_SKX,
+
     /// \name K6
     /// K6 architecture processors.
     //@{
@@ -1831,7 +1835,8 @@
         HasRDRND(false), HasBMI(false), HasBMI2(false), HasPOPCNT(false),
         HasRTM(false), HasPRFCHW(false), HasRDSEED(false), HasTBM(false),
         HasFMA(false), HasF16C(false), HasAVX512CD(false), HasAVX512ER(false),
-        HasAVX512PF(false), HasSHA(false), HasCX16(false), CPU(CK_Generic),
+        HasAVX512PF(false), HasAVX512DQ(false), HasAVX512BW(false), HasAVX512VL(false),
+        HasSHA(false), HasCX16(false), CPU(CK_Generic),
         FPMath(FP_Default) {
     BigEndian = false;
     LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
@@ -1925,6 +1930,7 @@
       .Case("core-avx-i", CK_CoreAVXi)
       .Case("core-avx2", CK_CoreAVX2)
       .Case("knl", CK_KNL)
+      .Case("skx", CK_SKX)
       .Case("k6", CK_K6)
       .Case("k6-2", CK_K6_2)
       .Case("k6-3", CK_K6_3)
@@ -2003,6 +2009,7 @@
     case CK_CoreAVXi:
     case CK_CoreAVX2:
     case CK_KNL:
+    case CK_SKX:
     case CK_Athlon64:
     case CK_Athlon64SSE3:
     case CK_AthlonFX:
@@ -2151,6 +2158,22 @@
     setFeatureEnabledImpl(Features, "rtm", true);
     setFeatureEnabledImpl(Features, "fma", true);
     break;
+  case CK_SKX:
+    setFeatureEnabledImpl(Features, "avx512f", true);
+    setFeatureEnabledImpl(Features, "avx512cd", true);
+    setFeatureEnabledImpl(Features, "avx512dq", true);
+    setFeatureEnabledImpl(Features, "avx512bw", true);
+    setFeatureEnabledImpl(Features, "avx512vl", true);
+    setFeatureEnabledImpl(Features, "aes", true);
+    setFeatureEnabledImpl(Features, "pclmul", true);
+    setFeatureEnabledImpl(Features, "lzcnt", true);
+    setFeatureEnabledImpl(Features, "rdrnd", true);
+    setFeatureEnabledImpl(Features, "f16c", true);
+    setFeatureEnabledImpl(Features, "bmi", true);
+    setFeatureEnabledImpl(Features, "bmi2", true);
+    setFeatureEnabledImpl(Features, "rtm", true);
+    setFeatureEnabledImpl(Features, "fma", true);
+    break;
   case CK_K6:
   case CK_WinChipC6:
     setFeatureEnabledImpl(Features, "mmx", true);
@@ -2292,8 +2315,8 @@
   case AVX2:
     Features["avx2"] = false;
   case AVX512F:
-    Features["avx512f"] = Features["avx512cd"] = Features["avx512er"] =
-      Features["avx512pf"] = false;
+    Features["avx512f"] = Features["avx512cd"] = Features["avx512er"] = Features["avx512pf"] =
+    Features["avx512dq"] = Features["avx512bw"] = Features["avx512vl"] = false;
   }
 }
 
@@ -2392,7 +2415,8 @@
     setSSELevel(Features, AVX2, Enabled);
   } else if (Name == "avx512f") {
     setSSELevel(Features, AVX512F, Enabled);
-  } else if (Name == "avx512cd" || Name == "avx512er" || Name == "avx512pf") {
+  } else if (Name == "avx512cd" || Name == "avx512er" || Name == "avx512pf"
+          || Name == "avx512dq" || Name == "avx512bw" || Name == "avx512vl") {
     if (Enabled)
       setSSELevel(Features, AVX512F, Enabled);
   } else if (Name == "fma") {
@@ -2505,6 +2529,21 @@
       continue;
     }
 
+    if (Feature == "avx512dq") {
+      HasAVX512DQ = true;
+      continue;
+    }
+
+    if (Feature == "avx512bw") {
+      HasAVX512BW = true;
+      continue;
+    }
+
+    if (Feature == "avx512vl") {
+      HasAVX512VL = true;
+      continue;
+    }
+
     if (Feature == "sha") {
       HasSHA = true;
       continue;
@@ -2671,6 +2710,9 @@
   case CK_KNL:
     defineCPUMacros(Builder, "knl");
     break;
+  case CK_SKX:
+    defineCPUMacros(Builder, "skx");
+    break;
   case CK_K6_2:
     Builder.defineMacro("__k6_2__");
     Builder.defineMacro("__tune_k6_2__");
@@ -2798,6 +2840,12 @@
     Builder.defineMacro("__AVX512ER__");
   if (HasAVX512PF)
     Builder.defineMacro("__AVX512PF__");
+  if (HasAVX512DQ)
+    Builder.defineMacro("__AVX512DQ__");
+  if (HasAVX512BW)
+    Builder.defineMacro("__AVX512BW__");
+  if (HasAVX512VL)
+    Builder.defineMacro("__AVX512VL__");
 
   if (HasSHA)
     Builder.defineMacro("__SHA__");
@@ -2881,6 +2929,9 @@
       .Case("avx512cd", HasAVX512CD)
       .Case("avx512er", HasAVX512ER)
       .Case("avx512pf", HasAVX512PF)
+      .Case("avx512dq", HasAVX512DQ)
+      .Case("avx512bw", HasAVX512BW)
+      .Case("avx512vl", HasAVX512VL)
       .Case("bmi", HasBMI)
       .Case("bmi2", HasBMI2)
       .Case("cx16", HasCX16)
Index: test/Preprocessor/predefined-arch-macros.c
===================================================================
--- test/Preprocessor/predefined-arch-macros.c
+++ test/Preprocessor/predefined-arch-macros.c
@@ -594,6 +594,7 @@
 // CHECK_KNL_M32: #define __knl__ 1
 // CHECK_KNL_M32: #define __tune_knl__ 1
 // CHECK_KNL_M32: #define i386 1
+
 // RUN: %clang -march=knl -m64 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck %s -check-prefix=CHECK_KNL_M64
@@ -630,6 +631,77 @@
 // CHECK_KNL_M64: #define __x86_64 1
 // CHECK_KNL_M64: #define __x86_64__ 1
 //
+// RUN: %clang -march=skx -m32 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck %s -check-prefix=CHECK_SKX_M32
+// CHECK_SKX_M32: #define __AES__ 1
+// CHECK_SKX_M32: #define __AVX2__ 1
+// CHECK_SKX_M32: #define __AVX512BW__ 1
+// CHECK_SKX_M32: #define __AVX512CD__ 1
+// CHECK_SKX_M32: #define __AVX512DQ__ 1
+// CHECK_SKX_M32: #define __AVX512F__ 1
+// CHECK_SKX_M32: #define __AVX512VL__ 1
+// CHECK_SKX_M32: #define __AVX__ 1
+// CHECK_SKX_M32: #define __BMI2__ 1
+// CHECK_SKX_M32: #define __BMI__ 1
+// CHECK_SKX_M32: #define __F16C__ 1
+// CHECK_SKX_M32: #define __FMA__ 1
+// CHECK_SKX_M32: #define __LZCNT__ 1
+// CHECK_SKX_M32: #define __MMX__ 1
+// CHECK_SKX_M32: #define __PCLMUL__ 1
+// CHECK_SKX_M32: #define __POPCNT__ 1
+// CHECK_SKX_M32: #define __RDRND__ 1
+// CHECK_SKX_M32: #define __RTM__ 1
+// CHECK_SKX_M32: #define __SSE2__ 1
+// CHECK_SKX_M32: #define __SSE3__ 1
+// CHECK_SKX_M32: #define __SSE4_1__ 1
+// CHECK_SKX_M32: #define __SSE4_2__ 1
+// CHECK_SKX_M32: #define __SSE__ 1
+// CHECK_SKX_M32: #define __SSSE3__ 1
+// CHECK_SKX_M32: #define __i386 1
+// CHECK_SKX_M32: #define __i386__ 1
+// CHECK_SKX_M32: #define __skx 1
+// CHECK_SKX_M32: #define __skx__ 1
+// CHECK_SKX_M32: #define __tune_skx__ 1
+// CHECK_SKX_M32: #define i386 1
+
+// RUN: %clang -march=skx -m64 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck %s -check-prefix=CHECK_SKX_M64
+// CHECK_SKX_M64: #define __AES__ 1
+// CHECK_SKX_M64: #define __AVX2__ 1
+// CHECK_SKX_M64: #define __AVX512BW__ 1
+// CHECK_SKX_M64: #define __AVX512CD__ 1
+// CHECK_SKX_M64: #define __AVX512DQ__ 1
+// CHECK_SKX_M64: #define __AVX512F__ 1
+// CHECK_SKX_M64: #define __AVX512VL__ 1
+// CHECK_SKX_M64: #define __AVX__ 1
+// CHECK_SKX_M64: #define __BMI2__ 1
+// CHECK_SKX_M64: #define __BMI__ 1
+// CHECK_SKX_M64: #define __F16C__ 1
+// CHECK_SKX_M64: #define __FMA__ 1
+// CHECK_SKX_M64: #define __LZCNT__ 1
+// CHECK_SKX_M64: #define __MMX__ 1
+// CHECK_SKX_M64: #define __PCLMUL__ 1
+// CHECK_SKX_M64: #define __POPCNT__ 1
+// CHECK_SKX_M64: #define __RDRND__ 1
+// CHECK_SKX_M64: #define __RTM__ 1
+// CHECK_SKX_M64: #define __SSE2_MATH__ 1
+// CHECK_SKX_M64: #define __SSE2__ 1
+// CHECK_SKX_M64: #define __SSE3__ 1
+// CHECK_SKX_M64: #define __SSE4_1__ 1
+// CHECK_SKX_M64: #define __SSE4_2__ 1
+// CHECK_SKX_M64: #define __SSE_MATH__ 1
+// CHECK_SKX_M64: #define __SSE__ 1
+// CHECK_SKX_M64: #define __SSSE3__ 1
+// CHECK_SKX_M64: #define __amd64 1
+// CHECK_SKX_M64: #define __amd64__ 1
+// CHECK_SKX_M64: #define __skx 1
+// CHECK_SKX_M64: #define __skx__ 1
+// CHECK_SKX_M64: #define __tune_skx__ 1
+// CHECK_SKX_M64: #define __x86_64 1
+// CHECK_SKX_M64: #define __x86_64__ 1
+//
 // RUN: %clang -march=atom -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck %s -check-prefix=CHECK_ATOM_M32
Index: test/Preprocessor/x86_target_features.c
===================================================================
--- test/Preprocessor/x86_target_features.c
+++ test/Preprocessor/x86_target_features.c
@@ -114,6 +114,51 @@
 // AVX512PF: #define __SSE__ 1
 // AVX512PF: #define __SSSE3__ 1
 
+// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512dq -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512DQ %s
+
+// AVX512DQ: #define __AVX2__ 1
+// AVX512DQ: #define __AVX512DQ__ 1
+// AVX512DQ: #define __AVX512F__ 1
+// AVX512DQ: #define __AVX__ 1
+// AVX512DQ: #define __SSE2_MATH__ 1
+// AVX512DQ: #define __SSE2__ 1
+// AVX512DQ: #define __SSE3__ 1
+// AVX512DQ: #define __SSE4_1__ 1
+// AVX512DQ: #define __SSE4_2__ 1
+// AVX512DQ: #define __SSE_MATH__ 1
+// AVX512DQ: #define __SSE__ 1
+// AVX512DQ: #define __SSSE3__ 1
+
+// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512bw -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512BW %s
+
+// AVX512BW: #define __AVX2__ 1
+// AVX512BW: #define __AVX512BW__ 1
+// AVX512BW: #define __AVX512F__ 1
+// AVX512BW: #define __AVX__ 1
+// AVX512BW: #define __SSE2_MATH__ 1
+// AVX512BW: #define __SSE2__ 1
+// AVX512BW: #define __SSE3__ 1
+// AVX512BW: #define __SSE4_1__ 1
+// AVX512BW: #define __SSE4_2__ 1
+// AVX512BW: #define __SSE_MATH__ 1
+// AVX512BW: #define __SSE__ 1
+// AVX512BW: #define __SSSE3__ 1
+
+// RUN: %clang -target i386-unknown-unknown -march=atom -mavx512vl -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512VL %s
+
+// AVX512VL: #define __AVX2__ 1
+// AVX512VL: #define __AVX512F__ 1
+// AVX512VL: #define __AVX512VL__ 1
+// AVX512VL: #define __AVX__ 1
+// AVX512VL: #define __SSE2_MATH__ 1
+// AVX512VL: #define __SSE2__ 1
+// AVX512VL: #define __SSE3__ 1
+// AVX512VL: #define __SSE4_1__ 1
+// AVX512VL: #define __SSE4_2__ 1
+// AVX512VL: #define __SSE_MATH__ 1
+// AVX512VL: #define __SSE__ 1
+// AVX512VL: #define __SSSE3__ 1
+
 // RUN: %clang -target i386-unknown-unknown -march=atom -mavx512pf -mno-avx512f -x c -E -dM -o - %s | FileCheck --check-prefix=AVX512F2 %s
 
 // AVX512F2: #define __AVX2__ 1