Index: llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
===================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
@@ -3178,7 +3178,7 @@
   def : Pat<(i32 (fp_to_uint f128:$src)),
             (i32 (MFVSRWZ (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC)))>;
 
-  // Instructions for fptosint (i64,i16,i8) feeding a store.
+  // Instructions for store(fptosi).
   // The 8-byte version is repeated here due to availability of D-Form STXSD.
   def : Pat<(PPCstore_scal_int_from_vsr
               (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), xaddr:$dst, 8),
@@ -3192,6 +3192,12 @@
               (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), xoaddr:$dst, 4),
             (STXSIWX (COPY_TO_REGCLASS (XSCVQPSWZ $src), VFRC), xoaddr:$dst)>;
   def : Pat<(PPCstore_scal_int_from_vsr
+              (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), xoaddr:$dst, 2),
+            (STXSIHX (COPY_TO_REGCLASS (XSCVQPSWZ $src), VFRC), xoaddr:$dst)>;
+  def : Pat<(PPCstore_scal_int_from_vsr
+              (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), xoaddr:$dst, 1),
+            (STXSIBX (COPY_TO_REGCLASS (XSCVQPSWZ $src), VFRC), xoaddr:$dst)>;
+  def : Pat<(PPCstore_scal_int_from_vsr
               (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), xaddr:$dst, 8),
             (STXSDX (XSCVDPSXDS f64:$src), xaddr:$dst)>;
   def : Pat<(PPCstore_scal_int_from_vsr
@@ -3204,7 +3210,7 @@
               (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), xoaddr:$dst, 1),
             (STXSIBX (XSCVDPSXWS f64:$src), xoaddr:$dst)>;
 
-  // Instructions for fptouint (i64,i16,i8) feeding a store.
+  // Instructions for store(fptoui).
   def : Pat<(PPCstore_scal_int_from_vsr
               (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), xaddr:$dst, 8),
             (STXSDX (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC),
@@ -3217,6 +3223,12 @@
               (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), xoaddr:$dst, 4),
             (STXSIWX (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC), xoaddr:$dst)>;
   def : Pat<(PPCstore_scal_int_from_vsr
+              (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), xoaddr:$dst, 2),
+            (STXSIHX (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC), xoaddr:$dst)>;
+  def : Pat<(PPCstore_scal_int_from_vsr
+              (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), xoaddr:$dst, 1),
+            (STXSIBX (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC), xoaddr:$dst)>;
+  def : Pat<(PPCstore_scal_int_from_vsr
               (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), xaddr:$dst, 8),
             (STXSDX (XSCVDPUXDS f64:$src), xaddr:$dst)>;
   def : Pat<(PPCstore_scal_int_from_vsr
Index: llvm/trunk/test/CodeGen/PowerPC/f128-truncateNconv.ll
===================================================================
--- llvm/trunk/test/CodeGen/PowerPC/f128-truncateNconv.ll
+++ llvm/trunk/test/CodeGen/PowerPC/f128-truncateNconv.ll
@@ -345,3 +345,313 @@
 ; CHECK-NEXT: stxsiwx [[CONV]], 0, 5
 ; CHECK: blr
 }
+
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+
+; Function Attrs: norecurse nounwind readonly
+define signext i16 @qpConv2shw(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2shw:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    extsh 3, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %conv = fptosi fp128 %0 to i16
+  ret i16 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2shw_02(i16* nocapture %res) {
+; CHECK-LABEL: qpConv2shw_02:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 2, 32(4)
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    stxsihx 2, 0, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 2), align 16
+  %conv = fptosi fp128 %0 to i16
+  store i16 %conv, i16* %res, align 2
+  ret void
+}
+
+; Function Attrs: norecurse nounwind readonly
+define signext i16 @qpConv2shw_03(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2shw_03:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 3, 16(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    extsh 3, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 1), align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptosi fp128 %add to i16
+  ret i16 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2shw_04(fp128* nocapture readonly %a,
+                           fp128* nocapture readonly %b, i16* nocapture %res) {
+; CHECK-LABEL: qpConv2shw_04:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    lxv 3, 0(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    stxsihx 2, 0, 5
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* %b, align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptosi fp128 %add to i16
+  store i16 %conv, i16* %res, align 2
+  ret void
+}
+
+; Function Attrs: norecurse nounwind readonly
+define zeroext i16 @qpConv2uhw(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2uhw:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    clrldi 3, 3, 32
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %conv = fptoui fp128 %0 to i16
+  ret i16 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2uhw_02(i16* nocapture %res) {
+; CHECK-LABEL: qpConv2uhw_02:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 2, 32(4)
+; CHECK-NEXT:    xscvqpuwz 2, 2
+; CHECK-NEXT:    stxsihx 2, 0, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 2), align 16
+  %conv = fptoui fp128 %0 to i16
+  store i16 %conv, i16* %res, align 2
+  ret void
+}
+
+; Function Attrs: norecurse nounwind readonly
+define zeroext i16 @qpConv2uhw_03(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2uhw_03:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 3, 16(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    clrldi 3, 3, 32
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 1), align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptoui fp128 %add to i16
+  ret i16 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2uhw_04(fp128* nocapture readonly %a,
+                           fp128* nocapture readonly %b, i16* nocapture %res) {
+; CHECK-LABEL: qpConv2uhw_04:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    lxv 3, 0(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpuwz 2, 2
+; CHECK-NEXT:    stxsihx 2, 0, 5
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* %b, align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptoui fp128 %add to i16
+  store i16 %conv, i16* %res, align 2
+  ret void
+}
+
+; Function Attrs: norecurse nounwind readonly
+define signext i8 @qpConv2sb(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2sb:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    extsb 3, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %conv = fptosi fp128 %0 to i8
+  ret i8 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2sb_02(i8* nocapture %res) {
+; CHECK-LABEL: qpConv2sb_02:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 2, 32(4)
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    stxsibx 2, 0, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 2), align 16
+  %conv = fptosi fp128 %0 to i8
+  store i8 %conv, i8* %res, align 1
+  ret void
+}
+
+; Function Attrs: norecurse nounwind readonly
+define signext i8 @qpConv2sb_03(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2sb_03:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 3, 16(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    extsb 3, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 1), align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptosi fp128 %add to i8
+  ret i8 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2sb_04(fp128* nocapture readonly %a,
+                          fp128* nocapture readonly %b, i8* nocapture %res) {
+; CHECK-LABEL: qpConv2sb_04:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    lxv 3, 0(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    stxsibx 2, 0, 5
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* %b, align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptosi fp128 %add to i8
+  store i8 %conv, i8* %res, align 1
+  ret void
+}
+
+; Function Attrs: norecurse nounwind readonly
+define zeroext i8 @qpConv2ub(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2ub:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    clrldi 3, 3, 32
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %conv = fptoui fp128 %0 to i8
+  ret i8 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2ub_02(i8* nocapture %res) {
+; CHECK-LABEL: qpConv2ub_02:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 2, 32(4)
+; CHECK-NEXT:    xscvqpuwz 2, 2
+; CHECK-NEXT:    stxsibx 2, 0, 3
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 2), align 16
+  %conv = fptoui fp128 %0 to i8
+  store i8 %conv, i8* %res, align 1
+  ret void
+}
+
+; Function Attrs: norecurse nounwind readonly
+define zeroext i8 @qpConv2ub_03(fp128* nocapture readonly %a) {
+; CHECK-LABEL: qpConv2ub_03:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    ld 4, .LC0@toc@l(4)
+; CHECK-NEXT:    lxv 3, 16(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpswz 2, 2
+; CHECK-NEXT:    mfvsrwz 3, 2
+; CHECK-NEXT:    clrldi 3, 3, 32
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* getelementptr inbounds
+                            ([4 x fp128], [4 x fp128]* @f128Array,
+                             i64 0, i64 1), align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptoui fp128 %add to i8
+  ret i8 %conv
+}
+
+; Function Attrs: norecurse nounwind
+define void @qpConv2ub_04(fp128* nocapture readonly %a,
+                          fp128* nocapture readonly %b, i8* nocapture %res) {
+; CHECK-LABEL: qpConv2ub_04:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lxv 2, 0(3)
+; CHECK-NEXT:    lxv 3, 0(4)
+; CHECK-NEXT:    xsaddqp 2, 2, 3
+; CHECK-NEXT:    xscvqpuwz 2, 2
+; CHECK-NEXT:    stxsibx 2, 0, 5
+; CHECK-NEXT:    blr
+entry:
+  %0 = load fp128, fp128* %a, align 16
+  %1 = load fp128, fp128* %b, align 16
+  %add = fadd fp128 %0, %1
+  %conv = fptoui fp128 %add to i8
+  store i8 %conv, i8* %res, align 1
+  ret void
+}