Index: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td +++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td @@ -769,17 +769,17 @@ /// Shift Instructions def SLL_MM : MMRel, shift_rotate_imm<"sll", uimm5, GPR32Opnd, II_SLL>, - SRA_FM_MM<0, 0>; + SRA_FM_MM<0, 0>, ISA_MICROMIPS; def SRL_MM : MMRel, shift_rotate_imm<"srl", uimm5, GPR32Opnd, II_SRL>, - SRA_FM_MM<0x40, 0>; + SRA_FM_MM<0x40, 0>, ISA_MICROMIPS; def SRA_MM : MMRel, shift_rotate_imm<"sra", uimm5, GPR32Opnd, II_SRA>, - SRA_FM_MM<0x80, 0>; + SRA_FM_MM<0x80, 0>, ISA_MICROMIPS; def SLLV_MM : MMRel, shift_rotate_reg<"sllv", GPR32Opnd, II_SLLV>, - SRLV_FM_MM<0x10, 0>; + SRLV_FM_MM<0x10, 0>, ISA_MICROMIPS; def SRLV_MM : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV>, - SRLV_FM_MM<0x50, 0>; + SRLV_FM_MM<0x50, 0>, ISA_MICROMIPS; def SRAV_MM : MMRel, shift_rotate_reg<"srav", GPR32Opnd, II_SRAV>, - SRLV_FM_MM<0x90, 0>; + SRLV_FM_MM<0x90, 0>, ISA_MICROMIPS; def ROTR_MM : MMRel, shift_rotate_imm<"rotr", uimm5, GPR32Opnd, II_ROTR>, SRA_FM_MM<0xc0, 0> { list Pattern = [(set GPR32Opnd:$rd, Index: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td =================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td @@ -2010,24 +2010,22 @@ def NOR : MMRel, StdMMR6Rel, LogicNOR<"nor", GPR32Opnd>, ADD_FM<0, 0x27>; } -/// Shift Instructions let AdditionalPredicates = [NotInMicroMips] in { -def SLL : MMRel, shift_rotate_imm<"sll", uimm5, GPR32Opnd, II_SLL, shl, - immZExt5>, SRA_FM<0, 0>; -def SRL : MMRel, shift_rotate_imm<"srl", uimm5, GPR32Opnd, II_SRL, srl, - immZExt5>, SRA_FM<2, 0>; -def SRA : MMRel, shift_rotate_imm<"sra", uimm5, GPR32Opnd, II_SRA, sra, - immZExt5>, SRA_FM<3, 0>; -def SLLV : MMRel, shift_rotate_reg<"sllv", GPR32Opnd, II_SLLV, shl>, - SRLV_FM<4, 0>; -def SRLV : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV, srl>, - SRLV_FM<6, 0>; -def SRAV : MMRel, shift_rotate_reg<"srav", GPR32Opnd, II_SRAV, sra>, - SRLV_FM<7, 0>; -} + /// Shift Instructions + def SLL : MMRel, shift_rotate_imm<"sll", uimm5, GPR32Opnd, II_SLL, shl, + immZExt5>, SRA_FM<0, 0>, ISA_MIPS1; + def SRL : MMRel, shift_rotate_imm<"srl", uimm5, GPR32Opnd, II_SRL, srl, + immZExt5>, SRA_FM<2, 0>, ISA_MIPS1; + def SRA : MMRel, shift_rotate_imm<"sra", uimm5, GPR32Opnd, II_SRA, sra, + immZExt5>, SRA_FM<3, 0>, ISA_MIPS1; + def SLLV : MMRel, shift_rotate_reg<"sllv", GPR32Opnd, II_SLLV, shl>, + SRLV_FM<4, 0>, ISA_MIPS1; + def SRLV : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV, srl>, + SRLV_FM<6, 0>, ISA_MIPS1; + def SRAV : MMRel, shift_rotate_reg<"srav", GPR32Opnd, II_SRAV, sra>, + SRLV_FM<7, 0>, ISA_MIPS1; -// Rotate Instructions -let AdditionalPredicates = [NotInMicroMips] in { + // Rotate Instructions def ROTR : MMRel, shift_rotate_imm<"rotr", uimm5, GPR32Opnd, II_ROTR, rotr, immZExt5>, SRA_FM<2, 1>, ISA_MIPS32R2; Index: llvm/trunk/test/MC/Mips/micromips/valid.s =================================================================== --- llvm/trunk/test/MC/Mips/micromips/valid.s +++ llvm/trunk/test/MC/Mips/micromips/valid.s @@ -97,11 +97,17 @@ # CHECK-NEXT: #