Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp =================================================================== --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -5383,29 +5383,32 @@ // There are 3 commutable operators in the pattern, // so we have to deal with 8 possible variants of the basic pattern. - SDValue X, Y, M; - auto matchAndXor = [&X, &Y, &M](SDValue And, unsigned XorIdx, SDValue Other) { + SDValue A, D, X, Y, M; + auto matchAndXor = [&A, &D, &X, &Y, &M](SDValue And, unsigned XorIdx, + SDValue Other) { if (And.getOpcode() != ISD::AND || !And.hasOneUse()) return false; - if (And.getOperand(XorIdx).getOpcode() != ISD::XOR || - !And.getOperand(XorIdx).hasOneUse()) + SDValue Xor = And.getOperand(XorIdx); + if (Xor.getOpcode() != ISD::XOR || !Xor.hasOneUse()) return false; - SDValue Xor0 = And.getOperand(XorIdx).getOperand(0); - SDValue Xor1 = And.getOperand(XorIdx).getOperand(1); + SDValue Xor0 = Xor.getOperand(0); + SDValue Xor1 = Xor.getOperand(1); if (Other == Xor0) std::swap(Xor0, Xor1); if (Other != Xor1) return false; + A = And; + D = Xor; X = Xor0; Y = Xor1; M = And.getOperand(XorIdx ? 0 : 1); return true; }; - SDValue A = N->getOperand(0); - SDValue B = N->getOperand(1); - if (!matchAndXor(A, 0, B) && !matchAndXor(A, 1, B) && !matchAndXor(B, 0, A) && - !matchAndXor(B, 1, A)) + SDValue A_ = N->getOperand(0); + SDValue B_ = N->getOperand(1); + if (!matchAndXor(A_, 0, B_) && !matchAndXor(A_, 1, B_) && + !matchAndXor(B_, 0, A_) && !matchAndXor(B_, 1, A_)) return SDValue(); // Don't do anything if the mask is constant. This should not be reachable. @@ -5419,9 +5422,16 @@ return SDValue(); SDLoc DL(N); + SDValue NotM = DAG.getNOT(DL, M, VT); + + // If Y is a constant, we want it to be on the 'and' side, not 'andn'. + if (isa(Y.getNode())) { + // De-canonicalze (Invert) the mask, swap the value in B part + SDValue NewA = DAG.getNode(ISD::AND, DL, VT, D, NotM); + return DAG.getNode(ISD::OR, DL, VT, NewA, X); + } SDValue LHS = DAG.getNode(ISD::AND, DL, VT, X, M); - SDValue NotM = DAG.getNOT(DL, M, VT); SDValue RHS = DAG.getNode(ISD::AND, DL, VT, Y, NotM); return DAG.getNode(ISD::OR, DL, VT, LHS, RHS); Index: test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll =================================================================== --- test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll +++ test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll @@ -347,8 +347,9 @@ define i32 @in_constant_varx_mone(i32 %x, i32 %y, i32 %mask) { ; CHECK-LABEL: in_constant_varx_mone: ; CHECK: // %bb.0: -; CHECK-NEXT: and w8, w0, w2 -; CHECK-NEXT: orn w0, w8, w2 +; CHECK-NEXT: mvn w8, w0 +; CHECK-NEXT: bic w8, w8, w2 +; CHECK-NEXT: orr w0, w8, w0 ; CHECK-NEXT: ret %n0 = xor i32 %x, -1 ; %x %n1 = and i32 %n0, %mask @@ -370,8 +371,8 @@ define i32 @in_constant_varx_mone_invmask(i32 %x, i32 %y, i32 %mask) { ; CHECK-LABEL: in_constant_varx_mone_invmask: ; CHECK: // %bb.0: -; CHECK-NEXT: bic w8, w0, w2 -; CHECK-NEXT: orr w0, w8, w2 +; CHECK-NEXT: bic w8, w2, w0 +; CHECK-NEXT: orr w0, w8, w0 ; CHECK-NEXT: ret %notmask = xor i32 %mask, -1 %n0 = xor i32 %x, -1 ; %x @@ -397,9 +398,9 @@ ; CHECK-LABEL: in_constant_varx_42: ; CHECK: // %bb.0: ; CHECK-NEXT: mov w8, #42 +; CHECK-NEXT: eor w8, w0, w8 ; CHECK-NEXT: bic w8, w8, w2 -; CHECK-NEXT: and w9, w0, w2 -; CHECK-NEXT: orr w0, w9, w8 +; CHECK-NEXT: orr w0, w8, w0 ; CHECK-NEXT: ret %n0 = xor i32 %x, 42 ; %x %n1 = and i32 %n0, %mask @@ -424,9 +425,9 @@ ; CHECK-LABEL: in_constant_varx_42_invmask: ; CHECK: // %bb.0: ; CHECK-NEXT: mov w8, #42 -; CHECK-NEXT: and w8, w2, w8 -; CHECK-NEXT: bic w9, w0, w2 -; CHECK-NEXT: orr w0, w9, w8 +; CHECK-NEXT: eor w8, w0, w8 +; CHECK-NEXT: and w8, w8, w2 +; CHECK-NEXT: orr w0, w8, w0 ; CHECK-NEXT: ret %notmask = xor i32 %mask, -1 %n0 = xor i32 %x, 42 ; %x Index: test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll =================================================================== --- test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll +++ test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll @@ -570,10 +570,9 @@ ; ; CHECK-BMI-LABEL: in_constant_varx_mone: ; CHECK-BMI: # %bb.0: -; CHECK-BMI-NEXT: andl %edx, %edi ; CHECK-BMI-NEXT: notl %edx -; CHECK-BMI-NEXT: orl %edi, %edx -; CHECK-BMI-NEXT: movl %edx, %eax +; CHECK-BMI-NEXT: andnl %edx, %edi, %eax +; CHECK-BMI-NEXT: orl %edi, %eax ; CHECK-BMI-NEXT: retq %n0 = xor i32 %x, -1 ; %x %n1 = and i32 %n0, %mask @@ -612,8 +611,8 @@ ; ; CHECK-BMI-LABEL: in_constant_varx_mone_invmask: ; CHECK-BMI: # %bb.0: -; CHECK-BMI-NEXT: andnl %edi, %edx, %eax -; CHECK-BMI-NEXT: orl %edx, %eax +; CHECK-BMI-NEXT: andnl %edx, %edi, %eax +; CHECK-BMI-NEXT: orl %edi, %eax ; CHECK-BMI-NEXT: retq %notmask = xor i32 %mask, -1 %n0 = xor i32 %x, -1 ; %x @@ -656,11 +655,10 @@ ; ; CHECK-BMI-LABEL: in_constant_varx_42: ; CHECK-BMI: # %bb.0: -; CHECK-BMI-NEXT: andl %edx, %edi -; CHECK-BMI-NEXT: notl %edx -; CHECK-BMI-NEXT: andl $42, %edx -; CHECK-BMI-NEXT: orl %edi, %edx -; CHECK-BMI-NEXT: movl %edx, %eax +; CHECK-BMI-NEXT: movl %edi, %eax +; CHECK-BMI-NEXT: xorl $42, %eax +; CHECK-BMI-NEXT: andnl %eax, %edx, %eax +; CHECK-BMI-NEXT: orl %edi, %eax ; CHECK-BMI-NEXT: retq %n0 = xor i32 %x, 42 ; %x %n1 = and i32 %n0, %mask @@ -702,9 +700,10 @@ ; ; CHECK-BMI-LABEL: in_constant_varx_42_invmask: ; CHECK-BMI: # %bb.0: -; CHECK-BMI-NEXT: andnl %edi, %edx, %eax -; CHECK-BMI-NEXT: andl $42, %edx -; CHECK-BMI-NEXT: orl %edx, %eax +; CHECK-BMI-NEXT: movl %edi, %eax +; CHECK-BMI-NEXT: xorl $42, %eax +; CHECK-BMI-NEXT: andl %edx, %eax +; CHECK-BMI-NEXT: orl %edi, %eax ; CHECK-BMI-NEXT: retq %notmask = xor i32 %mask, -1 %n0 = xor i32 %x, 42 ; %x