Index: lib/Target/AMDGPU/AMDGPUCallLowering.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+++ lib/Target/AMDGPU/AMDGPUCallLowering.cpp
@@ -32,6 +32,10 @@
 
 bool AMDGPUCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
                                      const Value *Val, unsigned VReg) const {
+  // FIXME: Add support for non-void returns.
+  if (Val)
+    return false;
+
   MIRBuilder.buildInstr(AMDGPU::S_ENDPGM);
   return true;
 }
Index: test/CodeGen/AMDGPU/GlobalISel/todo.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/GlobalISel/todo.ll
@@ -0,0 +1,10 @@
+; RUN: llc -mtriple=amdgcn-mesa-mesa3d -global-isel -global-isel-abort=2 %s -o - 2>&1 | FileCheck %s
+
+; This isn't implemented, but we need to make sure we fall back to SelectionDAG
+; instead of generating wrong code.
+; CHECK: warning: Instruction selection used fallback path for non_void_ret
+; CHECK: non_void_ret:
+; CHECK-NOT: s_endpgm
+define amdgpu_vs i32 @non_void_ret() {
+  ret i32 0
+}