[PPC64] V2 abi: Add glink section for lazy symbol resolution.

[sfertile]

Summary

This patch adds support for .glink resolver stubs from the example implementation in the V2 abi. (Section 4.2.5.3. Procedure Linkage Table)

The .glink section has a common resolver entry point '__glink_PLTresolve' which sets up the environment and then calls a resolver function supplied by the dynamic linker. Following __glink_PLTresolve is a set of branches, one for each function needing lazy resolution, which branch to the common resolver entry point.

Communicating to the dynamic linker where the lazy resolver stubs start is done with the PPC64_GLINK dynamic tag which has to point to the address 32 bytes before the first lazy symbol resolver stub.

In the V2 abi the .glink section is supposed to be merged into the end of the text section, this will be done in a follow up patch.

[• espindola]

This is a plt by another name, no?

Do you know why it is defined to have another name?

Could it be implemented as a plt section and use the WritePltHeader/writePlt target hooks?

[sfertile]

In D45642#1068980, @espindola wrote:

This is a plt by another name, no?

Do you know why it is defined to have another name?

I'm not sure what you mean by 'plt' here. In this abi the .plt section is just the array of addresses of external functions that the dynamic linker fills out at runtime. The .glink section holds the lazy resolution stubs which will setup the environment for the dynamic linker to do so. Then there are also stubs for calling the external functions by loading their address out of the .plt. Am I right to assume by 'plt' you mean a combination of lazy resolver and the call stub?

In D45642#1068980, @espindola wrote:

Could it be implemented as a plt section and use the WritePltHeader/writePlt target hooks?

This section is actually supposed to get merged into the end of the .text section (I'm planning to work on that as a follow on though) . Currently we are writing the call stubs in the .plt section, but we will have to fix that by writing the call stubs directly into the .text section and writing what we currently emit to the .got.plt section to the .plt section.

[• espindola]

In D45642#1069073, @sfertile wrote:

In D45642#1068980, @espindola wrote:

This is a plt by another name, no?

Do you know why it is defined to have another name?

I'm not sure what you mean by 'plt' here. In this abi the .plt section is just the array of addresses of external functions that the dynamic linker fills out at runtime. The .glink section holds the lazy resolution stubs which will setup the environment for the dynamic linker to do so. Then there are also stubs for calling the external functions by loading their address out of the .plt. Am I right to assume by 'plt' you mean a combination of lazy resolver and the call stub?

The question is why there is such a difference of terminology. At least of x86_64/x86/aarch64 the the array of addresses is the .got.plt section and the .plt section is what has the stubs. Just like .glink it has a special first entry. That is:

pp64 v2 | others
.glink | .plt
.plt | .got.plt

[sfertile]

In D45642#1069490, @espindola wrote:

In D45642#1069073, @sfertile wrote:

In D45642#1068980, @espindola wrote:

This is a plt by another name, no?

Do you know why it is defined to have another name?

I'm not sure what you mean by 'plt' here. In this abi the .plt section is just the array of addresses of external functions that the dynamic linker fills out at runtime. The .glink section holds the lazy resolution stubs which will setup the environment for the dynamic linker to do so. Then there are also stubs for calling the external functions by loading their address out of the .plt. Am I right to assume by 'plt' you mean a combination of lazy resolver and the call stub?

The question is why there is such a difference of terminology. At least of x86_64/x86/aarch64 the the array of addresses is the .got.plt section and the .plt section is what has the stubs. Just like .glink it has a special first entry. That is:

pp64 v2 | others
.glink | .plt
.plt | .got.plt

Thanks for clarifying. I knew about the .plt <--> .got.plt name mismatch for the array of function addresses, but I had though the stubs being emitted in the .plt section for the other targets were the equivalent of the call stubs that we are currently emitting in the .plt section on PPC64 right now.

In D45642#1068980, @espindola wrote:

Could it be implemented as a plt section and use the WritePltHeader/writePlt target hooks?

Yeah, this seems like a good fit, as long as there is no objection to renaming GotPltSection and PltSection for EM_PPC64.

[ruiu]

Yeah, this seems like a good fit, as long as there is no objection to renaming GotPltSection and PltSection for EM_PPC64.

I don't have any objection. The name mismatch is very unfortunate, but if they only have different names, that'd be straightforward.

[grimar]

ELF/SyntheticSections.cpp

1207

because

1209

Did you mean Config->EMachine == EM_PPC64 && Config->IsLE ?

Given the comment, should Config->IsLE check be omitted?

Actually, it seems it could be the following then.

if (InX::Glink && !InX::Glink->empty()) { ...

2715

This assert does not make much sense actually. With or without it we are going to crash
anyways.

2725

Seems to be excessive check for me. I would expect we remove the synthetic section from
the output if it is an empty one. Hence I think we should never reach writeTo for an empty section.

2749

You use these only in a single place, so I would suggest to inline them.

ELF/Writer.cpp

400 ↗

(On Diff #142475)

Please remove the excessive empty line.

[sfertile]

I've moved the lazy resolver stubs to .plt section as suggested and will hopefully post the updated patch shortly. Everything seems to be working as expected. I had to re implement the plt call-stubs as thunks before I could do that move, but that was something that was going to have to be done eventually anyways.

ELF/SyntheticSections.cpp

1209

Yeah I meant Config->EMachine == EM_PPC64 && Config->IsLE, but what I should be checking is Config->EMachine == EM_PPC64 && Config->EFlags == 2.

I've since added the eflag check I want in https://reviews.llvm.org/D46076

[sfertile]

Moved the lazy resolver stubs to the .plt section, and renamed the ,plt and .got.plt sections.

I've looked at the ifunc test we had and there are a number of things broken with the ppc ifunc implementation so I've XFAIL'ed it rather then simply update it. Our ifunc problems can be fixed in a separate patch.

[ruiu]

ELF/Arch/PPC64.cpp

193

Looks like you set 60 to PltHeaderSize but you are using only the first 56 bytes. Is this intentional?

ELF/SyntheticSections.cpp

882–886

BSS-ish .got.plt looks pretty odd. Is this really what the spec says? It at least needs some explanation in comment for a reader.

885

This also needs an explanation.

1042–1043

Since you are using this only once, I'd inline it and remove this function.

ELF/Target.h

160–162 ↗

(On Diff #144823)

We often inline this kind of magic numbers with some comments if they are used only once, especially when they are a constant specified by the spec.

[sfertile]

ELF/Arch/PPC64.cpp

193

I'm writing a 64 bit offset to Buf + 52, so the whole 60 bytes are used.

ELF/SyntheticSections.cpp

882–886

yeah this is odd, I don't know why its made to look like a .bss section but it is specified by the abi (both V1 and V2 64 bit abis as well as the 32 bit abi I believe)

[ruiu]

ELF/Arch/PPC64.cpp

193

Ah. I stand corrected!

ELF/SyntheticSections.cpp

882–886

Can you add this comment as a code comment? I believe honest comment like that will be useful in the future.

[sfertile]

Updated based on review comments.

[ruiu]

ELF/SyntheticSections.cpp

880

nit: accross -> across, abis -> ABIs, abi -> ABI

882–886

I confirmed https://members.openpowerfoundation.org/document/dl/576 p.93 says that .plt is SHT_NOBITS.

914–928

I think what you are doing is obvious, so please explain why.

1210

Please avoid auto.

1212

I think this format does not follow the LLVM coding style. Maybe you want to use clang-format.

1935

Indentation

[sfertile]

ELF/SyntheticSections.cpp

882–886

Yep, added.

1209

Zaara committed a patch that removes support for the V1 abi, so I no longer need to check the abi version here.

[sfertile]

Addressed review comments.

[ruiu]

LGTM

[sfertile]

ELF/SyntheticSections.cpp

930–932

I used clang-format on this but didn't like the result:

Config->EMachine == EM_ARM
    ? ".got"
    : Config->EMachine == EM_PPC64 ? ".plt"
                                   : ".got.plt") {}

So I manually formatted, does anyone have a preference on this?

1935

I believe the indentation here is correct. The line I added is an argument to the SyntheticSection constructor so it lines up with the first arg on the previous line. The following line is a different member initializer and so it lines up with the SyntheticSection constructor.

[ruiu]

ELF/SyntheticSections.cpp

930–932

Maybe, I wouldn't fix what clang-format formatted by hand, because otherwise when I edit it next time, clang-format would try to change the format again, and I'd have to fix it by hand again. It seems to be better to not fight against the tool.

That said, I might factor this out as a static (file local) function getIgotPltName() which returns a StringRef for a chosen target, so that I don't need to write a cascading ?: expressionsas an initializer expression.

[sfertile]

ELF/SyntheticSections.cpp

930–932

Good idea. I'll update it.

ELF/Arch/PPC64.cpp

 
 namespace {
 class PPC64 final : public TargetInfo {
 public:
   PPC64();
   uint32_t calcEFlags() const override;
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
+  void writePltHeader(uint8_t *Buf) const override;
+  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
+                int32_t Index, unsigned RelOff) const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void writeGotHeader(uint8_t *Buf) const override;
   bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
                   uint64_t BranchAddr, const Symbol &S) const override;
 };
 } // namespace
 
 // Relocation masks following the #lo(value), #hi(value), #ha(value),
 // #higher(value), #highera(value), #highest(value), and #highesta(value)
 // macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi
 // document.
 static uint16_t applyPPCLo(uint64_t V) { return V; }
 static uint16_t applyPPCHi(uint64_t V) { return V >> 16; }
 static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; }
 static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; }
 static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; }
 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
 
 PPC64::PPC64() {
   GotRel = R_PPC64_GLOB_DAT;
   PltRel = R_PPC64_JMP_SLOT;
   RelativeRel = R_PPC64_RELATIVE;
   GotEntrySize = 8;
+  PltEntrySize = 4;
   GotPltEntrySize = 8;
-  PltEntrySize = 0;
-  PltHeaderSize = 0;
   GotBaseSymInGotPlt = false;
   GotBaseSymOff = 0x8000;
   GotHeaderEntriesNum = 1;
   GotPltHeaderEntriesNum = 2;
+  PltHeaderSize = 60;
   NeedsThunks = true;
 
   // We need 64K pages (at least under glibc/Linux, the loader won't
   // set different permissions on a finer granularity than that).
   DefaultMaxPageSize = 65536;
 
   // The PPC64 ELF ABI v1 spec, says:
   //
default:
     return R_ABS;
   }
 }
 
 void PPC64::writeGotHeader(uint8_t *Buf) const {
   write64(Buf, getPPC64TocBase());
 }
 
+void PPC64::writePltHeader(uint8_t *Buf) const {
+  // The generic resolver stub goes first.
+  write32(Buf +  0, 0x7c0802a6); // mflr r0
+  write32(Buf +  4, 0x429f0005); // bcl  20,4*cr7+so,8 <_glink+0x8>
+  write32(Buf +  8, 0x7d6802a6); // mflr r11
+  write32(Buf + 12, 0x7c0803a6); // mtlr r0
+  write32(Buf + 16, 0x7d8b6050); // subf r12, r11, r12
+  write32(Buf + 20, 0x380cffcc); // subi r0,r12,52
+  write32(Buf + 24, 0x7800f082); // srdi r0,r0,62,2
+  write32(Buf + 28, 0xe98b002c); // ld   r12,44(r11)
+  write32(Buf + 32, 0x7d6c5a14); // add  r11,r12,r11
+  write32(Buf + 36, 0xe98b0000); // ld   r12,0(r11)
+  write32(Buf + 40, 0xe96b0008); // ld   r11,8(r11)
+  write32(Buf + 44, 0x7d8903a6); // mtctr   r12
+  write32(Buf + 48, 0x4e800420); // bctr
+
+  // The 'bcl' instruction will set the link register to the address of the
+  // following instruction ('mflr r11'). Here we store the offset from that
+  // instruction  to the first entry in the GotPlt section.
+  int64_t GotPltOffset = InX::GotPlt->getVA() - (InX::Plt->getVA() + 8);
+  write64(Buf + 52, GotPltOffset);
+}
+
+void PPC64::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
+                     uint64_t PltEntryAddr, int32_t Index,
+                     unsigned RelOff) const {
+ int32_t Offset = PltHeaderSize + Index * PltEntrySize;
+ // bl __glink_PLTresolve
+ write32(Buf, 0x48000000 | ((-Offset) & 0x03FFFFFc));
+}
+
 static std::pair<RelType, uint64_t> toAddr16Rel(RelType Type, uint64_t Val) {
   uint64_t V = Val - PPC64TocOffset;
   switch (Type) {
   case R_PPC64_TOC16:
     return {R_PPC64_ADDR16, V};
   case R_PPC64_TOC16_DS:
     return {R_PPC64_ADDR16_DS, V};
   case R_PPC64_TOC16_HA:

ELF/SyntheticSections.cpp

if (B->GlobalDynIndex != -1U) {
       uint8_t *Entry = Buf + B->GlobalDynIndex * Config->Wordsize;
       writeUint(Entry, 1);
       Entry += Config->Wordsize;
       writeUint(Entry, VA - 0x8000);
     }
   }
 }
 
+// On PowerPC the .plt section is used to hold the table of function addresses
+// instead of the .got.plt, and the type is SHT_NOBITS similar to a .bss
+// section. I don't know why we have a BSS style type for the section but it is
+// consitent across both 64-bit PowerPC ABIs as well as the 32-bit PowerPC ABI.
 GotPltSection::GotPltSection()
-    : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS,
-                       Target->GotPltEntrySize, ".got.plt") {}
+    : SyntheticSection(SHF_ALLOC | SHF_WRITE,
+                       Config->EMachine == EM_PPC64 ? SHT_NOBITS : SHT_PROGBITS,
+                       Target->GotPltEntrySize,
+                       Config->EMachine == EM_PPC64 ? ".plt" : ".got.plt") {}
 
 void GotPltSection::addEntry(Symbol &Sym) {
   assert(Sym.PltIndex == Entries.size());
   Entries.push_back(&Sym);
 }
 
 size_t GotPltSection::getSize() const {
   return (Target->GotPltHeaderEntriesNum + Entries.size()) *
          Target->GotPltEntrySize;

 bool GotPltSection::empty() const {
   // We need to emit a GOT.PLT even if it's empty if there's a symbol that
   // references the _GLOBAL_OFFSET_TABLE_ and the Target defines the symbol
   // relative to the .got.plt section.
   return Entries.empty() &&
          !(ElfSym::GlobalOffsetTable && Target->GotBaseSymInGotPlt);
 }
 
-// On ARM the IgotPltSection is part of the GotSection, on other Targets it is
-// part of the .got.plt
+static StringRef getIgotPltName() {
+  // On ARM the IgotPltSection is part of the GotSection.
+  if (Config->EMachine == EM_ARM)
+    return ".got";
+
+  // On PowerPC64 the GotPltSection is renamed to '.plt' so the IgotPltSection
+  // needs to be named the same.
+  if (Config->EMachine == EM_PPC64)
+    return ".plt";
+
+  return ".got.plt";
+}
+
+// On PowerPC64 the GotPltSection type is SHT_NOBITS so we have to follow suit
+// with the IgotPltSection.
 IgotPltSection::IgotPltSection()
-    : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS,
-                       Target->GotPltEntrySize,
-                       Config->EMachine == EM_ARM ? ".got" : ".got.plt") {}
+    : SyntheticSection(SHF_ALLOC | SHF_WRITE,
+                       Config->EMachine == EM_PPC64 ? SHT_NOBITS : SHT_PROGBITS,
+                       Target->GotPltEntrySize, getIgotPltName()) {}
 
 void IgotPltSection::addEntry(Symbol &Sym) {
   Sym.IsInIgot = true;
   assert(Sym.PltIndex == Entries.size());
   Entries.push_back(&Sym);
 }
 
 size_t IgotPltSection::getSize() const {

 
 template <class ELFT>
 void DynamicSection<ELFT>::addInSecRelative(int32_t Tag, InputSection *Sec) {
   size_t TagOffset = Entries.size() * Entsize;
   Entries.push_back(
       {Tag, [=] { return Sec->getVA(0) - (getVA() + TagOffset); }});
 }
 
 template <class ELFT>
 void DynamicSection<ELFT>::addOutSec(int32_t Tag, OutputSection *Sec) {
   Entries.push_back({Tag, [=] { return Sec->Addr; }});
 }
 
 template <class ELFT>
 void DynamicSection<ELFT>::addSize(int32_t Tag, OutputSection *Sec) {
   Entries.push_back({Tag, [=] { return Sec->Size; }});
 }
 
if (InX::MipsRldMap) {
       if (!Config->Pie)
         addInSec(DT_MIPS_RLD_MAP, InX::MipsRldMap);
       // Store the offset to the .rld_map section
       // relative to the address of the tag.
       addInSecRelative(DT_MIPS_RLD_MAP_REL, InX::MipsRldMap);
     }
   }
 
+  // Glink dynamic tag is required by the V2 abi if the plt section isn't empty.
+  if (Config->EMachine == EM_PPC64 && !InX::Plt->empty()) {
+    // The Glink tag points to 32 bytes before the first lazy symbol resolution
+    // stub, which starts directly after the header.
+    Entries.push_back({DT_PPC64_GLINK, [=] {
+                         unsigned Offset = Target->PltHeaderSize - 32;
+                         return InX::Plt->getVA(0) + Offset;
+                       }});
+  }
+
   addInt(DT_NULL, 0);
 
   getParent()->Link = this->Link;
   this->Size = Entries.size() * this->Entsize;
 }
 
 template <class ELFT> void DynamicSection<ELFT>::writeTo(uint8_t *Buf) {
   auto *P = reinterpret_cast<Elf_Dyn *>(Buf);
for (const SymbolTableEntry &S : InX::DynSymTab->getSymbols()) {
     StringRef Name = Sym->getName();
     unsigned I = Sym->DynsymIndex;
     uint32_t Hash = hashSysV(Name) % NumSymbols;
     Chains[I] = Buckets[Hash];
     write32(Buckets + Hash, I);
   }
 }
 
+// On PowerPC64 the lazy symbol resolvers go into the `global linkage table`
+// in the .glink section, rather then the typical .plt section.
 PltSection::PltSection(bool IsIplt)
-    : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16, ".plt"),
+    : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16,
+                       Config->EMachine == EM_PPC64 ? ".glink" : ".plt"),
       HeaderSize(IsIplt ? 0 : Target->PltHeaderSize), IsIplt(IsIplt) {
   // The PLT needs to be writable on SPARC as the dynamic linker will
   // modify the instructions in the PLT entries.
   if (Config->EMachine == EM_SPARCV9)
     this->Flags |= SHF_WRITE;
 }
 
 void PltSection::writeTo(uint8_t *Buf) {

 EhFrameSection *InX::EhFrame;
 SyntheticSection *InX::Dynamic;
 StringTableSection *InX::DynStrTab;
 SymbolTableBaseSection *InX::DynSymTab;
 InputSection *InX::Interp;
 GdbIndexSection *InX::GdbIndex;
 GotSection *InX::Got;
 GotPltSection *InX::GotPlt;
 GnuHashTableSection *InX::GnuHashTab;
 HashTableSection *InX::HashTab;
 IgotPltSection *InX::IgotPlt;
 MipsGotSection *InX::MipsGot;
 MipsRldMapSection *InX::MipsRldMap;
 PltSection *InX::Plt;
 PltSection *InX::Iplt;
 RelocationBaseSection *InX::RelaDyn;
 RelocationBaseSection *InX::RelaPlt;
 RelocationBaseSection *InX::RelaIplt;
 StringTableSection *InX::ShStrTab;
 StringTableSection *InX::StrTab;
 SymbolTableBaseSection *InX::SymTab;
 
 template GdbIndexSection *elf::createGdbIndex<ELF32LE>();
 template GdbIndexSection *elf::createGdbIndex<ELF32BE>();
 template GdbIndexSection *elf::createGdbIndex<ELF64LE>();
 template GdbIndexSection *elf::createGdbIndex<ELF64BE>();
 
 template void elf::splitSections<ELF32LE>();
 template void elf::splitSections<ELF32BE>();
 template void elf::splitSections<ELF64LE>();
 template void elf::splitSections<ELF64BE>();
 
 template void EhFrameSection::addSection<ELF32LE>(InputSectionBase *);
 template void EhFrameSection::addSection<ELF32BE>(InputSectionBase *);
 template void EhFrameSection::addSection<ELF64LE>(InputSectionBase *);
 template void EhFrameSection::addSection<ELF64BE>(InputSectionBase *);
 
 template void PltSection::addEntry<ELF32LE>(Symbol &Sym);
 template void PltSection::addEntry<ELF32BE>(Symbol &Sym);
 template void PltSection::addEntry<ELF64LE>(Symbol &Sym);
 template void PltSection::addEntry<ELF64BE>(Symbol &Sym);
 
 template class elf::MipsAbiFlagsSection<ELF32LE>;
 template class elf::MipsAbiFlagsSection<ELF32BE>;
 template class elf::MipsAbiFlagsSection<ELF64LE>;
 template class elf::MipsAbiFlagsSection<ELF64BE>;
 
 template class elf::MipsOptionsSection<ELF32LE>;
 template class elf::MipsOptionsSection<ELF32BE>;
 template class elf::MipsOptionsSection<ELF64LE>;
 template class elf::MipsOptionsSection<ELF64BE>;

test/ELF/ppc64-dynamic-relocations.s

 // REQUIRES: ppc
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 // RUN: ld.lld -shared %t2.o -o %t2.so
 // RUN: ld.lld %t.o %t2.so -o %t
 // RUN: llvm-readobj -dyn-relocations %t | FileCheck %s
-// RUN: llvm-objdump -D %t | FileCheck --check-prefix=DIS %s
+// RUN: llvm-objdump --section-headers %t | FileCheck --check-prefix=DIS %s
 // RUN: llvm-readelf -dynamic-table %t | FileCheck --check-prefix=DT %s
 
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 // RUN: ld.lld -shared %t2.o -o %t2.so
 // RUN: ld.lld %t.o %t2.so -o %t
 // RUN: llvm-readobj -dyn-relocations %t | FileCheck %s
-// RUN: llvm-objdump -D %t | FileCheck --check-prefix=DIS %s
+// RUN: llvm-objdump --section-headers %t | FileCheck --check-prefix=DIS %s
 // RUN: llvm-readelf -dynamic-table %t | FileCheck --check-prefix=DT %s
 
 
 // The dynamic relocation for foo should point to 16 bytes past the start of
-// the .got.plt section.
+// the .plt section.
 // CHECK: Dynamic Relocations {
-// CHECK-NEXT:    0x10020010 R_PPC64_JMP_SLOT foo 0x0
+// CHECK-NEXT:    0x10030010 R_PPC64_JMP_SLOT foo 0x0
 
 // There should be 2 reserved doublewords before the first entry. The dynamic
 // linker will fill those in with the address of the resolver entry point and
 // the dynamic object identifier.
-// DIS: Disassembly of section .got.plt:
-// DIS-NEXT:  .got.plt:
-// DIS-NEXT: 10020000:       00 00 00 00  <unknown>
-// DIS-NEXT: 10020004:       00 00 00 00  <unknown>
-// DIS-NEXT: 10020008:       00 00 00 00  <unknown>
-// DIS-NEXT: 1002000c:       00 00 00 00  <unknown>
-// DIS-NEXT: 10020010:       00 00 00 00  <unknown>
-// DIS-NEXT: 10020014:       00 00 00 00  <unknown>
+// DIS: Idx Name       Size      Address          Type
+// DIS:     .plt       00000018  0000000010030000 BSS
 
-// DT_PLTGOT should point to the start of the .got.plt section.
-// DT: 0x0000000000000003 PLTGOT               0x10020000
+// DT_PLTGOT should point to the start of the .plt section.
+// DT: 0x0000000000000003 PLTGOT               0x10030000
 
     .text
     .abiversion 2
     .globl  _start
     .p2align        4
     .type   _start,@function
 _start:
 .Lfunc_begin0:

test/ELF/ppc64-ifunc.s

 # REQUIRES: ppc
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 # RUN: ld.lld -shared %t2.o -o %t2.so
 # RUN: ld.lld %t.o %t2.so -o %t
 # RUN: llvm-objdump -D %t | FileCheck %s
+# RUN: llvm-readelf -dynamic-table %t | FileCheck --check-prefix=DT %s
 
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 # RUN: ld.lld -shared %t2.o -o %t2.so
 # RUN: ld.lld %t.o %t2.so -o %t
 # RUN: llvm-objdump -D %t | FileCheck %s
+# RUN: llvm-readelf -dynamic-table %t | FileCheck --check-prefix=DT %s
 
 # CHECK: Disassembly of section .text:
 
-# Tocbase    + (-2 << 16) + 32576
-# 0x100380d0 + (-131072)  + 32576 = 0x10020010 (.got.plt[2])
+# Tocbase    + (0 << 16) + 32560
+# 0x100280e0 +  0        + 32560 = 0x10030010 (.plt[2])
 # CHECK: __plt_foo:
 # CHECK-NEXT:     std 2, 24(1)
-# CHECK-NEXT:     addis 12, 2, -2
-# CHECK-NEXT:     ld 12, 32576(12)
+# CHECK-NEXT:     addis 12, 2, 0
+# CHECK-NEXT:     ld 12, 32560(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 
-# Tocbase    + (-2 << 16) + 32584
-# 0x100380d0 + (-131072)  + 32584 = 0x10020018  (.got.plt[3])
+# Tocbase    + (0 << 16)  +  32568
+# 0x100280e0 +  0          + 32568 = 0x1003018 (.plt[3])
 # CHECK: __plt_ifunc:
 # CHECK-NEXT:     std 2, 24(1)
-# CHECK-NEXT:     addis 12, 2, -2
-# CHECK-NEXT:     ld 12, 32584(12)
+# CHECK-NEXT:     addis 12, 2, 0
+# CHECK-NEXT:     ld 12, 32568(12)
 # CHECK-NEXT:     mtctr 12
 # CHECK-NEXT:     bctr
 
 # CHECK: ifunc:
 # CHECK-NEXT: 10010028:  {{.*}} nop
 
 # CHECK: _start:
-# CHECK-NEXT:     addis 2, 12, 3
-# CHECK-NEXT:     addi 2, 2, -32604
+# CHECK-NEXT:     addis 2, 12, 2
+# CHECK-NEXT:     addi 2, 2, -32588
 # CHECK-NEXT:     bl .+67108812
 # CHECK-NEXT:     ld 2, 24(1)
 # CHECK-NEXT:     bl .+67108824
 # CHECK-NEXT:     ld 2, 24(1)
 
-# Address of .got.plt
-# CHECK:      Disassembly of section .got.plt:
-# CHECK-NEXT:   .got.plt:
-# CHECK-NEXT:   10020000:
-
-
 # Check tocbase
 # CHECK:       Disassembly of section .got:
 # CHECK-NEXT:    .got:
-# CHECK-NEXT:    100300d0:
+# CHECK-NEXT:    100200e0
 
+# Check .plt address
+# DT_PLTGOT should point to the start of the .plt section.
+# DT: 0x0000000000000003 PLTGOT 0x10030000
 
     .text
     .abiversion 2
 
 .type ifunc STT_GNU_IFUNC
 .globl ifunc
 ifunc:
  nop

test/ELF/ppc64-plt-stub.s

 // RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
 // RUN: ld.lld -shared %t2.o -o %t2.so
 // RUN: ld.lld %t.o %t2.so -o %t
 // RUN: llvm-objdump -d %t | FileCheck %s
 
 // CHECK:      Disassembly of section .text:
 // CHECK-NEXT: __plt_foo:
 // CHECK-NEXT:      std 2, 24(1)
-// CHECK-NEXT:      addis 12, 2, -2
-// CHECK-NEXT:      ld 12, 32576(12)
+// CHECK-NEXT:      addis 12, 2, 0
+// CHECK-NEXT:      ld 12, 32560(12)
 // CHECK-NEXT:      mtctr 12
 // CHECK-NEXT:      bctr
 
 
 // CHECK:            _start:
 // CHECK:            bl .+67108824
         .text
         .abiversion 2