Index: lib/CodeGen/CodeGenPrepare.cpp =================================================================== --- lib/CodeGen/CodeGenPrepare.cpp +++ lib/CodeGen/CodeGenPrepare.cpp @@ -3363,6 +3363,50 @@ (IsSExt && BinOp->hasNoSignedWrap()))) return true; + // ext(and(opnd, cst)) --> and(ext(opnd), ext(cst)) + if ((Inst->getOpcode() == Instruction::And || + Inst->getOpcode() == Instruction::Or) && + isa(Inst->getOperand(1))) + return true; + + // ext(xor(opnd, cst)) --> xor(ext(opnd), ext(cst)) + if (Inst->getOpcode() == Instruction::Xor) { + const ConstantInt *Cst = dyn_cast(Inst->getOperand(1)); + // Make sure it is not a NOT. + if (Cst && !Cst->getValue().isAllOnesValue()) + return true; + } + + // zext(shrl(opnd, cst)) --> shrl(zext(opnd), zext(cst)) + // It may change a poisoned value into a regular value, like + // zext i32 (shrl i8 %val, 12) --> shrl i32 (zext i8 %val), 12 + // poisoned value regular value + // It should be OK since undef covers valid value. + if (Inst->getOpcode() == Instruction::LShr && + isa(Inst->getOperand(1)) && !IsSExt) + return true; + + // and(ext(shl(opnd, cst)), cst) --> and(shl(ext(opnd), ext(cst)), cst) + // It may change a poisoned value into a regular value, like + // zext i32 (shl i8 %val, 12) --> shl i32 (zext i8 %val), 12 + // poisoned value regular value + // It should be OK since undef covers valid value. + if (Inst->getOpcode() == Instruction::Shl && Inst->hasOneUse() && + isa(Inst->getOperand(1))) { + const Instruction *ExtInst = + dyn_cast(*Inst->user_begin()); + if (ExtInst->hasOneUse()) { + const Instruction *AndInst = + dyn_cast(*ExtInst->user_begin()); + if (AndInst && AndInst->getOpcode() == Instruction::And) { + const ConstantInt *Cst = dyn_cast(AndInst->getOperand(1)); + if (Cst && + Cst->getValue().isIntN(Inst->getType()->getIntegerBitWidth())) + return true; + } + } + } + // Check if we can do the following simplification. // ext(trunc(opnd)) --> ext(opnd) if (!isa(Inst)) Index: test/CodeGen/X86/cmov.ll =================================================================== --- test/CodeGen/X86/cmov.ll +++ test/CodeGen/X86/cmov.ll @@ -79,9 +79,8 @@ ; CHECK-LABEL: test4: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movsbl {{.*}}(%rip), %edx -; CHECK-NEXT: movl %edx, %eax -; CHECK-NEXT: shrb $7, %al -; CHECK-NEXT: movzbl %al, %ecx +; CHECK-NEXT: movzbl %dl, %ecx +; CHECK-NEXT: shrl $7, %ecx ; CHECK-NEXT: xorl $1, %ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: sarl %cl, %edx Index: test/Transforms/CodeGenPrepare/X86/ext-logicop.ll =================================================================== --- test/Transforms/CodeGenPrepare/X86/ext-logicop.ll +++ test/Transforms/CodeGenPrepare/X86/ext-logicop.ll @@ -0,0 +1,128 @@ +; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck %s + + +@a = global [10 x i8] zeroinitializer, align 1 +declare void @foo() + +; ext(and(ld, cst)) -> and(ext(ld), ext(cst)) +define void @test1(i32* %p, i32 %ll) { +; CHECK-LABEL: @test1 +; CHECK-NEXT: entry: +; CHECK-NEXT: load +; CHECK-NEXT: zext +; CHECK-NEXT: and +entry: + %tmp = load i8, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @a, i64 0, i64 0), align 1 + %and = and i8 %tmp, 60 + %cmp = icmp ugt i8 %and, 20 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + %conv2 = zext i8 %and to i32 + %add = add nsw i32 %conv2, %ll + store i32 %add, i32* %p, align 4 + br label %if.end + +if.end: ; preds = %if.then, %entry + tail call void @foo() + ret void +} + +; ext(or(ld, cst)) -> or(ext(ld), ext(cst)) +define void @test2(i32* %p, i32 %ll) { +; CHECK-LABEL: @test2 +; CHECK-NEXT: entry: +; CHECK-NEXT: load +; CHECK-NEXT: zext +; CHECK-NEXT: or +entry: + %tmp = load i8, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @a, i64 0, i64 0), align 1 + %or = or i8 %tmp, 60 + %cmp = icmp ugt i8 %or, 20 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + %conv2 = zext i8 %or to i32 + %add = add nsw i32 %conv2, %ll + store i32 %add, i32* %p, align 4 + br label %if.end + +if.end: ; preds = %if.then, %entry + tail call void @foo() + ret void +} + +; ext(and(shl(ld, cst), cst)) -> and(shl(ext(ld), ext(cst)), ext(cst)) +define void @test3(i32* %p, i32 %ll) { +; CHECK-LABEL: @test3 +; CHECK-NEXT: entry: +; CHECK-NEXT: load +; CHECK-NEXT: zext +; CHECK-NEXT: shl +; CHECK-NEXT: and +entry: + %tmp = load i8, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @a, i64 0, i64 0), align 1 + %shl = shl i8 %tmp, 2 + %and = and i8 %shl, 60 + %cmp = icmp ugt i8 %and, 20 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + %conv2 = zext i8 %and to i32 + %add = add nsw i32 %conv2, %ll + store i32 %add, i32* %p, align 4 + br label %if.end + +if.end: ; preds = %if.then, %entry + tail call void @foo() + ret void +} + +; zext(shrl(ld, cst)) -> shrl(zext(ld), zext(cst)) +define void @test4(i32* %p, i32 %ll) { +; CHECK-LABEL: @test4 +; CHECK-NEXT: entry: +; CHECK-NEXT: load +; CHECK-NEXT: zext +; CHECK-NEXT: lshr +entry: + %tmp = load i8, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @a, i64 0, i64 0), align 1 + %lshr = lshr i8 %tmp, 2 + %cmp = icmp ugt i8 %lshr, 20 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + %conv2 = zext i8 %lshr to i32 + %add = add nsw i32 %conv2, %ll + store i32 %add, i32* %p, align 4 + br label %if.end + +if.end: ; preds = %if.then, %entry + tail call void @foo() + ret void +} + +; ext(xor(ld, cst)) -> xor(ext(ld), ext(cst)) +define void @test5(i32* %p, i32 %ll) { +; CHECK-LABEL: @test5 +; CHECK-NEXT: entry: +; CHECK-NEXT: load +; CHECK-NEXT: zext +; CHECK-NEXT: xor +entry: + %tmp = load i8, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @a, i64 0, i64 0), align 1 + %xor = xor i8 %tmp, 60 + %cmp = icmp ugt i8 %xor, 20 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + %conv2 = zext i8 %xor to i32 + %add = add nsw i32 %conv2, %ll + store i32 %add, i32* %p, align 4 + br label %if.end + +if.end: ; preds = %if.then, %entry + tail call void @foo() + ret void +} +