Index: test/Analysis/CostModel/X86/arith-fp.ll =================================================================== --- test/Analysis/CostModel/X86/arith-fp.ll +++ test/Analysis/CostModel/X86/arith-fp.ll @@ -1,649 +1,742 @@ -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE2 -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42 -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx,+fma | FileCheck %s --check-prefix=CHECK --check-prefix=AVX -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2,+fma | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefix=CHECK --check-prefix=SLM -; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefix=CHECK --check-prefix=GLM +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2 +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42 +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx,+fma | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2,+fma | FileCheck %s --check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SLM +; RUN: opt < %s -enable-no-nans-fp-math -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,GLM target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.8.0" -; CHECK-LABEL: 'fadd' define i32 @fadd(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = fadd - ; SSE42: cost of 1 {{.*}} %F32 = fadd - ; AVX: cost of 1 {{.*}} %F32 = fadd - ; AVX2: cost of 1 {{.*}} %F32 = fadd - ; AVX512: cost of 1 {{.*}} %F32 = fadd - ; SLM: cost of 1 {{.*}} %F32 = fadd - ; GLM: cost of 1 {{.*}} %F32 = fadd +; SSE2-LABEL: 'fadd' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = fadd float undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = fadd <4 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = fadd <8 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = fadd <16 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = fadd double undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = fadd <2 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = fadd <4 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = fadd <8 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'fadd' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fadd float undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fadd <4 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fadd <8 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fadd <16 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fadd double undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fadd <2 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fadd <4 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fadd <8 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'fadd' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fadd float undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fadd <4 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fadd <8 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fadd <16 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fadd double undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fadd <2 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fadd <4 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fadd <8 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'fadd' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fadd float undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fadd <4 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = fadd <8 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16F32:%.*]] = fadd <16 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fadd double undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fadd <2 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = fadd <4 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F64:%.*]] = fadd <8 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fadd' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fadd float undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fadd <4 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = fadd <8 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16F32:%.*]] = fadd <16 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fadd double undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fadd <2 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = fadd <4 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F64:%.*]] = fadd <8 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fadd' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fadd float undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fadd <4 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fadd <8 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fadd <16 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fadd double undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = fadd <2 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = fadd <4 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = fadd <8 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fadd' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fadd float undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fadd <4 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fadd <8 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fadd <16 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fadd double undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fadd <2 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fadd <4 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fadd <8 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = fadd float undef, undef - ; SSE2: cost of 2 {{.*}} %V4F32 = fadd - ; SSE42: cost of 1 {{.*}} %V4F32 = fadd - ; AVX: cost of 1 {{.*}} %V4F32 = fadd - ; AVX2: cost of 1 {{.*}} %V4F32 = fadd - ; AVX512: cost of 1 {{.*}} %V4F32 = fadd - ; SLM: cost of 1 {{.*}} %V4F32 = fadd - ; GLM: cost of 1 {{.*}} %V4F32 = fadd %V4F32 = fadd <4 x float> undef, undef - ; SSE2: cost of 4 {{.*}} %V8F32 = fadd - ; SSE42: cost of 2 {{.*}} %V8F32 = fadd - ; AVX: cost of 2 {{.*}} %V8F32 = fadd - ; AVX2: cost of 1 {{.*}} %V8F32 = fadd - ; AVX512: cost of 1 {{.*}} %V8F32 = fadd - ; SLM: cost of 2 {{.*}} %V8F32 = fadd - ; GLM: cost of 2 {{.*}} %V8F32 = fadd %V8F32 = fadd <8 x float> undef, undef - ; SSE2: cost of 8 {{.*}} %V16F32 = fadd - ; SSE42: cost of 4 {{.*}} %V16F32 = fadd - ; AVX: cost of 4 {{.*}} %V16F32 = fadd - ; AVX2: cost of 2 {{.*}} %V16F32 = fadd - ; AVX512: cost of 1 {{.*}} %V16F32 = fadd - ; SLM: cost of 4 {{.*}} %V16F32 = fadd - ; GLM: cost of 4 {{.*}} %V16F32 = fadd %V16F32 = fadd <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = fadd - ; SSE42: cost of 1 {{.*}} %F64 = fadd - ; AVX: cost of 1 {{.*}} %F64 = fadd - ; AVX2: cost of 1 {{.*}} %F64 = fadd - ; AVX512: cost of 1 {{.*}} %F64 = fadd - ; SLM: cost of 1 {{.*}} %F64 = fadd - ; GLM: cost of 1 {{.*}} %F64 = fadd %F64 = fadd double undef, undef - ; SSE2: cost of 2 {{.*}} %V2F64 = fadd - ; SSE42: cost of 1 {{.*}} %V2F64 = fadd - ; AVX: cost of 1 {{.*}} %V2F64 = fadd - ; AVX2: cost of 1 {{.*}} %V2F64 = fadd - ; AVX512: cost of 1 {{.*}} %V2F64 = fadd - ; SLM: cost of 2 {{.*}} %V2F64 = fadd - ; GLM: cost of 1 {{.*}} %V2F64 = fadd %V2F64 = fadd <2 x double> undef, undef - ; SSE2: cost of 4 {{.*}} %V4F64 = fadd - ; SSE42: cost of 2 {{.*}} %V4F64 = fadd - ; AVX: cost of 2 {{.*}} %V4F64 = fadd - ; AVX2: cost of 1 {{.*}} %V4F64 = fadd - ; AVX512: cost of 1 {{.*}} %V4F64 = fadd - ; SLM: cost of 4 {{.*}} %V4F64 = fadd - ; GLM: cost of 2 {{.*}} %V4F64 = fadd %V4F64 = fadd <4 x double> undef, undef - ; SSE2: cost of 8 {{.*}} %V8F64 = fadd - ; SSE42: cost of 4 {{.*}} %V8F64 = fadd - ; AVX: cost of 4 {{.*}} %V8F64 = fadd - ; AVX2: cost of 2 {{.*}} %V8F64 = fadd - ; AVX512: cost of 1 {{.*}} %V8F64 = fadd - ; SLM: cost of 8 {{.*}} %V8F64 = fadd - ; GLM: cost of 4 {{.*}} %V8F64 = fadd %V8F64 = fadd <8 x double> undef, undef ret i32 undef } -; CHECK-LABEL: 'fsub' define i32 @fsub(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = fsub - ; SSE42: cost of 1 {{.*}} %F32 = fsub - ; AVX: cost of 1 {{.*}} %F32 = fsub - ; AVX2: cost of 1 {{.*}} %F32 = fsub - ; AVX512: cost of 1 {{.*}} %F32 = fsub - ; SLM: cost of 1 {{.*}} %F32 = fsub - ; GLM: cost of 1 {{.*}} %F32 = fsub +; SSE2-LABEL: 'fsub' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = fsub float undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = fsub <4 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = fsub <8 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = fsub <16 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = fsub double undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = fsub <2 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = fsub <4 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = fsub <8 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'fsub' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fsub float undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fsub <4 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fsub <8 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fsub <16 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fsub double undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fsub <2 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fsub <4 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fsub <8 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'fsub' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fsub float undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fsub <4 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fsub <8 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fsub <16 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fsub double undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fsub <2 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fsub <4 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fsub <8 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'fsub' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fsub float undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fsub <4 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = fsub <8 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16F32:%.*]] = fsub <16 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fsub double undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fsub <2 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = fsub <4 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F64:%.*]] = fsub <8 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fsub' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fsub float undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fsub <4 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = fsub <8 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16F32:%.*]] = fsub <16 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fsub double undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fsub <2 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = fsub <4 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F64:%.*]] = fsub <8 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fsub' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fsub float undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fsub <4 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fsub <8 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fsub <16 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fsub double undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = fsub <2 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = fsub <4 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = fsub <8 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fsub' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fsub float undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fsub <4 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fsub <8 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fsub <16 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fsub double undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fsub <2 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fsub <4 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fsub <8 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = fsub float undef, undef - ; SSE2: cost of 2 {{.*}} %V4F32 = fsub - ; SSE42: cost of 1 {{.*}} %V4F32 = fsub - ; AVX: cost of 1 {{.*}} %V4F32 = fsub - ; AVX2: cost of 1 {{.*}} %V4F32 = fsub - ; AVX512: cost of 1 {{.*}} %V4F32 = fsub - ; SLM: cost of 1 {{.*}} %V4F32 = fsub - ; GLM: cost of 1 {{.*}} %V4F32 = fsub %V4F32 = fsub <4 x float> undef, undef - ; SSE2: cost of 4 {{.*}} %V8F32 = fsub - ; SSE42: cost of 2 {{.*}} %V8F32 = fsub - ; AVX: cost of 2 {{.*}} %V8F32 = fsub - ; AVX2: cost of 1 {{.*}} %V8F32 = fsub - ; AVX512: cost of 1 {{.*}} %V8F32 = fsub - ; SLM: cost of 2 {{.*}} %V8F32 = fsub - ; GLM: cost of 2 {{.*}} %V8F32 = fsub %V8F32 = fsub <8 x float> undef, undef - ; SSE2: cost of 8 {{.*}} %V16F32 = fsub - ; SSE42: cost of 4 {{.*}} %V16F32 = fsub - ; AVX: cost of 4 {{.*}} %V16F32 = fsub - ; AVX2: cost of 2 {{.*}} %V16F32 = fsub - ; AVX512: cost of 1 {{.*}} %V16F32 = fsub - ; SLM: cost of 4 {{.*}} %V16F32 = fsub - ; GLM: cost of 4 {{.*}} %V16F32 = fsub %V16F32 = fsub <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = fsub - ; SSE42: cost of 1 {{.*}} %F64 = fsub - ; AVX: cost of 1 {{.*}} %F64 = fsub - ; AVX2: cost of 1 {{.*}} %F64 = fsub - ; AVX512: cost of 1 {{.*}} %F64 = fsub - ; SLM: cost of 1 {{.*}} %F64 = fsub - ; GLM: cost of 1 {{.*}} %F64 = fsub %F64 = fsub double undef, undef - ; SSE2: cost of 2 {{.*}} %V2F64 = fsub - ; SSE42: cost of 1 {{.*}} %V2F64 = fsub - ; AVX: cost of 1 {{.*}} %V2F64 = fsub - ; AVX2: cost of 1 {{.*}} %V2F64 = fsub - ; AVX512: cost of 1 {{.*}} %V2F64 = fsub - ; SLM: cost of 2 {{.*}} %V2F64 = fsub - ; GLM: cost of 1 {{.*}} %V2F64 = fsub %V2F64 = fsub <2 x double> undef, undef - ; SSE2: cost of 4 {{.*}} %V4F64 = fsub - ; SSE42: cost of 2 {{.*}} %V4F64 = fsub - ; AVX: cost of 2 {{.*}} %V4F64 = fsub - ; AVX2: cost of 1 {{.*}} %V4F64 = fsub - ; AVX512: cost of 1 {{.*}} %V4F64 = fsub - ; SLM: cost of 4 {{.*}} %V4F64 = fsub - ; GLM: cost of 2 {{.*}} %V4F64 = fsub %V4F64 = fsub <4 x double> undef, undef - ; SSE2: cost of 8 {{.*}} %V8F64 = fsub - ; SSE42: cost of 4 {{.*}} %V8F64 = fsub - ; AVX: cost of 4 {{.*}} %V8F64 = fsub - ; AVX2: cost of 2 {{.*}} %V8F64 = fsub - ; AVX512: cost of 1 {{.*}} %V8F64 = fsub - ; SLM: cost of 8 {{.*}} %V8F64 = fsub - ; GLM: cost of 4 {{.*}} %V8F64 = fsub %V8F64 = fsub <8 x double> undef, undef ret i32 undef } -; CHECK-LABEL: 'fmul' define i32 @fmul(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = fmul - ; SSE42: cost of 1 {{.*}} %F32 = fmul - ; AVX: cost of 1 {{.*}} %F32 = fmul - ; AVX2: cost of 1 {{.*}} %F32 = fmul - ; AVX512: cost of 1 {{.*}} %F32 = fmul - ; SLM: cost of 1 {{.*}} %F32 = fmul - ; GLM: cost of 1 {{.*}} %F32 = fmul +; SSE2-LABEL: 'fmul' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = fmul float undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = fmul <4 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = fmul <8 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = fmul <16 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = fmul double undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = fmul <2 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = fmul <4 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = fmul <8 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'fmul' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fmul float undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fmul <4 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fmul <8 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fmul <16 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fmul double undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fmul <2 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fmul <4 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fmul <8 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'fmul' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fmul float undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fmul <4 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fmul <8 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fmul <16 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fmul double undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fmul <2 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fmul <4 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fmul <8 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'fmul' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fmul float undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fmul <4 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = fmul <8 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16F32:%.*]] = fmul <16 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fmul double undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fmul <2 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = fmul <4 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F64:%.*]] = fmul <8 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fmul' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fmul float undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fmul <4 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = fmul <8 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16F32:%.*]] = fmul <16 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fmul double undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fmul <2 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = fmul <4 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F64:%.*]] = fmul <8 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fmul' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fmul float undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = fmul <4 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = fmul <8 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = fmul <16 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = fmul double undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V2F64:%.*]] = fmul <2 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V4F64:%.*]] = fmul <4 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 16 for instruction: [[V8F64:%.*]] = fmul <8 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fmul' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = fmul float undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = fmul <4 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = fmul <8 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = fmul <16 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = fmul double undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = fmul <2 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = fmul <4 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = fmul <8 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = fmul float undef, undef - ; SSE2: cost of 2 {{.*}} %V4F32 = fmul - ; SSE42: cost of 1 {{.*}} %V4F32 = fmul - ; AVX: cost of 1 {{.*}} %V4F32 = fmul - ; AVX2: cost of 1 {{.*}} %V4F32 = fmul - ; AVX512: cost of 1 {{.*}} %V4F32 = fmul - ; SLM: cost of 2 {{.*}} %V4F32 = fmul - ; GLM: cost of 1 {{.*}} %V4F32 = fmul %V4F32 = fmul <4 x float> undef, undef - ; SSE2: cost of 4 {{.*}} %V8F32 = fmul - ; SSE42: cost of 2 {{.*}} %V8F32 = fmul - ; AVX: cost of 2 {{.*}} %V8F32 = fmul - ; AVX2: cost of 1 {{.*}} %V8F32 = fmul - ; AVX512: cost of 1 {{.*}} %V8F32 = fmul - ; SLM: cost of 4 {{.*}} %V8F32 = fmul - ; GLM: cost of 2 {{.*}} %V8F32 = fmul %V8F32 = fmul <8 x float> undef, undef - ; SSE2: cost of 8 {{.*}} %V16F32 = fmul - ; SSE42: cost of 4 {{.*}} %V16F32 = fmul - ; AVX: cost of 4 {{.*}} %V16F32 = fmul - ; AVX2: cost of 2 {{.*}} %V16F32 = fmul - ; AVX512: cost of 1 {{.*}} %V16F32 = fmul - ; SLM: cost of 8 {{.*}} %V16F32 = fmul - ; GLM: cost of 4 {{.*}} %V16F32 = fmul %V16F32 = fmul <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = fmul - ; SSE42: cost of 1 {{.*}} %F64 = fmul - ; AVX: cost of 1 {{.*}} %F64 = fmul - ; AVX2: cost of 1 {{.*}} %F64 = fmul - ; AVX512: cost of 1 {{.*}} %F64 = fmul - ; SLM: cost of 2 {{.*}} %F64 = fmul - ; GLM: cost of 1 {{.*}} %F64 = fmul %F64 = fmul double undef, undef - ; SSE2: cost of 2 {{.*}} %V2F64 = fmul - ; SSE42: cost of 1 {{.*}} %V2F64 = fmul - ; AVX: cost of 1 {{.*}} %V2F64 = fmul - ; AVX2: cost of 1 {{.*}} %V2F64 = fmul - ; AVX512: cost of 1 {{.*}} %V2F64 = fmul - ; SLM: cost of 4 {{.*}} %V2F64 = fmul - ; GLM: cost of 1 {{.*}} %V2F64 = fmul %V2F64 = fmul <2 x double> undef, undef - ; SSE2: cost of 4 {{.*}} %V4F64 = fmul - ; SSE42: cost of 2 {{.*}} %V4F64 = fmul - ; AVX: cost of 2 {{.*}} %V4F64 = fmul - ; AVX2: cost of 1 {{.*}} %V4F64 = fmul - ; AVX512: cost of 1 {{.*}} %V4F64 = fmul - ; SLM: cost of 8 {{.*}} %V4F64 = fmul - ; GLM: cost of 2 {{.*}} %V4F64 = fmul %V4F64 = fmul <4 x double> undef, undef - ; SSE2: cost of 8 {{.*}} %V8F64 = fmul - ; SSE42: cost of 4 {{.*}} %V8F64 = fmul - ; AVX: cost of 4 {{.*}} %V8F64 = fmul - ; AVX2: cost of 2 {{.*}} %V8F64 = fmul - ; AVX512: cost of 1 {{.*}} %V8F64 = fmul - ; SLM: cost of 16 {{.*}} %V8F64 = fmul - ; GLM: cost of 4 {{.*}} %V8F64 = fmul %V8F64 = fmul <8 x double> undef, undef ret i32 undef } -; CHECK-LABEL: 'fdiv' define i32 @fdiv(i32 %arg) { - ; SSE2: cost of 23 {{.*}} %F32 = fdiv - ; SSE42: cost of 14 {{.*}} %F32 = fdiv - ; AVX: cost of 14 {{.*}} %F32 = fdiv - ; AVX2: cost of 7 {{.*}} %F32 = fdiv - ; AVX512: cost of 7 {{.*}} %F32 = fdiv - ; SLM: cost of 17 {{.*}} %F32 = fdiv - ; GLM: cost of 18 {{.*}} %F32 = fdiv +; SSE2-LABEL: 'fdiv' +; SSE2-NEXT: Cost Model: Found an estimated cost of 23 for instruction: [[F32:%.*]] = fdiv float undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 39 for instruction: [[V4F32:%.*]] = fdiv <4 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 78 for instruction: [[V8F32:%.*]] = fdiv <8 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 156 for instruction: [[V16F32:%.*]] = fdiv <16 x float> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 38 for instruction: [[F64:%.*]] = fdiv double undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 69 for instruction: [[V2F64:%.*]] = fdiv <2 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 138 for instruction: [[V4F64:%.*]] = fdiv <4 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 276 for instruction: [[V8F64:%.*]] = fdiv <8 x double> undef, undef +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'fdiv' +; SSE42-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[F32:%.*]] = fdiv float undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = fdiv <4 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V8F32:%.*]] = fdiv <8 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V16F32:%.*]] = fdiv <16 x float> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 22 for instruction: [[F64:%.*]] = fdiv double undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 22 for instruction: [[V2F64:%.*]] = fdiv <2 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 44 for instruction: [[V4F64:%.*]] = fdiv <4 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 88 for instruction: [[V8F64:%.*]] = fdiv <8 x double> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'fdiv' +; AVX1-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[F32:%.*]] = fdiv float undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = fdiv <4 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V8F32:%.*]] = fdiv <8 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V16F32:%.*]] = fdiv <16 x float> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 22 for instruction: [[F64:%.*]] = fdiv double undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 22 for instruction: [[V2F64:%.*]] = fdiv <2 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 44 for instruction: [[V4F64:%.*]] = fdiv <4 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 88 for instruction: [[V8F64:%.*]] = fdiv <8 x double> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'fdiv' +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[F32:%.*]] = fdiv float undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[V4F32:%.*]] = fdiv <4 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V8F32:%.*]] = fdiv <8 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V16F32:%.*]] = fdiv <16 x float> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[F64:%.*]] = fdiv double undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V2F64:%.*]] = fdiv <2 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V4F64:%.*]] = fdiv <4 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V8F64:%.*]] = fdiv <8 x double> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fdiv' +; AVX512-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[F32:%.*]] = fdiv float undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[V4F32:%.*]] = fdiv <4 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V8F32:%.*]] = fdiv <8 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16F32:%.*]] = fdiv <16 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[F64:%.*]] = fdiv double undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V2F64:%.*]] = fdiv <2 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V4F64:%.*]] = fdiv <4 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F64:%.*]] = fdiv <8 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fdiv' +; SLM-NEXT: Cost Model: Found an estimated cost of 17 for instruction: [[F32:%.*]] = fdiv float undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 39 for instruction: [[V4F32:%.*]] = fdiv <4 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 78 for instruction: [[V8F32:%.*]] = fdiv <8 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 156 for instruction: [[V16F32:%.*]] = fdiv <16 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[F64:%.*]] = fdiv double undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 69 for instruction: [[V2F64:%.*]] = fdiv <2 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 138 for instruction: [[V4F64:%.*]] = fdiv <4 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 276 for instruction: [[V8F64:%.*]] = fdiv <8 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fdiv' +; GLM-NEXT: Cost Model: Found an estimated cost of 18 for instruction: [[F32:%.*]] = fdiv float undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 35 for instruction: [[V4F32:%.*]] = fdiv <4 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 70 for instruction: [[V8F32:%.*]] = fdiv <8 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 140 for instruction: [[V16F32:%.*]] = fdiv <16 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 33 for instruction: [[F64:%.*]] = fdiv double undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 65 for instruction: [[V2F64:%.*]] = fdiv <2 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 130 for instruction: [[V4F64:%.*]] = fdiv <4 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 260 for instruction: [[V8F64:%.*]] = fdiv <8 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = fdiv float undef, undef - ; SSE2: cost of 39 {{.*}} %V4F32 = fdiv - ; SSE42: cost of 14 {{.*}} %V4F32 = fdiv - ; AVX: cost of 14 {{.*}} %V4F32 = fdiv - ; AVX2: cost of 7 {{.*}} %V4F32 = fdiv - ; AVX512: cost of 7 {{.*}} %V4F32 = fdiv - ; SLM: cost of 39 {{.*}} %V4F32 = fdiv - ; GLM: cost of 35 {{.*}} %V4F32 = fdiv %V4F32 = fdiv <4 x float> undef, undef - ; SSE2: cost of 78 {{.*}} %V8F32 = fdiv - ; SSE42: cost of 28 {{.*}} %V8F32 = fdiv - ; AVX: cost of 28 {{.*}} %V8F32 = fdiv - ; AVX2: cost of 14 {{.*}} %V8F32 = fdiv - ; AVX512: cost of 14 {{.*}} %V8F32 = fdiv - ; SLM: cost of 78 {{.*}} %V8F32 = fdiv - ; GLM: cost of 70 {{.*}} %V8F32 = fdiv %V8F32 = fdiv <8 x float> undef, undef - ; SSE2: cost of 156 {{.*}} %V16F32 = fdiv - ; SSE42: cost of 56 {{.*}} %V16F32 = fdiv - ; AVX: cost of 56 {{.*}} %V16F32 = fdiv - ; AVX2: cost of 28 {{.*}} %V16F32 = fdiv - ; AVX512: cost of 2 {{.*}} %V16F32 = fdiv - ; SLM: cost of 156 {{.*}} %V16F32 = fdiv - ; GLM: cost of 140 {{.*}} %V16F32 = fdiv %V16F32 = fdiv <16 x float> undef, undef - ; SSE2: cost of 38 {{.*}} %F64 = fdiv - ; SSE42: cost of 22 {{.*}} %F64 = fdiv - ; AVX: cost of 22 {{.*}} %F64 = fdiv - ; AVX2: cost of 14 {{.*}} %F64 = fdiv - ; AVX512: cost of 14 {{.*}} %F64 = fdiv - ; SLM: cost of 32 {{.*}} %F64 = fdiv - ; GLM: cost of 33 {{.*}} %F64 = fdiv %F64 = fdiv double undef, undef - ; SSE2: cost of 69 {{.*}} %V2F64 = fdiv - ; SSE42: cost of 22 {{.*}} %V2F64 = fdiv - ; AVX: cost of 22 {{.*}} %V2F64 = fdiv - ; AVX2: cost of 14 {{.*}} %V2F64 = fdiv - ; AVX512: cost of 14 {{.*}} %V2F64 = fdiv - ; SLM: cost of 69 {{.*}} %V2F64 = fdiv - ; GLM: cost of 65 {{.*}} %V2F64 = fdiv %V2F64 = fdiv <2 x double> undef, undef - ; SSE2: cost of 138 {{.*}} %V4F64 = fdiv - ; SSE42: cost of 44 {{.*}} %V4F64 = fdiv - ; AVX: cost of 44 {{.*}} %V4F64 = fdiv - ; AVX2: cost of 28 {{.*}} %V4F64 = fdiv - ; AVX512: cost of 28 {{.*}} %V4F64 = fdiv - ; SLM: cost of 138 {{.*}} %V4F64 = fdiv - ; GLM: cost of 130 {{.*}} %V4F64 = fdiv %V4F64 = fdiv <4 x double> undef, undef - ; SSE2: cost of 276 {{.*}} %V8F64 = fdiv - ; SSE42: cost of 88 {{.*}} %V8F64 = fdiv - ; AVX: cost of 88 {{.*}} %V8F64 = fdiv - ; AVX2: cost of 56 {{.*}} %V8F64 = fdiv - ; AVX512: cost of 2 {{.*}} %V8F64 = fdiv - ; SLM: cost of 276 {{.*}} %V8F64 = fdiv - ; GLM: cost of 260 {{.*}} %V8F64 = fdiv %V8F64 = fdiv <8 x double> undef, undef ret i32 undef } -; CHECK-LABEL: 'frem' define i32 @frem(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = frem - ; SSE42: cost of 2 {{.*}} %F32 = frem - ; AVX: cost of 2 {{.*}} %F32 = frem - ; AVX2: cost of 2 {{.*}} %F32 = frem - ; AVX512: cost of 2 {{.*}} %F32 = frem - ; SLM: cost of 2 {{.*}} %F32 = frem - ; GLM: cost of 2 {{.*}} %F32 = frem +; SSE-LABEL: 'frem' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = frem float undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = frem <4 x float> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V8F32:%.*]] = frem <8 x float> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V16F32:%.*]] = frem <16 x float> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = frem double undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: [[V2F64:%.*]] = frem <2 x double> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V4F64:%.*]] = frem <4 x double> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: [[V8F64:%.*]] = frem <8 x double> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'frem' +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = frem float undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = frem <4 x float> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 30 for instruction: [[V8F32:%.*]] = frem <8 x float> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 60 for instruction: [[V16F32:%.*]] = frem <16 x float> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = frem double undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 6 for instruction: [[V2F64:%.*]] = frem <2 x double> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F64:%.*]] = frem <4 x double> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V8F64:%.*]] = frem <8 x double> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'frem' +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = frem float undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = frem <4 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 30 for instruction: [[V8F32:%.*]] = frem <8 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 62 for instruction: [[V16F32:%.*]] = frem <16 x float> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = frem double undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 6 for instruction: [[V2F64:%.*]] = frem <2 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F64:%.*]] = frem <4 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 30 for instruction: [[V8F64:%.*]] = frem <8 x double> undef, undef +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'frem' +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = frem float undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = frem <4 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V8F32:%.*]] = frem <8 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V16F32:%.*]] = frem <16 x float> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = frem double undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 6 for instruction: [[V2F64:%.*]] = frem <2 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V4F64:%.*]] = frem <4 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 24 for instruction: [[V8F64:%.*]] = frem <8 x double> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'frem' +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = frem float undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = frem <4 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V8F32:%.*]] = frem <8 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V16F32:%.*]] = frem <16 x float> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = frem double undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 6 for instruction: [[V2F64:%.*]] = frem <2 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V4F64:%.*]] = frem <4 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 24 for instruction: [[V8F64:%.*]] = frem <8 x double> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = frem float undef, undef - ; SSE2: cost of 14 {{.*}} %V4F32 = frem - ; SSE42: cost of 14 {{.*}} %V4F32 = frem - ; AVX: cost of 14 {{.*}} %V4F32 = frem - ; AVX2: cost of 14 {{.*}} %V4F32 = frem - ; AVX512: cost of 14 {{.*}} %V4F32 = frem - ; SLM: cost of 14 {{.*}} %V4F32 = frem - ; GLM: cost of 14 {{.*}} %V4F32 = frem %V4F32 = frem <4 x float> undef, undef - ; SSE2: cost of 28 {{.*}} %V8F32 = frem - ; SSE42: cost of 28 {{.*}} %V8F32 = frem - ; AVX: cost of 30 {{.*}} %V8F32 = frem - ; AVX2: cost of 30 {{.*}} %V8F32 = frem - ; AVX512: cost of 30 {{.*}} %V8F32 = frem - ; SLM: cost of 28 {{.*}} %V8F32 = frem - ; GLM: cost of 28 {{.*}} %V8F32 = frem %V8F32 = frem <8 x float> undef, undef - ; SSE2: cost of 56 {{.*}} %V16F32 = frem - ; SSE42: cost of 56 {{.*}} %V16F32 = frem - ; AVX: cost of 60 {{.*}} %V16F32 = frem - ; AVX2: cost of 60 {{.*}} %V16F32 = frem - ; AVX512: cost of 62 {{.*}} %V16F32 = frem - ; SLM: cost of 56 {{.*}} %V16F32 = frem - ; GLM: cost of 56 {{.*}} %V16F32 = frem %V16F32 = frem <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = frem - ; SSE42: cost of 2 {{.*}} %F64 = frem - ; AVX: cost of 2 {{.*}} %F64 = frem - ; AVX2: cost of 2 {{.*}} %F64 = frem - ; AVX512: cost of 2 {{.*}} %F64 = frem - ; SLM: cost of 2 {{.*}} %F64 = frem - ; GLM: cost of 2 {{.*}} %F64 = frem %F64 = frem double undef, undef - ; SSE2: cost of 6 {{.*}} %V2F64 = frem - ; SSE42: cost of 6 {{.*}} %V2F64 = frem - ; AVX: cost of 6 {{.*}} %V2F64 = frem - ; AVX2: cost of 6 {{.*}} %V2F64 = frem - ; AVX512: cost of 6 {{.*}} %V2F64 = frem - ; SLM: cost of 6 {{.*}} %V2F64 = frem - ; GLM: cost of 6 {{.*}} %V2F64 = frem %V2F64 = frem <2 x double> undef, undef - ; SSE2: cost of 12 {{.*}} %V4F64 = frem - ; SSE42: cost of 12 {{.*}} %V4F64 = frem - ; AVX: cost of 14 {{.*}} %V4F64 = frem - ; AVX2: cost of 14 {{.*}} %V4F64 = frem - ; AVX512: cost of 14 {{.*}} %V4F64 = frem - ; SLM: cost of 12 {{.*}} %V4F64 = frem - ; GLM: cost of 12 {{.*}} %V4F64 = frem %V4F64 = frem <4 x double> undef, undef - ; SSE2: cost of 24 {{.*}} %V8F64 = frem - ; SSE42: cost of 24 {{.*}} %V8F64 = frem - ; AVX: cost of 28 {{.*}} %V8F64 = frem - ; AVX2: cost of 28 {{.*}} %V8F64 = frem - ; AVX512: cost of 30 {{.*}} %V8F64 = frem - ; SLM: cost of 24 {{.*}} %V8F64 = frem - ; GLM: cost of 24 {{.*}} %V8F64 = frem %V8F64 = frem <8 x double> undef, undef ret i32 undef } -; CHECK-LABEL: 'fsqrt' define i32 @fsqrt(i32 %arg) { - ; SSE2: cost of 28 {{.*}} %F32 = call float @llvm.sqrt.f32 - ; SSE42: cost of 18 {{.*}} %F32 = call float @llvm.sqrt.f32 - ; AVX: cost of 14 {{.*}} %F32 = call float @llvm.sqrt.f32 - ; AVX2: cost of 7 {{.*}} %F32 = call float @llvm.sqrt.f32 - ; AVX512: cost of 7 {{.*}} %F32 = call float @llvm.sqrt.f32 - ; SLM: cost of 20 {{.*}} %F32 = call float @llvm.sqrt.f32 - ; GLM: cost of 19 {{.*}} %F32 = call float @llvm.sqrt.f32 +; SSE2-LABEL: 'fsqrt' +; SSE2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[F32:%.*]] = call float @llvm.sqrt.f32(float undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 112 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 224 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[F64:%.*]] = call double @llvm.sqrt.f64(double undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 64 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 128 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'fsqrt' +; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: [[F32:%.*]] = call float @llvm.sqrt.f32(float undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 72 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[F64:%.*]] = call double @llvm.sqrt.f64(double undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 64 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 128 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'fsqrt' +; AVX1-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[F32:%.*]] = call float @llvm.sqrt.f32(float undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 21 for instruction: [[F64:%.*]] = call double @llvm.sqrt.f64(double undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 21 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 43 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 86 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'fsqrt' +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[F32:%.*]] = call float @llvm.sqrt.f32(float undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[F64:%.*]] = call double @llvm.sqrt.f64(double undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fsqrt' +; AVX512-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[F32:%.*]] = call float @llvm.sqrt.f32(float undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[F64:%.*]] = call double @llvm.sqrt.f64(double undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fsqrt' +; SLM-NEXT: Cost Model: Found an estimated cost of 20 for instruction: [[F32:%.*]] = call float @llvm.sqrt.f32(float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 40 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 80 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 160 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 35 for instruction: [[F64:%.*]] = call double @llvm.sqrt.f64(double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 70 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 140 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 280 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fsqrt' +; GLM-NEXT: Cost Model: Found an estimated cost of 19 for instruction: [[F32:%.*]] = call float @llvm.sqrt.f32(float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 37 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 74 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 148 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 34 for instruction: [[F64:%.*]] = call double @llvm.sqrt.f64(double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 67 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 134 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 268 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = call float @llvm.sqrt.f32(float undef) - ; SSE2: cost of 56 {{.*}} %V4F32 = call <4 x float> @llvm.sqrt.v4f32 - ; SSE42: cost of 18 {{.*}} %V4F32 = call <4 x float> @llvm.sqrt.v4f32 - ; AVX: cost of 14 {{.*}} %V4F32 = call <4 x float> @llvm.sqrt.v4f32 - ; AVX2: cost of 7 {{.*}} %V4F32 = call <4 x float> @llvm.sqrt.v4f32 - ; AVX512: cost of 7 {{.*}} %V4F32 = call <4 x float> @llvm.sqrt.v4f32 - ; SLM: cost of 40 {{.*}} %V4F32 = call <4 x float> @llvm.sqrt.v4f32 - ; GLM: cost of 37 {{.*}} %V4F32 = call <4 x float> @llvm.sqrt.v4f32 %V4F32 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> undef) - ; SSE2: cost of 112 {{.*}} %V8F32 = call <8 x float> @llvm.sqrt.v8f32 - ; SSE42: cost of 36 {{.*}} %V8F32 = call <8 x float> @llvm.sqrt.v8f32 - ; AVX: cost of 28 {{.*}} %V8F32 = call <8 x float> @llvm.sqrt.v8f32 - ; AVX2: cost of 14 {{.*}} %V8F32 = call <8 x float> @llvm.sqrt.v8f32 - ; AVX512: cost of 14 {{.*}} %V8F32 = call <8 x float> @llvm.sqrt.v8f32 - ; SLM: cost of 80 {{.*}} %V8F32 = call <8 x float> @llvm.sqrt.v8f32 - ; GLM: cost of 74 {{.*}} %V8F32 = call <8 x float> @llvm.sqrt.v8f32 %V8F32 = call <8 x float> @llvm.sqrt.v8f32(<8 x float> undef) - ; SSE2: cost of 224 {{.*}} %V16F32 = call <16 x float> @llvm.sqrt.v16f32 - ; SSE42: cost of 72 {{.*}} %V16F32 = call <16 x float> @llvm.sqrt.v16f32 - ; AVX: cost of 56 {{.*}} %V16F32 = call <16 x float> @llvm.sqrt.v16f32 - ; AVX2: cost of 28 {{.*}} %V16F32 = call <16 x float> @llvm.sqrt.v16f32 - ; AVX512: cost of 1 {{.*}} %V16F32 = call <16 x float> @llvm.sqrt.v16f32 - ; SLM: cost of 160 {{.*}} %V16F32 = call <16 x float> @llvm.sqrt.v16f32 - ; GLM: cost of 148 {{.*}} %V16F32 = call <16 x float> @llvm.sqrt.v16f32 %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef) - ; SSE2: cost of 32 {{.*}} %F64 = call double @llvm.sqrt.f64 - ; SSE42: cost of 32 {{.*}} %F64 = call double @llvm.sqrt.f64 - ; AVX: cost of 21 {{.*}} %F64 = call double @llvm.sqrt.f64 - ; AVX2: cost of 14 {{.*}} %F64 = call double @llvm.sqrt.f64 - ; AVX512: cost of 14 {{.*}} %F64 = call double @llvm.sqrt.f64 - ; SLM: cost of 35 {{.*}} %F64 = call double @llvm.sqrt.f64 - ; GLM: cost of 34 {{.*}} %F64 = call double @llvm.sqrt.f64 %F64 = call double @llvm.sqrt.f64(double undef) - ; SSE2: cost of 32 {{.*}} %V2F64 = call <2 x double> @llvm.sqrt.v2f64 - ; SSE42: cost of 32 {{.*}} %V2F64 = call <2 x double> @llvm.sqrt.v2f64 - ; AVX: cost of 21 {{.*}} %V2F64 = call <2 x double> @llvm.sqrt.v2f64 - ; AVX2: cost of 14 {{.*}} %V2F64 = call <2 x double> @llvm.sqrt.v2f64 - ; AVX512: cost of 14 {{.*}} %V2F64 = call <2 x double> @llvm.sqrt.v2f64 - ; SLM: cost of 70 {{.*}} %V2F64 = call <2 x double> @llvm.sqrt.v2f64 - ; GLM: cost of 67 {{.*}} %V2F64 = call <2 x double> @llvm.sqrt.v2f64 %V2F64 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> undef) - ; SSE2: cost of 64 {{.*}} %V4F64 = call <4 x double> @llvm.sqrt.v4f64 - ; SSE42: cost of 64 {{.*}} %V4F64 = call <4 x double> @llvm.sqrt.v4f64 - ; AVX: cost of 43 {{.*}} %V4F64 = call <4 x double> @llvm.sqrt.v4f64 - ; AVX2: cost of 28 {{.*}} %V4F64 = call <4 x double> @llvm.sqrt.v4f64 - ; AVX512: cost of 28 {{.*}} %V4F64 = call <4 x double> @llvm.sqrt.v4f64 - ; SLM: cost of 140 {{.*}} %V4F64 = call <4 x double> @llvm.sqrt.v4f64 - ; GLM: cost of 134 {{.*}} %V4F64 = call <4 x double> @llvm.sqrt.v4f64 %V4F64 = call <4 x double> @llvm.sqrt.v4f64(<4 x double> undef) - ; SSE2: cost of 128 {{.*}} %V8F64 = call <8 x double> @llvm.sqrt.v8f64 - ; SSE42: cost of 128 {{.*}} %V8F64 = call <8 x double> @llvm.sqrt.v8f64 - ; AVX: cost of 86 {{.*}} %V8F64 = call <8 x double> @llvm.sqrt.v8f64 - ; AVX2: cost of 56 {{.*}} %V8F64 = call <8 x double> @llvm.sqrt.v8f64 - ; AVX512: cost of 1 {{.*}} %V8F64 = call <8 x double> @llvm.sqrt.v8f64 - ; SLM: cost of 280 {{.*}} %V8F64 = call <8 x double> @llvm.sqrt.v8f64 - ; GLM: cost of 268 {{.*}} %V8F64 = call <8 x double> @llvm.sqrt.v8f64 %V8F64 = call <8 x double> @llvm.sqrt.v8f64(<8 x double> undef) ret i32 undef } -; CHECK-LABEL: 'fabs' define i32 @fabs(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = call float @llvm.fabs.f32 - ; SSE42: cost of 2 {{.*}} %F32 = call float @llvm.fabs.f32 - ; AVX: cost of 2 {{.*}} %F32 = call float @llvm.fabs.f32 - ; AVX2: cost of 2 {{.*}} %F32 = call float @llvm.fabs.f32 - ; AVX512: cost of 2 {{.*}} %F32 = call float @llvm.fabs.f32 - ; SLM: cost of 2 {{.*}} %F32 = call float @llvm.fabs.f32 - ; GLM: cost of 2 {{.*}} %F32 = call float @llvm.fabs.f32 +; SSE-LABEL: 'fabs' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.fabs.f32(float undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.fabs.f64(double undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'fabs' +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.fabs.f32(float undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.fabs.f64(double undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fabs' +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.fabs.f32(float undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.fabs.f64(double undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fabs' +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.fabs.f32(float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.fabs.f64(double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fabs' +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.fabs.f32(float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.fabs.f64(double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = call float @llvm.fabs.f32(float undef) - ; SSE2: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.fabs.v4f32 - ; SSE42: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.fabs.v4f32 - ; AVX: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.fabs.v4f32 - ; AVX2: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.fabs.v4f32 - ; AVX512: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.fabs.v4f32 - ; SLM: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.fabs.v4f32 - ; GLM: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.fabs.v4f32 %V4F32 = call <4 x float> @llvm.fabs.v4f32(<4 x float> undef) - ; SSE2: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.fabs.v8f32 - ; SSE42: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.fabs.v8f32 - ; AVX: cost of 2 {{.*}} %V8F32 = call <8 x float> @llvm.fabs.v8f32 - ; AVX2: cost of 2 {{.*}} %V8F32 = call <8 x float> @llvm.fabs.v8f32 - ; AVX512: cost of 2 {{.*}} %V8F32 = call <8 x float> @llvm.fabs.v8f32 - ; SLM: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.fabs.v8f32 - ; GLM: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.fabs.v8f32 %V8F32 = call <8 x float> @llvm.fabs.v8f32(<8 x float> undef) - ; SSE2: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.fabs.v16f32 - ; SSE42: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.fabs.v16f32 - ; AVX: cost of 4 {{.*}} %V16F32 = call <16 x float> @llvm.fabs.v16f32 - ; AVX2: cost of 4 {{.*}} %V16F32 = call <16 x float> @llvm.fabs.v16f32 - ; AVX512: cost of 2 {{.*}} %V16F32 = call <16 x float> @llvm.fabs.v16f32 - ; SLM: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.fabs.v16f32 - ; GLM: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.fabs.v16f32 %V16F32 = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef) - ; SSE2: cost of 2 {{.*}} %F64 = call double @llvm.fabs.f64 - ; SSE42: cost of 2 {{.*}} %F64 = call double @llvm.fabs.f64 - ; AVX: cost of 2 {{.*}} %F64 = call double @llvm.fabs.f64 - ; AVX2: cost of 2 {{.*}} %F64 = call double @llvm.fabs.f64 - ; AVX512: cost of 2 {{.*}} %F64 = call double @llvm.fabs.f64 - ; SLM: cost of 2 {{.*}} %F64 = call double @llvm.fabs.f64 - ; GLM: cost of 2 {{.*}} %F64 = call double @llvm.fabs.f64 %F64 = call double @llvm.fabs.f64(double undef) - ; SSE2: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.fabs.v2f64 - ; SSE42: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.fabs.v2f64 - ; AVX: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.fabs.v2f64 - ; AVX2: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.fabs.v2f64 - ; AVX512: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.fabs.v2f64 - ; SLM: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.fabs.v2f64 - ; GLM: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.fabs.v2f64 %V2F64 = call <2 x double> @llvm.fabs.v2f64(<2 x double> undef) - ; SSE2: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.fabs.v4f64 - ; SSE42: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.fabs.v4f64 - ; AVX: cost of 2 {{.*}} %V4F64 = call <4 x double> @llvm.fabs.v4f64 - ; AVX2: cost of 2 {{.*}} %V4F64 = call <4 x double> @llvm.fabs.v4f64 - ; AVX512: cost of 2 {{.*}} %V4F64 = call <4 x double> @llvm.fabs.v4f64 - ; SLM: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.fabs.v4f64 - ; GLM: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.fabs.v4f64 %V4F64 = call <4 x double> @llvm.fabs.v4f64(<4 x double> undef) - ; SSE2: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.fabs.v8f64 - ; SSE42: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.fabs.v8f64 - ; AVX: cost of 4 {{.*}} %V8F64 = call <8 x double> @llvm.fabs.v8f64 - ; AVX2: cost of 4 {{.*}} %V8F64 = call <8 x double> @llvm.fabs.v8f64 - ; AVX512: cost of 2 {{.*}} %V8F64 = call <8 x double> @llvm.fabs.v8f64 - ; SLM: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.fabs.v8f64 - ; GLM: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.fabs.v8f64 %V8F64 = call <8 x double> @llvm.fabs.v8f64(<8 x double> undef) ret i32 undef } -; CHECK-LABEL: 'fcopysign' define i32 @fcopysign(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = call float @llvm.copysign.f32 - ; SSE42: cost of 2 {{.*}} %F32 = call float @llvm.copysign.f32 - ; AVX: cost of 2 {{.*}} %F32 = call float @llvm.copysign.f32 - ; AVX2: cost of 2 {{.*}} %F32 = call float @llvm.copysign.f32 - ; AVX512: cost of 2 {{.*}} %F32 = call float @llvm.copysign.f32 - ; SLM: cost of 2 {{.*}} %F32 = call float @llvm.copysign.f32 - ; GLM: cost of 2 {{.*}} %F32 = call float @llvm.copysign.f32 +; SSE-LABEL: 'fcopysign' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.copysign.f32(float undef, float undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.copysign.f64(double undef, double undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'fcopysign' +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.copysign.f32(float undef, float undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.copysign.f64(double undef, double undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fcopysign' +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.copysign.f32(float undef, float undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.copysign.f64(double undef, double undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fcopysign' +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.copysign.f32(float undef, float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.copysign.f64(double undef, double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fcopysign' +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F32:%.*]] = call float @llvm.copysign.f32(float undef, float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[F64:%.*]] = call double @llvm.copysign.f64(double undef, double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = call float @llvm.copysign.f32(float undef, float undef) - ; SSE2: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.copysign.v4f32 - ; SSE42: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.copysign.v4f32 - ; AVX: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.copysign.v4f32 - ; AVX2: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.copysign.v4f32 - ; AVX512: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.copysign.v4f32 - ; SLM: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.copysign.v4f32 - ; GLM: cost of 2 {{.*}} %V4F32 = call <4 x float> @llvm.copysign.v4f32 %V4F32 = call <4 x float> @llvm.copysign.v4f32(<4 x float> undef, <4 x float> undef) - ; SSE2: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.copysign.v8f32 - ; SSE42: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.copysign.v8f32 - ; AVX: cost of 2 {{.*}} %V8F32 = call <8 x float> @llvm.copysign.v8f32 - ; AVX2: cost of 2 {{.*}} %V8F32 = call <8 x float> @llvm.copysign.v8f32 - ; AVX512: cost of 2 {{.*}} %V8F32 = call <8 x float> @llvm.copysign.v8f32 - ; SLM: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.copysign.v8f32 - ; GLM: cost of 4 {{.*}} %V8F32 = call <8 x float> @llvm.copysign.v8f32 %V8F32 = call <8 x float> @llvm.copysign.v8f32(<8 x float> undef, <8 x float> undef) - ; SSE2: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.copysign.v16f32 - ; SSE42: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.copysign.v16f32 - ; AVX: cost of 4 {{.*}} %V16F32 = call <16 x float> @llvm.copysign.v16f32 - ; AVX2: cost of 4 {{.*}} %V16F32 = call <16 x float> @llvm.copysign.v16f32 - ; AVX512: cost of 2 {{.*}} %V16F32 = call <16 x float> @llvm.copysign.v16f32 - ; SLM: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.copysign.v16f32 - ; GLM: cost of 8 {{.*}} %V16F32 = call <16 x float> @llvm.copysign.v16f32 %V16F32 = call <16 x float> @llvm.copysign.v16f32(<16 x float> undef, <16 x float> undef) - ; SSE2: cost of 2 {{.*}} %F64 = call double @llvm.copysign.f64 - ; SSE42: cost of 2 {{.*}} %F64 = call double @llvm.copysign.f64 - ; AVX: cost of 2 {{.*}} %F64 = call double @llvm.copysign.f64 - ; AVX2: cost of 2 {{.*}} %F64 = call double @llvm.copysign.f64 - ; AVX512: cost of 2 {{.*}} %F64 = call double @llvm.copysign.f64 - ; SLM: cost of 2 {{.*}} %F64 = call double @llvm.copysign.f64 - ; GLM: cost of 2 {{.*}} %F64 = call double @llvm.copysign.f64 %F64 = call double @llvm.copysign.f64(double undef, double undef) - ; SSE2: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.copysign.v2f64 - ; SSE42: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.copysign.v2f64 - ; AVX: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.copysign.v2f64 - ; AVX2: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.copysign.v2f64 - ; AVX512: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.copysign.v2f64 - ; SLM: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.copysign.v2f64 - ; GLM: cost of 2 {{.*}} %V2F64 = call <2 x double> @llvm.copysign.v2f64 %V2F64 = call <2 x double> @llvm.copysign.v2f64(<2 x double> undef, <2 x double> undef) - ; SSE2: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.copysign.v4f64 - ; SSE42: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.copysign.v4f64 - ; AVX: cost of 2 {{.*}} %V4F64 = call <4 x double> @llvm.copysign.v4f64 - ; AVX2: cost of 2 {{.*}} %V4F64 = call <4 x double> @llvm.copysign.v4f64 - ; AVX512: cost of 2 {{.*}} %V4F64 = call <4 x double> @llvm.copysign.v4f64 - ; SLM: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.copysign.v4f64 - ; GLM: cost of 4 {{.*}} %V4F64 = call <4 x double> @llvm.copysign.v4f64 %V4F64 = call <4 x double> @llvm.copysign.v4f64(<4 x double> undef, <4 x double> undef) - ; SSE2: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.copysign.v8f64 - ; SSE42: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.copysign.v8f64 - ; AVX: cost of 4 {{.*}} %V8F64 = call <8 x double> @llvm.copysign.v8f64 - ; AVX2: cost of 4 {{.*}} %V8F64 = call <8 x double> @llvm.copysign.v8f64 - ; AVX512: cost of 2 {{.*}} %V8F64 = call <8 x double> @llvm.copysign.v8f64 - ; SLM: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.copysign.v8f64 - ; GLM: cost of 8 {{.*}} %V8F64 = call <8 x double> @llvm.copysign.v8f64 %V8F64 = call <8 x double> @llvm.copysign.v8f64(<8 x double> undef, <8 x double> undef) ret i32 undef } -; CHECK-LABEL: 'fma' define i32 @fma(i32 %arg) { - ; SSE2: cost of 10 {{.*}} %F32 = call float @llvm.fma.f32 - ; SSE42: cost of 10 {{.*}} %F32 = call float @llvm.fma.f32 - ; AVX: cost of 1 {{.*}} %F32 = call float @llvm.fma.f32 - ; AVX2: cost of 1 {{.*}} %F32 = call float @llvm.fma.f32 - ; AVX512: cost of 1 {{.*}} %F32 = call float @llvm.fma.f32 - ; SLM: cost of 10 {{.*}} %F32 = call float @llvm.fma.f32 - ; GLM: cost of 10 {{.*}} %F32 = call float @llvm.fma.f32 +; SSE-LABEL: 'fma' +; SSE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: [[F32:%.*]] = call float @llvm.fma.f32(float undef, float undef, float undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 43 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 86 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 172 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: [[F64:%.*]] = call double @llvm.fma.f64(double undef, double undef, double undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 21 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 42 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 84 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'fma' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = call float @llvm.fma.f32(float undef, float undef, float undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = call double @llvm.fma.f64(double undef, double undef, double undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512-LABEL: 'fma' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F32:%.*]] = call float @llvm.fma.f32(float undef, float undef, float undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[F64:%.*]] = call double @llvm.fma.f64(double undef, double undef, double undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'fma' +; SLM-NEXT: Cost Model: Found an estimated cost of 10 for instruction: [[F32:%.*]] = call float @llvm.fma.f32(float undef, float undef, float undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 43 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 86 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 172 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 10 for instruction: [[F64:%.*]] = call double @llvm.fma.f64(double undef, double undef, double undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 21 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 42 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 84 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'fma' +; GLM-NEXT: Cost Model: Found an estimated cost of 10 for instruction: [[F32:%.*]] = call float @llvm.fma.f32(float undef, float undef, float undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 43 for instruction: [[V4F32:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 86 for instruction: [[V8F32:%.*]] = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 172 for instruction: [[V16F32:%.*]] = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 10 for instruction: [[F64:%.*]] = call double @llvm.fma.f64(double undef, double undef, double undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 21 for instruction: [[V2F64:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 42 for instruction: [[V4F64:%.*]] = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 84 for instruction: [[V8F64:%.*]] = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %F32 = call float @llvm.fma.f32(float undef, float undef, float undef) - ; SSE2: cost of 43 {{.*}} %V4F32 = call <4 x float> @llvm.fma.v4f32 - ; SSE42: cost of 43 {{.*}} %V4F32 = call <4 x float> @llvm.fma.v4f32 - ; AVX: cost of 1 {{.*}} %V4F32 = call <4 x float> @llvm.fma.v4f32 - ; AVX2: cost of 1 {{.*}} %V4F32 = call <4 x float> @llvm.fma.v4f32 - ; AVX512: cost of 1 {{.*}} %V4F32 = call <4 x float> @llvm.fma.v4f32 - ; SLM: cost of 43 {{.*}} %V4F32 = call <4 x float> @llvm.fma.v4f32 - ; GLM: cost of 43 {{.*}} %V4F32 = call <4 x float> @llvm.fma.v4f32 %V4F32 = call <4 x float> @llvm.fma.v4f32(<4 x float> undef, <4 x float> undef, <4 x float> undef) - ; SSE2: cost of 86 {{.*}} %V8F32 = call <8 x float> @llvm.fma.v8f32 - ; SSE42: cost of 86 {{.*}} %V8F32 = call <8 x float> @llvm.fma.v8f32 - ; AVX: cost of 1 {{.*}} %V8F32 = call <8 x float> @llvm.fma.v8f32 - ; AVX2: cost of 1 {{.*}} %V8F32 = call <8 x float> @llvm.fma.v8f32 - ; AVX512: cost of 1 {{.*}} %V8F32 = call <8 x float> @llvm.fma.v8f32 - ; SLM: cost of 86 {{.*}} %V8F32 = call <8 x float> @llvm.fma.v8f32 - ; GLM: cost of 86 {{.*}} %V8F32 = call <8 x float> @llvm.fma.v8f32 %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef) - ; SSE2: cost of 172 {{.*}} %V16F32 = call <16 x float> @llvm.fma.v16f32 - ; SSE42: cost of 172 {{.*}} %V16F32 = call <16 x float> @llvm.fma.v16f32 - ; AVX: cost of 4 {{.*}} %V16F32 = call <16 x float> @llvm.fma.v16f32 - ; AVX2: cost of 4 {{.*}} %V16F32 = call <16 x float> @llvm.fma.v16f32 - ; AVX512: cost of 1 {{.*}} %V16F32 = call <16 x float> @llvm.fma.v16f32 - ; SLM: cost of 172 {{.*}} %V16F32 = call <16 x float> @llvm.fma.v16f32 - ; GLM: cost of 172 {{.*}} %V16F32 = call <16 x float> @llvm.fma.v16f32 %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> undef) - ; SSE2: cost of 10 {{.*}} %F64 = call double @llvm.fma.f64 - ; SSE42: cost of 10 {{.*}} %F64 = call double @llvm.fma.f64 - ; AVX: cost of 1 {{.*}} %F64 = call double @llvm.fma.f64 - ; AVX2: cost of 1 {{.*}} %F64 = call double @llvm.fma.f64 - ; AVX512: cost of 1 {{.*}} %F64 = call double @llvm.fma.f64 - ; SLM: cost of 10 {{.*}} %F64 = call double @llvm.fma.f64 - ; GLM: cost of 10 {{.*}} %F64 = call double @llvm.fma.f64 %F64 = call double @llvm.fma.f64(double undef, double undef, double undef) - ; SSE2: cost of 21 {{.*}} %V2F64 = call <2 x double> @llvm.fma.v2f64 - ; SSE42: cost of 21 {{.*}} %V2F64 = call <2 x double> @llvm.fma.v2f64 - ; AVX: cost of 1 {{.*}} %V2F64 = call <2 x double> @llvm.fma.v2f64 - ; AVX2: cost of 1 {{.*}} %V2F64 = call <2 x double> @llvm.fma.v2f64 - ; AVX512: cost of 1 {{.*}} %V2F64 = call <2 x double> @llvm.fma.v2f64 - ; SLM: cost of 21 {{.*}} %V2F64 = call <2 x double> @llvm.fma.v2f64 - ; GLM: cost of 21 {{.*}} %V2F64 = call <2 x double> @llvm.fma.v2f64 %V2F64 = call <2 x double> @llvm.fma.v2f64(<2 x double> undef, <2 x double> undef, <2 x double> undef) - ; SSE2: cost of 42 {{.*}} %V4F64 = call <4 x double> @llvm.fma.v4f64 - ; SSE42: cost of 42 {{.*}} %V4F64 = call <4 x double> @llvm.fma.v4f64 - ; AVX: cost of 1 {{.*}} %V4F64 = call <4 x double> @llvm.fma.v4f64 - ; AVX2: cost of 1 {{.*}} %V4F64 = call <4 x double> @llvm.fma.v4f64 - ; AVX512: cost of 1 {{.*}} %V4F64 = call <4 x double> @llvm.fma.v4f64 - ; SLM: cost of 42 {{.*}} %V4F64 = call <4 x double> @llvm.fma.v4f64 - ; GLM: cost of 42 {{.*}} %V4F64 = call <4 x double> @llvm.fma.v4f64 %V4F64 = call <4 x double> @llvm.fma.v4f64(<4 x double> undef, <4 x double> undef, <4 x double> undef) - ; SSE2: cost of 84 {{.*}} %V8F64 = call <8 x double> @llvm.fma.v8f64 - ; SSE42: cost of 84 {{.*}} %V8F64 = call <8 x double> @llvm.fma.v8f64 - ; AVX: cost of 4 {{.*}} %V8F64 = call <8 x double> @llvm.fma.v8f64 - ; AVX2: cost of 4 {{.*}} %V8F64 = call <8 x double> @llvm.fma.v8f64 - ; AVX512: cost of 1 {{.*}} %V8F64 = call <8 x double> @llvm.fma.v8f64 - ; SLM: cost of 84 {{.*}} %V8F64 = call <8 x double> @llvm.fma.v8f64 - ; GLM: cost of 84 {{.*}} %V8F64 = call <8 x double> @llvm.fma.v8f64 %V8F64 = call <8 x double> @llvm.fma.v8f64(<8 x double> undef, <8 x double> undef, <8 x double> undef) ret i32 undef Index: test/Analysis/CostModel/X86/arith.ll =================================================================== --- test/Analysis/CostModel/X86/arith.ll +++ test/Analysis/CostModel/X86/arith.ll @@ -1,728 +1,1067 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+ssse3 | FileCheck %s --check-prefix=CHECK --check-prefix=SSSE3 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512DQ -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefix=CHECK --check-prefix=SLM -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefix=CHECK --check-prefix=GLM +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSSE3 +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42 +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512DQ +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SLM +; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,GLM target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.8.0" -; CHECK-LABEL: 'add' define i32 @add(i32 %arg) { - ; CHECK: cost of 1 {{.*}} %I64 = add +; SSE-LABEL: 'add' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'add' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'add' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512F-LABEL: 'add' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512BW-LABEL: 'add' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512DQ-LABEL: 'add' +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'add' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 16 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'add' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = add i64 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = add <2 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = add <4 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = add <8 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = add i32 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = add <4 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = add <8 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = add <16 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = add i16 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = add <8 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = add <16 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = add <32 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = add i8 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = add <16 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = add <32 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = add <64 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %I64 = add i64 undef, undef - ; SSSE3: cost of 1 {{.*}} %V2I64 = add - ; SSE42: cost of 1 {{.*}} %V2I64 = add - ; SLM: cost of 4 {{.*}} %V2I64 = add - ; GLM: cost of 1 {{.*}} %V2I64 = add - ; AVX: cost of 1 {{.*}} %V2I64 = add - ; AVX2: cost of 1 {{.*}} %V2I64 = add - ; AVX512: cost of 1 {{.*}} %V2I64 = add %V2I64 = add <2 x i64> undef, undef - ; SSSE3: cost of 2 {{.*}} %V4I64 = add - ; SSE42: cost of 2 {{.*}} %V4I64 = add - ; SLM: cost of 8 {{.*}} %V4I64 = add - ; GLM: cost of 2 {{.*}} %V4I64 = add - ; AVX: cost of 4 {{.*}} %V4I64 = add - ; AVX2: cost of 1 {{.*}} %V4I64 = add - ; AVX512: cost of 1 {{.*}} %V4I64 = add %V4I64 = add <4 x i64> undef, undef - ; SSSE3: cost of 4 {{.*}} %V8I64 = add - ; SSE42: cost of 4 {{.*}} %V8I64 = add - ; SLM: cost of 16 {{.*}} %V8I64 = add - ; GLM: cost of 4 {{.*}} %V8I64 = add - ; AVX: cost of 8 {{.*}} %V8I64 = add - ; AVX2: cost of 2 {{.*}} %V8I64 = add - ; AVX512: cost of 1 {{.*}} %V8I64 = add %V8I64 = add <8 x i64> undef, undef - ; CHECK: cost of 1 {{.*}} %I32 = add %I32 = add i32 undef, undef - ; SSSE3: cost of 1 {{.*}} %V4I32 = add - ; SSE42: cost of 1 {{.*}} %V4I32 = add - ; SLM: cost of 1 {{.*}} %V4I32 = add - ; GLM: cost of 1 {{.*}} %V4I32 = add - ; AVX: cost of 1 {{.*}} %V4I32 = add - ; AVX2: cost of 1 {{.*}} %V4I32 = add - ; AVX512: cost of 1 {{.*}} %V4I32 = add %V4I32 = add <4 x i32> undef, undef - ; SSSE3: cost of 2 {{.*}} %V8I32 = add - ; SSE42: cost of 2 {{.*}} %V8I32 = add - ; SLM: cost of 2 {{.*}} %V8I32 = add - ; GLM: cost of 2 {{.*}} %V8I32 = add - ; AVX: cost of 4 {{.*}} %V8I32 = add - ; AVX2: cost of 1 {{.*}} %V8I32 = add - ; AVX512: cost of 1 {{.*}} %V8I32 = add %V8I32 = add <8 x i32> undef, undef - ; SSSE3: cost of 4 {{.*}} %V16I32 = add - ; SSE42: cost of 4 {{.*}} %V16I32 = add - ; SLM: cost of 4 {{.*}} %V16I32 = add - ; GLM: cost of 4 {{.*}} %V16I32 = add - ; AVX: cost of 8 {{.*}} %V16I32 = add - ; AVX2: cost of 2 {{.*}} %V16I32 = add - ; AVX512: cost of 1 {{.*}} %V16I32 = add %V16I32 = add <16 x i32> undef, undef - ; CHECK: cost of 1 {{.*}} %I16 = add %I16 = add i16 undef, undef - ; SSSE3: cost of 1 {{.*}} %V8I16 = add - ; SSE42: cost of 1 {{.*}} %V8I16 = add - ; SLM: cost of 1 {{.*}} %V8I16 = add - ; GLM: cost of 1 {{.*}} %V8I16 = add - ; AVX: cost of 1 {{.*}} %V8I16 = add - ; AVX2: cost of 1 {{.*}} %V8I16 = add - ; AVX512: cost of 1 {{.*}} %V8I16 = add %V8I16 = add <8 x i16> undef, undef - ; SSSE3: cost of 2 {{.*}} %V16I16 = add - ; SSE42: cost of 2 {{.*}} %V16I16 = add - ; SLM: cost of 2 {{.*}} %V16I16 = add - ; GLM: cost of 2 {{.*}} %V16I16 = add - ; AVX: cost of 4 {{.*}} %V16I16 = add - ; AVX2: cost of 1 {{.*}} %V16I16 = add - ; AVX512: cost of 1 {{.*}} %V16I16 = add %V16I16 = add <16 x i16> undef, undef - ; SSSE3: cost of 4 {{.*}} %V32I16 = add - ; SSE42: cost of 4 {{.*}} %V32I16 = add - ; SLM: cost of 4 {{.*}} %V32I16 = add - ; GLM: cost of 4 {{.*}} %V32I16 = add - ; AVX: cost of 8 {{.*}} %V32I16 = add - ; AVX2: cost of 2 {{.*}} %V32I16 = add - ; AVX512F: cost of 2 {{.*}} %V32I16 = add - ; AVX512BW: cost of 1 {{.*}} %V32I16 = add %V32I16 = add <32 x i16> undef, undef - ; CHECK: cost of 1 {{.*}} %I8 = add %I8 = add i8 undef, undef - ; SSSE3: cost of 1 {{.*}} %V16I8 = add - ; SSE42: cost of 1 {{.*}} %V16I8 = add - ; SLM: cost of 1 {{.*}} %V16I8 = add - ; GLM: cost of 1 {{.*}} %V16I8 = add - ; AVX: cost of 1 {{.*}} %V16I8 = add - ; AVX2: cost of 1 {{.*}} %V16I8 = add - ; AVX512: cost of 1 {{.*}} %V16I8 = add %V16I8 = add <16 x i8> undef, undef - ; SSSE3: cost of 2 {{.*}} %V32I8 = add - ; SSE42: cost of 2 {{.*}} %V32I8 = add - ; SLM: cost of 2 {{.*}} %V32I8 = add - ; GLM: cost of 2 {{.*}} %V32I8 = add - ; AVX: cost of 4 {{.*}} %V32I8 = add - ; AVX2: cost of 1 {{.*}} %V32I8 = add - ; AVX512: cost of 1 {{.*}} %V32I8 = add %V32I8 = add <32 x i8> undef, undef - ; SSSE3: cost of 4 {{.*}} %V64I8 = add - ; SSE42: cost of 4 {{.*}} %V64I8 = add - ; SLM: cost of 4 {{.*}} %V64I8 = add - ; GLM: cost of 4 {{.*}} %V64I8 = add - ; AVX: cost of 8 {{.*}} %V64I8 = add - ; AVX2: cost of 2 {{.*}} %V64I8 = add - ; AVX512F: cost of 2 {{.*}} %V64I8 = add - ; AVX512BW: cost of 1 {{.*}} %V64I8 = add %V64I8 = add <64 x i8> undef, undef ret i32 undef } -; CHECK-LABEL: 'sub' define i32 @sub(i32 %arg) { - ; CHECK: cost of 1 {{.*}} %I64 = sub +; SSE-LABEL: 'sub' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'sub' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'sub' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512F-LABEL: 'sub' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512BW-LABEL: 'sub' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512DQ-LABEL: 'sub' +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'sub' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 16 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'sub' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = sub i64 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = sub <2 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = sub <4 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = sub <8 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = sub i32 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = sub <4 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = sub <8 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = sub <16 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = sub i16 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = sub <8 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = sub <16 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = sub <32 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = sub i8 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = sub <16 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = sub <32 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = sub <64 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %I64 = sub i64 undef, undef - ; SSSE3: cost of 1 {{.*}} %V2I64 = sub - ; SSE42: cost of 1 {{.*}} %V2I64 = sub - ; SLM: cost of 4 {{.*}} %V2I64 = sub - ; GLM: cost of 1 {{.*}} %V2I64 = sub - ; AVX: cost of 1 {{.*}} %V2I64 = sub - ; AVX2: cost of 1 {{.*}} %V2I64 = sub - ; AVX512: cost of 1 {{.*}} %V2I64 = sub %V2I64 = sub <2 x i64> undef, undef - ; SSSE3: cost of 2 {{.*}} %V4I64 = sub - ; SSE42: cost of 2 {{.*}} %V4I64 = sub - ; SLM: cost of 8 {{.*}} %V4I64 = sub - ; GLM: cost of 2 {{.*}} %V4I64 = sub - ; AVX: cost of 4 {{.*}} %V4I64 = sub - ; AVX2: cost of 1 {{.*}} %V4I64 = sub - ; AVX512: cost of 1 {{.*}} %V4I64 = sub %V4I64 = sub <4 x i64> undef, undef - ; SSSE3: cost of 4 {{.*}} %V8I64 = sub - ; SSE42: cost of 4 {{.*}} %V8I64 = sub - ; SLM: cost of 16 {{.*}} %V8I64 = sub - ; GLM: cost of 4 {{.*}} %V8I64 = sub - ; AVX: cost of 8 {{.*}} %V8I64 = sub - ; AVX2: cost of 2 {{.*}} %V8I64 = sub - ; AVX512: cost of 1 {{.*}} %V8I64 = sub %V8I64 = sub <8 x i64> undef, undef - ; CHECK: cost of 1 {{.*}} %I32 = sub %I32 = sub i32 undef, undef - ; SSSE3: cost of 1 {{.*}} %V4I32 = sub - ; SSE42: cost of 1 {{.*}} %V4I32 = sub - ; SLM: cost of 1 {{.*}} %V4I32 = sub - ; GLM: cost of 1 {{.*}} %V4I32 = sub - ; AVX: cost of 1 {{.*}} %V4I32 = sub - ; AVX2: cost of 1 {{.*}} %V4I32 = sub - ; AVX512: cost of 1 {{.*}} %V4I32 = sub %V4I32 = sub <4 x i32> undef, undef - ; SSSE3: cost of 2 {{.*}} %V8I32 = sub - ; SSE42: cost of 2 {{.*}} %V8I32 = sub - ; SLM: cost of 2 {{.*}} %V8I32 = sub - ; GLM: cost of 2 {{.*}} %V8I32 = sub - ; AVX: cost of 4 {{.*}} %V8I32 = sub - ; AVX2: cost of 1 {{.*}} %V8I32 = sub - ; AVX512: cost of 1 {{.*}} %V8I32 = sub %V8I32 = sub <8 x i32> undef, undef - ; SSSE3: cost of 4 {{.*}} %V16I32 = sub - ; SSE42: cost of 4 {{.*}} %V16I32 = sub - ; SLM: cost of 4 {{.*}} %V16I32 = sub - ; GLM: cost of 4 {{.*}} %V16I32 = sub - ; AVX: cost of 8 {{.*}} %V16I32 = sub - ; AVX2: cost of 2 {{.*}} %V16I32 = sub - ; AVX512: cost of 1 {{.*}} %V16I32 = sub %V16I32 = sub <16 x i32> undef, undef - ; CHECK: cost of 1 {{.*}} %I16 = sub %I16 = sub i16 undef, undef - ; SSSE3: cost of 1 {{.*}} %V8I16 = sub - ; SSE42: cost of 1 {{.*}} %V8I16 = sub - ; SLM: cost of 1 {{.*}} %V8I16 = sub - ; GLM: cost of 1 {{.*}} %V8I16 = sub - ; AVX: cost of 1 {{.*}} %V8I16 = sub - ; AVX2: cost of 1 {{.*}} %V8I16 = sub - ; AVX512: cost of 1 {{.*}} %V8I16 = sub %V8I16 = sub <8 x i16> undef, undef - ; SSSE3: cost of 2 {{.*}} %V16I16 = sub - ; SSE42: cost of 2 {{.*}} %V16I16 = sub - ; SLM: cost of 2 {{.*}} %V16I16 = sub - ; GLM: cost of 2 {{.*}} %V16I16 = sub - ; AVX: cost of 4 {{.*}} %V16I16 = sub - ; AVX2: cost of 1 {{.*}} %V16I16 = sub - ; AVX512: cost of 1 {{.*}} %V16I16 = sub %V16I16 = sub <16 x i16> undef, undef - ; SSSE3: cost of 4 {{.*}} %V32I16 = sub - ; SSE42: cost of 4 {{.*}} %V32I16 = sub - ; SLM: cost of 4 {{.*}} %V32I16 = sub - ; GLM: cost of 4 {{.*}} %V32I16 = sub - ; AVX: cost of 8 {{.*}} %V32I16 = sub - ; AVX2: cost of 2 {{.*}} %V32I16 = sub - ; AVX512F: cost of 2 {{.*}} %V32I16 = sub - ; AVX512BW: cost of 1 {{.*}} %V32I16 = sub %V32I16 = sub <32 x i16> undef, undef - ; CHECK: cost of 1 {{.*}} %I8 = sub %I8 = sub i8 undef, undef - ; SSSE3: cost of 1 {{.*}} %V16I8 = sub - ; SSE42: cost of 1 {{.*}} %V16I8 = sub - ; SLM: cost of 1 {{.*}} %V16I8 = sub - ; GLM: cost of 1 {{.*}} %V16I8 = sub - ; AVX: cost of 1 {{.*}} %V16I8 = sub - ; AVX2: cost of 1 {{.*}} %V16I8 = sub - ; AVX512: cost of 1 {{.*}} %V16I8 = sub %V16I8 = sub <16 x i8> undef, undef - ; SSSE3: cost of 2 {{.*}} %V32I8 = sub - ; SSE42: cost of 2 {{.*}} %V32I8 = sub - ; SLM: cost of 2 {{.*}} %V32I8 = sub - ; GLM: cost of 2 {{.*}} %V32I8 = sub - ; AVX: cost of 4 {{.*}} %V32I8 = sub - ; AVX2: cost of 1 {{.*}} %V32I8 = sub - ; AVX512: cost of 1 {{.*}} %V32I8 = sub %V32I8 = sub <32 x i8> undef, undef - ; SSSE3: cost of 4 {{.*}} %V64I8 = sub - ; SSE42: cost of 4 {{.*}} %V64I8 = sub - ; SLM: cost of 4 {{.*}} %V64I8 = sub - ; GLM: cost of 4 {{.*}} %V64I8 = sub - ; AVX: cost of 8 {{.*}} %V64I8 = sub - ; AVX2: cost of 2 {{.*}} %V64I8 = sub - ; AVX512F: cost of 2 {{.*}} %V64I8 = sub - ; AVX512BW: cost of 1 {{.*}} %V64I8 = sub %V64I8 = sub <64 x i8> undef, undef ret i32 undef } -; CHECK-LABEL: 'or' define i32 @or(i32 %arg) { - ; CHECK: cost of 1 {{.*}} %I64 = or +; SSE-LABEL: 'or' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = or i64 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = or <2 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = or <4 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = or <8 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = or i32 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = or <4 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = or <8 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = or <16 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = or i16 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = or <8 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = or <16 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = or <32 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = or i8 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = or <16 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = or <32 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = or <64 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'or' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = or i64 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = or <2 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = or <4 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I64:%.*]] = or <8 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = or i32 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = or <4 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = or <8 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I32:%.*]] = or <16 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = or i16 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = or <8 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = or <16 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = or <32 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = or i8 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = or <16 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = or <32 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = or <64 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512F-LABEL: 'or' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = or i64 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = or <2 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = or <4 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = or <8 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = or i32 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = or <4 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = or <8 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = or <16 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = or i16 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = or <8 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = or <16 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = or <32 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = or i8 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = or <16 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = or <32 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = or <64 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512BW-LABEL: 'or' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = or i64 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = or <2 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = or <4 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = or <8 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = or i32 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = or <4 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = or <8 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = or <16 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = or i16 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = or <8 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = or <16 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I16:%.*]] = or <32 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = or i8 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = or <16 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = or <32 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V64I8:%.*]] = or <64 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512DQ-LABEL: 'or' +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = or i64 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = or <2 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = or <4 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = or <8 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = or i32 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = or <4 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = or <8 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = or <16 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = or i16 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = or <8 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = or <16 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = or <32 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = or i8 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = or <16 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = or <32 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = or <64 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'or' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = or i64 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = or <2 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = or <4 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = or <8 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = or i32 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = or <4 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = or <8 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = or <16 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = or i16 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = or <8 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = or <16 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = or <32 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = or i8 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = or <16 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = or <32 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = or <64 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'or' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = or i64 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = or <2 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = or <4 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = or <8 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = or i32 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = or <4 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = or <8 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = or <16 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = or i16 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = or <8 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = or <16 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = or <32 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = or i8 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = or <16 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = or <32 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = or <64 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %I64 = or i64 undef, undef - ; SSSE3: cost of 1 {{.*}} %V2I64 = or - ; SSE42: cost of 1 {{.*}} %V2I64 = or - ; SLM: cost of 1 {{.*}} %V2I64 = or - ; GLM: cost of 1 {{.*}} %V2I64 = or - ; AVX: cost of 1 {{.*}} %V2I64 = or - ; AVX2: cost of 1 {{.*}} %V2I64 = or - ; AVX512: cost of 1 {{.*}} %V2I64 = or %V2I64 = or <2 x i64> undef, undef - ; SSSE3: cost of 2 {{.*}} %V4I64 = or - ; SSE42: cost of 2 {{.*}} %V4I64 = or - ; SLM: cost of 2 {{.*}} %V4I64 = or - ; GLM: cost of 2 {{.*}} %V4I64 = or - ; AVX: cost of 1 {{.*}} %V4I64 = or - ; AVX2: cost of 1 {{.*}} %V4I64 = or - ; AVX512: cost of 1 {{.*}} %V4I64 = or %V4I64 = or <4 x i64> undef, undef - ; SSSE3: cost of 4 {{.*}} %V8I64 = or - ; SSE42: cost of 4 {{.*}} %V8I64 = or - ; SLM: cost of 4 {{.*}} %V8I64 = or - ; GLM: cost of 4 {{.*}} %V8I64 = or - ; AVX: cost of 2 {{.*}} %V8I64 = or - ; AVX2: cost of 2 {{.*}} %V8I64 = or - ; AVX512: cost of 1 {{.*}} %V8I64 = or %V8I64 = or <8 x i64> undef, undef - ; CHECK: cost of 1 {{.*}} %I32 = or %I32 = or i32 undef, undef - ; SSSE3: cost of 1 {{.*}} %V4I32 = or - ; SSE42: cost of 1 {{.*}} %V4I32 = or - ; SLM: cost of 1 {{.*}} %V4I32 = or - ; GLM: cost of 1 {{.*}} %V4I32 = or - ; AVX: cost of 1 {{.*}} %V4I32 = or - ; AVX2: cost of 1 {{.*}} %V4I32 = or - ; AVX512: cost of 1 {{.*}} %V4I32 = or %V4I32 = or <4 x i32> undef, undef - ; SSSE3: cost of 2 {{.*}} %V8I32 = or - ; SSE42: cost of 2 {{.*}} %V8I32 = or - ; SLM: cost of 2 {{.*}} %V8I32 = or - ; GLM: cost of 2 {{.*}} %V8I32 = or - ; AVX: cost of 1 {{.*}} %V8I32 = or - ; AVX2: cost of 1 {{.*}} %V8I32 = or - ; AVX512: cost of 1 {{.*}} %V8I32 = or %V8I32 = or <8 x i32> undef, undef - ; SSSE3: cost of 4 {{.*}} %V16I32 = or - ; SSE42: cost of 4 {{.*}} %V16I32 = or - ; SLM: cost of 4 {{.*}} %V16I32 = or - ; GLM: cost of 4 {{.*}} %V16I32 = or - ; AVX: cost of 2 {{.*}} %V16I32 = or - ; AVX2: cost of 2 {{.*}} %V16I32 = or - ; AVX512: cost of 1 {{.*}} %V16I32 = or %V16I32 = or <16 x i32> undef, undef - ; CHECK: cost of 1 {{.*}} %I16 = or %I16 = or i16 undef, undef - ; SSSE3: cost of 1 {{.*}} %V8I16 = or - ; SSE42: cost of 1 {{.*}} %V8I16 = or - ; SLM: cost of 1 {{.*}} %V8I16 = or - ; GLM: cost of 1 {{.*}} %V8I16 = or - ; AVX: cost of 1 {{.*}} %V8I16 = or - ; AVX2: cost of 1 {{.*}} %V8I16 = or - ; AVX512: cost of 1 {{.*}} %V8I16 = or %V8I16 = or <8 x i16> undef, undef - ; SSSE3: cost of 2 {{.*}} %V16I16 = or - ; SSE42: cost of 2 {{.*}} %V16I16 = or - ; SLM: cost of 2 {{.*}} %V16I16 = or - ; GLM: cost of 2 {{.*}} %V16I16 = or - ; AVX: cost of 1 {{.*}} %V16I16 = or - ; AVX2: cost of 1 {{.*}} %V16I16 = or - ; AVX512: cost of 1 {{.*}} %V16I16 = or %V16I16 = or <16 x i16> undef, undef - ; SSSE3: cost of 4 {{.*}} %V32I16 = or - ; SSE42: cost of 4 {{.*}} %V32I16 = or - ; SLM: cost of 4 {{.*}} %V32I16 = or - ; GLM: cost of 4 {{.*}} %V32I16 = or - ; AVX: cost of 2 {{.*}} %V32I16 = or - ; AVX2: cost of 2 {{.*}} %V32I16 = or - ; AVX512F: cost of 2 {{.*}} %V32I16 = or - ; AVX512BW: cost of 1 {{.*}} %V32I16 = or %V32I16 = or <32 x i16> undef, undef - ; CHECK: cost of 1 {{.*}} %I8 = or %I8 = or i8 undef, undef - ; SSSE3: cost of 1 {{.*}} %V16I8 = or - ; SSE42: cost of 1 {{.*}} %V16I8 = or - ; SLM: cost of 1 {{.*}} %V16I8 = or - ; GLM: cost of 1 {{.*}} %V16I8 = or - ; AVX: cost of 1 {{.*}} %V16I8 = or - ; AVX2: cost of 1 {{.*}} %V16I8 = or - ; AVX512: cost of 1 {{.*}} %V16I8 = or %V16I8 = or <16 x i8> undef, undef - ; SSSE3: cost of 2 {{.*}} %V32I8 = or - ; SSE42: cost of 2 {{.*}} %V32I8 = or - ; SLM: cost of 2 {{.*}} %V32I8 = or - ; GLM: cost of 2 {{.*}} %V32I8 = or - ; AVX: cost of 1 {{.*}} %V32I8 = or - ; AVX2: cost of 1 {{.*}} %V32I8 = or - ; AVX512: cost of 1 {{.*}} %V32I8 = or %V32I8 = or <32 x i8> undef, undef - ; SSSE3: cost of 4 {{.*}} %V64I8 = or - ; SSE42: cost of 4 {{.*}} %V64I8 = or - ; SLM: cost of 4 {{.*}} %V64I8 = or - ; GLM: cost of 4 {{.*}} %V64I8 = or - ; AVX: cost of 2 {{.*}} %V64I8 = or - ; AVX2: cost of 2 {{.*}} %V64I8 = or - ; AVX512F: cost of 2 {{.*}} %V64I8 = or - ; AVX512BW: cost of 1 {{.*}} %V64I8 = or %V64I8 = or <64 x i8> undef, undef ret i32 undef } -; CHECK-LABEL: 'xor' define i32 @xor(i32 %arg) { - ; CHECK: cost of 1 {{.*}} %I64 = xor +; SSE-LABEL: 'xor' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = xor i64 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = xor <2 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = xor <4 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = xor <8 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = xor i32 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = xor <4 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = xor <8 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = xor <16 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = xor i16 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = xor <8 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = xor <16 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = xor <32 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = xor i8 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = xor <16 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = xor <32 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = xor <64 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'xor' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = xor i64 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = xor <2 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = xor <4 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I64:%.*]] = xor <8 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = xor i32 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = xor <4 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = xor <8 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I32:%.*]] = xor <16 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = xor i16 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = xor <8 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = xor <16 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = xor <32 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = xor i8 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = xor <16 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = xor <32 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = xor <64 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512F-LABEL: 'xor' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = xor i64 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = xor <2 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = xor <4 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = xor <8 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = xor i32 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = xor <4 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = xor <8 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = xor <16 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = xor i16 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = xor <8 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = xor <16 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = xor <32 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = xor i8 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = xor <16 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = xor <32 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = xor <64 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512BW-LABEL: 'xor' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = xor i64 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = xor <2 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = xor <4 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = xor <8 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = xor i32 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = xor <4 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = xor <8 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = xor <16 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = xor i16 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = xor <8 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = xor <16 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I16:%.*]] = xor <32 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = xor i8 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = xor <16 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = xor <32 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V64I8:%.*]] = xor <64 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512DQ-LABEL: 'xor' +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = xor i64 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = xor <2 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = xor <4 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = xor <8 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = xor i32 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = xor <4 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = xor <8 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = xor <16 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = xor i16 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = xor <8 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = xor <16 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = xor <32 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = xor i8 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = xor <16 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = xor <32 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = xor <64 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'xor' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = xor i64 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = xor <2 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = xor <4 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = xor <8 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = xor i32 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = xor <4 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = xor <8 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = xor <16 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = xor i16 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = xor <8 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = xor <16 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = xor <32 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = xor i8 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = xor <16 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = xor <32 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = xor <64 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'xor' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = xor i64 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = xor <2 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = xor <4 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = xor <8 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = xor i32 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = xor <4 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = xor <8 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = xor <16 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = xor i16 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = xor <8 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = xor <16 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = xor <32 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = xor i8 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = xor <16 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = xor <32 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = xor <64 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %I64 = xor i64 undef, undef - ; SSSE3: cost of 1 {{.*}} %V2I64 = xor - ; SSE42: cost of 1 {{.*}} %V2I64 = xor - ; SLM: cost of 1 {{.*}} %V2I64 = xor - ; GLM: cost of 1 {{.*}} %V2I64 = xor - ; AVX: cost of 1 {{.*}} %V2I64 = xor - ; AVX2: cost of 1 {{.*}} %V2I64 = xor - ; AVX512: cost of 1 {{.*}} %V2I64 = xor %V2I64 = xor <2 x i64> undef, undef - ; SSSE3: cost of 2 {{.*}} %V4I64 = xor - ; SSE42: cost of 2 {{.*}} %V4I64 = xor - ; SLM: cost of 2 {{.*}} %V4I64 = xor - ; GLM: cost of 2 {{.*}} %V4I64 = xor - ; AVX: cost of 1 {{.*}} %V4I64 = xor - ; AVX2: cost of 1 {{.*}} %V4I64 = xor - ; AVX512: cost of 1 {{.*}} %V4I64 = xor %V4I64 = xor <4 x i64> undef, undef - ; SSSE3: cost of 4 {{.*}} %V8I64 = xor - ; SSE42: cost of 4 {{.*}} %V8I64 = xor - ; SLM: cost of 4 {{.*}} %V8I64 = xor - ; GLM: cost of 4 {{.*}} %V8I64 = xor - ; AVX: cost of 2 {{.*}} %V8I64 = xor - ; AVX2: cost of 2 {{.*}} %V8I64 = xor - ; AVX512: cost of 1 {{.*}} %V8I64 = xor %V8I64 = xor <8 x i64> undef, undef - ; CHECK: cost of 1 {{.*}} %I32 = xor %I32 = xor i32 undef, undef - ; SSSE3: cost of 1 {{.*}} %V4I32 = xor - ; SSE42: cost of 1 {{.*}} %V4I32 = xor - ; SLM: cost of 1 {{.*}} %V4I32 = xor - ; GLM: cost of 1 {{.*}} %V4I32 = xor - ; AVX: cost of 1 {{.*}} %V4I32 = xor - ; AVX2: cost of 1 {{.*}} %V4I32 = xor - ; AVX512: cost of 1 {{.*}} %V4I32 = xor %V4I32 = xor <4 x i32> undef, undef - ; SSSE3: cost of 2 {{.*}} %V8I32 = xor - ; SSE42: cost of 2 {{.*}} %V8I32 = xor - ; SLM: cost of 2 {{.*}} %V8I32 = xor - ; GLM: cost of 2 {{.*}} %V8I32 = xor - ; AVX: cost of 1 {{.*}} %V8I32 = xor - ; AVX2: cost of 1 {{.*}} %V8I32 = xor - ; AVX512: cost of 1 {{.*}} %V8I32 = xor %V8I32 = xor <8 x i32> undef, undef - ; SSSE3: cost of 4 {{.*}} %V16I32 = xor - ; SSE42: cost of 4 {{.*}} %V16I32 = xor - ; SLM: cost of 4 {{.*}} %V16I32 = xor - ; GLM: cost of 4 {{.*}} %V16I32 = xor - ; AVX: cost of 2 {{.*}} %V16I32 = xor - ; AVX2: cost of 2 {{.*}} %V16I32 = xor - ; AVX512: cost of 1 {{.*}} %V16I32 = xor %V16I32 = xor <16 x i32> undef, undef - ; CHECK: cost of 1 {{.*}} %I16 = xor %I16 = xor i16 undef, undef - ; SSSE3: cost of 1 {{.*}} %V8I16 = xor - ; SSE42: cost of 1 {{.*}} %V8I16 = xor - ; SLM: cost of 1 {{.*}} %V8I16 = xor - ; GLM: cost of 1 {{.*}} %V8I16 = xor - ; AVX: cost of 1 {{.*}} %V8I16 = xor - ; AVX2: cost of 1 {{.*}} %V8I16 = xor - ; AVX512: cost of 1 {{.*}} %V8I16 = xor %V8I16 = xor <8 x i16> undef, undef - ; SSSE3: cost of 2 {{.*}} %V16I16 = xor - ; SSE42: cost of 2 {{.*}} %V16I16 = xor - ; SLM: cost of 2 {{.*}} %V16I16 = xor - ; GLM: cost of 2 {{.*}} %V16I16 = xor - ; AVX: cost of 1 {{.*}} %V16I16 = xor - ; AVX2: cost of 1 {{.*}} %V16I16 = xor - ; AVX512: cost of 1 {{.*}} %V16I16 = xor %V16I16 = xor <16 x i16> undef, undef - ; SSSE3: cost of 4 {{.*}} %V32I16 = xor - ; SSE42: cost of 4 {{.*}} %V32I16 = xor - ; SLM: cost of 4 {{.*}} %V32I16 = xor - ; GLM: cost of 4 {{.*}} %V32I16 = xor - ; AVX: cost of 2 {{.*}} %V32I16 = xor - ; AVX2: cost of 2 {{.*}} %V32I16 = xor - ; AVX512F: cost of 2 {{.*}} %V32I16 = xor - ; AVX512BW: cost of 1 {{.*}} %V32I16 = xor %V32I16 = xor <32 x i16> undef, undef - ; CHECK: cost of 1 {{.*}} %I8 = xor %I8 = xor i8 undef, undef - ; SSSE3: cost of 1 {{.*}} %V16I8 = xor - ; SSE42: cost of 1 {{.*}} %V16I8 = xor - ; SLM: cost of 1 {{.*}} %V16I8 = xor - ; GLM: cost of 1 {{.*}} %V16I8 = xor - ; AVX: cost of 1 {{.*}} %V16I8 = xor - ; AVX2: cost of 1 {{.*}} %V16I8 = xor - ; AVX512: cost of 1 {{.*}} %V16I8 = xor %V16I8 = xor <16 x i8> undef, undef - ; SSSE3: cost of 2 {{.*}} %V32I8 = xor - ; SSE42: cost of 2 {{.*}} %V32I8 = xor - ; SLM: cost of 2 {{.*}} %V32I8 = xor - ; GLM: cost of 2 {{.*}} %V32I8 = xor - ; AVX: cost of 1 {{.*}} %V32I8 = xor - ; AVX2: cost of 1 {{.*}} %V32I8 = xor - ; AVX512: cost of 1 {{.*}} %V32I8 = xor %V32I8 = xor <32 x i8> undef, undef - ; SSSE3: cost of 4 {{.*}} %V64I8 = xor - ; SSE42: cost of 4 {{.*}} %V64I8 = xor - ; SLM: cost of 4 {{.*}} %V64I8 = xor - ; GLM: cost of 4 {{.*}} %V64I8 = xor - ; AVX: cost of 2 {{.*}} %V64I8 = xor - ; AVX2: cost of 2 {{.*}} %V64I8 = xor - ; AVX512F: cost of 2 {{.*}} %V64I8 = xor - ; AVX512BW: cost of 1 {{.*}} %V64I8 = xor %V64I8 = xor <64 x i8> undef, undef ret i32 undef } -; CHECK-LABEL: 'and' define i32 @and(i32 %arg) { - ; CHECK: cost of 1 {{.*}} %I64 = and +; SSE-LABEL: 'and' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = and i64 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = and <2 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = and <4 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = and <8 x i64> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = and i32 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = and <4 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = and <8 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = and <16 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = and i16 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = and <8 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = and <16 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = and <32 x i16> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = and i8 undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = and <16 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = and <32 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = and <64 x i8> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX-LABEL: 'and' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = and i64 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = and <2 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = and <4 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I64:%.*]] = and <8 x i64> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = and i32 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = and <4 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = and <8 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I32:%.*]] = and <16 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = and i16 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = and <8 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = and <16 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = and <32 x i16> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = and i8 undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = and <16 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = and <32 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = and <64 x i8> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512F-LABEL: 'and' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = and i64 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = and <2 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = and <4 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = and <8 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = and i32 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = and <4 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = and <8 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = and <16 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = and i16 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = and <8 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = and <16 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = and <32 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = and i8 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = and <16 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = and <32 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = and <64 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512BW-LABEL: 'and' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = and i64 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = and <2 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = and <4 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = and <8 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = and i32 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = and <4 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = and <8 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = and <16 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = and i16 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = and <8 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = and <16 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I16:%.*]] = and <32 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = and i8 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = and <16 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = and <32 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V64I8:%.*]] = and <64 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512DQ-LABEL: 'and' +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = and i64 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = and <2 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = and <4 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = and <8 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = and i32 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = and <4 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = and <8 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = and <16 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = and i16 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = and <8 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = and <16 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = and <32 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = and i8 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = and <16 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I8:%.*]] = and <32 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V64I8:%.*]] = and <64 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'and' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = and i64 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = and <2 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = and <4 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = and <8 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = and i32 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = and <4 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = and <8 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = and <16 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = and i16 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = and <8 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = and <16 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = and <32 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = and i8 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = and <16 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = and <32 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = and <64 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'and' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = and i64 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = and <2 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I64:%.*]] = and <4 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I64:%.*]] = and <8 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = and i32 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = and <4 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = and <8 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = and <16 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = and i16 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = and <8 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = and <16 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = and <32 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = and i8 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I8:%.*]] = and <16 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I8:%.*]] = and <32 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V64I8:%.*]] = and <64 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %I64 = and i64 undef, undef - ; SSSE3: cost of 1 {{.*}} %V2I64 = and - ; SSE42: cost of 1 {{.*}} %V2I64 = and - ; SLM: cost of 1 {{.*}} %V2I64 = and - ; GLM: cost of 1 {{.*}} %V2I64 = and - ; AVX: cost of 1 {{.*}} %V2I64 = and - ; AVX2: cost of 1 {{.*}} %V2I64 = and - ; AVX512: cost of 1 {{.*}} %V2I64 = and %V2I64 = and <2 x i64> undef, undef - ; SSSE3: cost of 2 {{.*}} %V4I64 = and - ; SSE42: cost of 2 {{.*}} %V4I64 = and - ; SLM: cost of 2 {{.*}} %V4I64 = and - ; GLM: cost of 2 {{.*}} %V4I64 = and - ; AVX: cost of 1 {{.*}} %V4I64 = and - ; AVX2: cost of 1 {{.*}} %V4I64 = and - ; AVX512: cost of 1 {{.*}} %V4I64 = and %V4I64 = and <4 x i64> undef, undef - ; SSSE3: cost of 4 {{.*}} %V8I64 = and - ; SSE42: cost of 4 {{.*}} %V8I64 = and - ; SLM: cost of 4 {{.*}} %V8I64 = and - ; GLM: cost of 4 {{.*}} %V8I64 = and - ; AVX: cost of 2 {{.*}} %V8I64 = and - ; AVX2: cost of 2 {{.*}} %V8I64 = and - ; AVX512: cost of 1 {{.*}} %V8I64 = and %V8I64 = and <8 x i64> undef, undef - ; CHECK: cost of 1 {{.*}} %I32 = and %I32 = and i32 undef, undef - ; SSSE3: cost of 1 {{.*}} %V4I32 = and - ; SSE42: cost of 1 {{.*}} %V4I32 = and - ; SLM: cost of 1 {{.*}} %V4I32 = and - ; GLM: cost of 1 {{.*}} %V4I32 = and - ; AVX: cost of 1 {{.*}} %V4I32 = and - ; AVX2: cost of 1 {{.*}} %V4I32 = and - ; AVX512: cost of 1 {{.*}} %V4I32 = and %V4I32 = and <4 x i32> undef, undef - ; SSSE3: cost of 2 {{.*}} %V8I32 = and - ; SSE42: cost of 2 {{.*}} %V8I32 = and - ; SLM: cost of 2 {{.*}} %V8I32 = and - ; GLM: cost of 2 {{.*}} %V8I32 = and - ; AVX: cost of 1 {{.*}} %V8I32 = and - ; AVX2: cost of 1 {{.*}} %V8I32 = and - ; AVX512: cost of 1 {{.*}} %V8I32 = and %V8I32 = and <8 x i32> undef, undef - ; SSSE3: cost of 4 {{.*}} %V16I32 = and - ; SSE42: cost of 4 {{.*}} %V16I32 = and - ; SLM: cost of 4 {{.*}} %V16I32 = and - ; GLM: cost of 4 {{.*}} %V16I32 = and - ; AVX: cost of 2 {{.*}} %V16I32 = and - ; AVX2: cost of 2 {{.*}} %V16I32 = and - ; AVX512: cost of 1 {{.*}} %V16I32 = and %V16I32 = and <16 x i32> undef, undef - ; CHECK: cost of 1 {{.*}} %I16 = and %I16 = and i16 undef, undef - ; SSSE3: cost of 1 {{.*}} %V8I16 = and - ; SSE42: cost of 1 {{.*}} %V8I16 = and - ; SLM: cost of 1 {{.*}} %V8I16 = and - ; GLM: cost of 1 {{.*}} %V8I16 = and - ; AVX: cost of 1 {{.*}} %V8I16 = and - ; AVX2: cost of 1 {{.*}} %V8I16 = and - ; AVX512: cost of 1 {{.*}} %V8I16 = and %V8I16 = and <8 x i16> undef, undef - ; SSSE3: cost of 2 {{.*}} %V16I16 = and - ; SSE42: cost of 2 {{.*}} %V16I16 = and - ; SLM: cost of 2 {{.*}} %V16I16 = and - ; GLM: cost of 2 {{.*}} %V16I16 = and - ; AVX: cost of 1 {{.*}} %V16I16 = and - ; AVX2: cost of 1 {{.*}} %V16I16 = and - ; AVX512: cost of 1 {{.*}} %V16I16 = and %V16I16 = and <16 x i16> undef, undef - ; SSSE3: cost of 4 {{.*}} %V32I16 = and - ; SSE42: cost of 4 {{.*}} %V32I16 = and - ; SLM: cost of 4 {{.*}} %V32I16 = and - ; GLM: cost of 4 {{.*}} %V32I16 = and - ; AVX: cost of 2 {{.*}} %V32I16 = and - ; AVX2: cost of 2 {{.*}} %V32I16 = and - ; AVX512F: cost of 2 {{.*}} %V32I16 = and - ; AVX512BW: cost of 1 {{.*}} %V32I16 = and %V32I16 = and <32 x i16> undef, undef - ; CHECK: cost of 1 {{.*}} %I8 = and %I8 = and i8 undef, undef - ; SSSE3: cost of 1 {{.*}} %V16I8 = and - ; SSE42: cost of 1 {{.*}} %V16I8 = and - ; SLM: cost of 1 {{.*}} %V16I8 = and - ; GLM: cost of 1 {{.*}} %V16I8 = and - ; AVX: cost of 1 {{.*}} %V16I8 = and - ; AVX2: cost of 1 {{.*}} %V16I8 = and - ; AVX512: cost of 1 {{.*}} %V16I8 = and %V16I8 = and <16 x i8> undef, undef - ; SSSE3: cost of 2 {{.*}} %V32I8 = and - ; SSE42: cost of 2 {{.*}} %V32I8 = and - ; SLM: cost of 2 {{.*}} %V32I8 = and - ; GLM: cost of 2 {{.*}} %V32I8 = and - ; AVX: cost of 1 {{.*}} %V32I8 = and - ; AVX2: cost of 1 {{.*}} %V32I8 = and - ; AVX512: cost of 1 {{.*}} %V32I8 = and %V32I8 = and <32 x i8> undef, undef - ; SSSE3: cost of 4 {{.*}} %V64I8 = and - ; SSE42: cost of 4 {{.*}} %V64I8 = and - ; SLM: cost of 4 {{.*}} %V64I8 = and - ; GLM: cost of 4 {{.*}} %V64I8 = and - ; AVX: cost of 2 {{.*}} %V64I8 = and - ; AVX2: cost of 2 {{.*}} %V64I8 = and - ; AVX512F: cost of 2 {{.*}} %V64I8 = and - ; AVX512BW: cost of 1 {{.*}} %V64I8 = and %V64I8 = and <64 x i8> undef, undef ret i32 undef } -; CHECK-LABEL: 'mul' define i32 @mul(i32 %arg) { - ; CHECK: cost of 1 {{.*}} %I64 = mul +; SSSE3-LABEL: 'mul' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 16 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 24 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 24 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 48 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SSE42-LABEL: 'mul' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 16 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 24 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 48 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX1-LABEL: 'mul' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 18 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 36 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 26 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 52 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX2-LABEL: 'mul' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 17 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 34 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512F-LABEL: 'mul' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 5 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 13 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 26 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512BW-LABEL: 'mul' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 11 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; AVX512DQ-LABEL: 'mul' +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 5 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 13 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 26 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; SLM-LABEL: 'mul' +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 17 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 34 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 68 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 11 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 22 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 44 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 14 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 28 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 56 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; +; GLM-LABEL: 'mul' +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I64:%.*]] = mul i64 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V2I64:%.*]] = mul <2 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 16 for instruction: [[V4I64:%.*]] = mul <4 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 32 for instruction: [[V8I64:%.*]] = mul <8 x i64> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I32:%.*]] = mul i32 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V4I32:%.*]] = mul <4 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V8I32:%.*]] = mul <8 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[V16I32:%.*]] = mul <16 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I16:%.*]] = mul i16 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[V8I16:%.*]] = mul <8 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 2 for instruction: [[V16I16:%.*]] = mul <16 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 4 for instruction: [[V32I16:%.*]] = mul <32 x i16> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[I8:%.*]] = mul i8 undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 12 for instruction: [[V16I8:%.*]] = mul <16 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 24 for instruction: [[V32I8:%.*]] = mul <32 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 48 for instruction: [[V64I8:%.*]] = mul <64 x i8> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef +; %I64 = mul i64 undef, undef - ; SSSE3: cost of 8 {{.*}} %V2I64 = mul - ; SSE42: cost of 8 {{.*}} %V2I64 = mul - ; SLM: cost of 17 {{.*}} %V2I64 = mul - ; GLM: cost of 8 {{.*}} %V2I64 = mul - ; AVX: cost of 8 {{.*}} %V2I64 = mul - ; AVX2: cost of 8 {{.*}} %V2I64 = mul - ; AVX512F: cost of 8 {{.*}} %V2I64 = mul - ; AVX512BW: cost of 8 {{.*}} %V2I64 = mul - ; AVX512DQ: cost of 1 {{.*}} %V2I64 = mul %V2I64 = mul <2 x i64> undef, undef - ; SSSE3: cost of 16 {{.*}} %V4I64 = mul - ; SSE42: cost of 16 {{.*}} %V4I64 = mul - ; SLM: cost of 34 {{.*}} %V4I64 = mul - ; GLM: cost of 16 {{.*}} %V4I64 = mul - ; AVX: cost of 18 {{.*}} %V4I64 = mul - ; AVX2: cost of 8 {{.*}} %V4I64 = mul - ; AVX512F: cost of 8 {{.*}} %V4I64 = mul - ; AVX512BW: cost of 8 {{.*}} %V4I64 = mul - ; AVX512DQ: cost of 1 {{.*}} %V4I64 = mul %V4I64 = mul <4 x i64> undef, undef - ; SSSE3: cost of 32 {{.*}} %V8I64 = mul - ; SSE42: cost of 32 {{.*}} %V8I64 = mul - ; SLM: cost of 68 {{.*}} %V8I64 = mul - ; GLM: cost of 32 {{.*}} %V8I64 = mul - ; AVX: cost of 36 {{.*}} %V8I64 = mul - ; AVX2: cost of 16 {{.*}} %V8I64 = mul - ; AVX512F: cost of 8 {{.*}} %V8I64 = mul - ; AVX512BW: cost of 8 {{.*}} %V8I64 = mul - ; AVX512DQ: cost of 1 {{.*}} %V8I64 = mul %V8I64 = mul <8 x i64> undef, undef - ; CHECK: cost of 1 {{.*}} %I32 = mul %I32 = mul i32 undef, undef - ; SSSE3: cost of 6 {{.*}} %V4I32 = mul - ; SSE42: cost of 2 {{.*}} %V4I32 = mul - ; SLM: cost of 11 {{.*}} %V4I32 = mul - ; GLM: cost of 2 {{.*}} %V4I32 = mul - ; AVX: cost of 2 {{.*}} %V4I32 = mul - ; AVX2: cost of 2 {{.*}} %V4I32 = mul - ; AVX512: cost of 1 {{.*}} %V4I32 = mul %V4I32 = mul <4 x i32> undef, undef - ; SSSE3: cost of 12 {{.*}} %V8I32 = mul - ; SSE42: cost of 4 {{.*}} %V8I32 = mul - ; SLM: cost of 22 {{.*}} %V8I32 = mul - ; GLM: cost of 4 {{.*}} %V8I32 = mul - ; AVX: cost of 4 {{.*}} %V8I32 = mul - ; AVX2: cost of 2 {{.*}} %V8I32 = mul - ; AVX512: cost of 1 {{.*}} %V8I32 = mul %V8I32 = mul <8 x i32> undef, undef - ; SSSE3: cost of 24 {{.*}} %V16I32 = mul - ; SSE42: cost of 8 {{.*}} %V16I32 = mul - ; SLM: cost of 44 {{.*}} %V16I32 = mul - ; GLM: cost of 8 {{.*}} %V16I32 = mul - ; AVX: cost of 8 {{.*}} %V16I32 = mul - ; AVX2: cost of 4 {{.*}} %V16I32 = mul - ; AVX512: cost of 1 {{.*}} %V16I32 = mul %V16I32 = mul <16 x i32> undef, undef - ; CHECK: cost of 1 {{.*}} %I16 = mul %I16 = mul i16 undef, undef - ; SSSE3: cost of 1 {{.*}} %V8I16 = mul - ; SSE42: cost of 1 {{.*}} %V8I16 = mul - ; SLM: cost of 2 {{.*}} %V8I16 = mul - ; GLM: cost of 1 {{.*}} %V8I16 = mul - ; AVX: cost of 1 {{.*}} %V8I16 = mul - ; AVX2: cost of 1 {{.*}} %V8I16 = mul - ; AVX512: cost of 1 {{.*}} %V8I16 = mul %V8I16 = mul <8 x i16> undef, undef - ; SSSE3: cost of 2 {{.*}} %V16I16 = mul - ; SSE42: cost of 2 {{.*}} %V16I16 = mul - ; SLM: cost of 4 {{.*}} %V16I16 = mul - ; GLM: cost of 2 {{.*}} %V16I16 = mul - ; AVX: cost of 4 {{.*}} %V16I16 = mul - ; AVX2: cost of 1 {{.*}} %V16I16 = mul - ; AVX512: cost of 1 {{.*}} %V16I16 = mul %V16I16 = mul <16 x i16> undef, undef - ; SSSE3: cost of 4 {{.*}} %V32I16 = mul - ; SSE42: cost of 4 {{.*}} %V32I16 = mul - ; SLM: cost of 8 {{.*}} %V32I16 = mul - ; GLM: cost of 4 {{.*}} %V32I16 = mul - ; AVX: cost of 8 {{.*}} %V32I16 = mul - ; AVX2: cost of 2 {{.*}} %V32I16 = mul - ; AVX512F: cost of 2 {{.*}} %V32I16 = mul - ; AVX512BW: cost of 1 {{.*}} %V32I16 = mul %V32I16 = mul <32 x i16> undef, undef - ; CHECK: cost of 1 {{.*}} %I8 = mul %I8 = mul i8 undef, undef - ; SSSE3: cost of 12 {{.*}} %V16I8 = mul - ; SSE42: cost of 12 {{.*}} %V16I8 = mul - ; SLM: cost of 14 {{.*}} %V16I8 = mul - ; GLM: cost of 12 {{.*}} %V16I8 = mul - ; AVX: cost of 12 {{.*}} %V16I8 = mul - ; AVX2: cost of 7 {{.*}} %V16I8 = mul - ; AVX512F: cost of 5 {{.*}} %V16I8 = mul - ; AVX512BW: cost of 4 {{.*}} %V16I8 = mul %V16I8 = mul <16 x i8> undef, undef - ; SSSE3: cost of 24 {{.*}} %V32I8 = mul - ; SSE42: cost of 24 {{.*}} %V32I8 = mul - ; SLM: cost of 28 {{.*}} %V32I8 = mul - ; GLM: cost of 24 {{.*}} %V32I8 = mul - ; AVX: cost of 26 {{.*}} %V32I8 = mul - ; AVX2: cost of 17 {{.*}} %V32I8 = mul - ; AVX512F: cost of 13 {{.*}} %V32I8 = mul - ; AVX512BW: cost of 4 {{.*}} %V32I8 = mul %V32I8 = mul <32 x i8> undef, undef - ; SSSE3: cost of 48 {{.*}} %V64I8 = mul - ; SSE42: cost of 48 {{.*}} %V64I8 = mul - ; SLM: cost of 56 {{.*}} %V64I8 = mul - ; GLM: cost of 48 {{.*}} %V64I8 = mul - ; AVX: cost of 52 {{.*}} %V64I8 = mul - ; AVX2: cost of 34 {{.*}} %V64I8 = mul - ; AVX512F: cost of 26 {{.*}} %V64I8 = mul - ; AVX512BW: cost of 11 {{.*}} %V64I8 = mul %V64I8 = mul <64 x i8> undef, undef ret i32 undef } -; CHECK-LABEL: 'mul_2i32' +; A <2 x i32> gets expanded to a <2 x i64> vector. +; A <2 x i64> vector multiply is implemented using +; 3 PMULUDQ and 2 PADDS and 4 shifts. define void @mul_2i32() { - ; A <2 x i32> gets expanded to a <2 x i64> vector. - ; A <2 x i64> vector multiply is implemented using - ; 3 PMULUDQ and 2 PADDS and 4 shifts. - ; SSSE3: cost of 8 {{.*}} %A0 = mul - ; SSE42: cost of 8 {{.*}} %A0 = mul - ; SLM: cost of 17 {{.*}} %A0 = mul - ; GLM: cost of 8 {{.*}} %A0 = mul - ; AVX: cost of 8 {{.*}} %A0 = mul - ; AVX2: cost of 8 {{.*}} %A0 = mul - ; AVX512F: cost of 8 {{.*}} %A0 = mul - ; AVX512BW: cost of 8 {{.*}} %A0 = mul - ; AVX512DQ: cost of 1 {{.*}} %A0 = mul +; SSE-LABEL: 'mul_2i32' +; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[A0:%.*]] = mul <2 x i32> undef, undef +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX-LABEL: 'mul_2i32' +; AVX-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[A0:%.*]] = mul <2 x i32> undef, undef +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512F-LABEL: 'mul_2i32' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[A0:%.*]] = mul <2 x i32> undef, undef +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512BW-LABEL: 'mul_2i32' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[A0:%.*]] = mul <2 x i32> undef, undef +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512DQ-LABEL: 'mul_2i32' +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: [[A0:%.*]] = mul <2 x i32> undef, undef +; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SLM-LABEL: 'mul_2i32' +; SLM-NEXT: Cost Model: Found an estimated cost of 17 for instruction: [[A0:%.*]] = mul <2 x i32> undef, undef +; SLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; GLM-LABEL: 'mul_2i32' +; GLM-NEXT: Cost Model: Found an estimated cost of 8 for instruction: [[A0:%.*]] = mul <2 x i32> undef, undef +; GLM-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %A0 = mul <2 x i32> undef, undef ret void Index: utils/UpdateTestChecks/common.py =================================================================== --- utils/UpdateTestChecks/common.py +++ utils/UpdateTestChecks/common.py @@ -53,6 +53,11 @@ r'(\s+)?[^)]*[^{]*\{\n(?P.*?)^\}$', flags=(re.M | re.S)) +ANALYZE_FUNCTION_RE = re.compile( + r'^\s*\'(?P[\w\s-]+?)\'\s+for\s+function\s+\'(?P[\w-]+?)\':' + r'\s*\n(?P.*)$', + flags=(re.X | re.S)) + IR_FUNCTION_RE = re.compile('^\s*define\s+(?:internal\s+)?[^@]*@(\w+)\s*\(') TRIPLE_IR_RE = re.compile(r'^\s*target\s+triple\s*=\s*"([^"]+)"$') TRIPLE_ARG_RE = re.compile(r'-mtriple[= ]([^ ]+)') @@ -82,6 +87,10 @@ continue func = m.group('func') scrubbed_body = scrubber(m.group('body'), *scrubber_args) + if m.groupdict().has_key('analysis'): + analysis = m.group('analysis') + if analysis.lower() != 'cost model analysis': + print('WARNING: Unsupported analysis mode: %r!' % (analysis,), file=sys.stderr) if func.startswith('stress'): # We only use the last line of the function body for stress tests. scrubbed_body = '\n'.join(scrubbed_body.splitlines()[-1:]) @@ -227,3 +236,7 @@ # Label format is based on IR string. check_label_format = '{} %s-LABEL: @%s('.format(comment_marker) add_checks(output_lines, comment_marker, prefix_list, func_dict, func_name, check_label_format, False) + +def add_analyze_checks(output_lines, comment_marker, prefix_list, func_dict, func_name): + check_label_format = '{} %s-LABEL: \'%s\''.format(comment_marker) + add_checks(output_lines, comment_marker, prefix_list, func_dict, func_name, check_label_format, False) Index: utils/update_analyze_test_checks.py =================================================================== --- utils/update_analyze_test_checks.py +++ utils/update_analyze_test_checks.py @@ -0,0 +1,196 @@ +#!/usr/bin/env python2.7 + +"""A script to generate FileCheck statements for 'opt' analysis tests. + +This script is a utility to update LLVM opt analysis test cases with new +FileCheck patterns. It can either update all of the tests in the file or +a single test function. + +Example usage: +$ update_analyze_test_checks.py --opt=../bin/opt test/foo.ll + +Workflow: +1. Make a compiler patch that requires updating some number of FileCheck lines + in regression test files. +2. Save the patch and revert it from your local work area. +3. Update the RUN-lines in the affected regression tests to look canonical. + Example: "; RUN: opt < %s -analyze -cost-model -S | FileCheck %s" +4. Refresh the FileCheck lines for either the entire file or select functions by + running this script. +5. Commit the fresh baseline of checks. +6. Apply your patch from step 1 and rebuild your local binaries. +7. Re-run this script on affected regression tests. +8. Check the diffs to ensure the script has done something reasonable. +9. Submit a patch including the regression test diffs for review. + +A common pattern is to have the script insert complete checking of every +instruction. Then, edit it down to only check the relevant instructions. +The script is designed to make adding checks to a test case fast, it is *not* +designed to be authoratitive about what constitutes a good test! +""" + +import argparse +import itertools +import os # Used to advertise this file's name ("autogenerated_note"). +import string +import subprocess +import sys +import tempfile +import re + +from UpdateTestChecks import common + +ADVERT = '; NOTE: Assertions have been autogenerated by ' + +# RegEx: this is where the magic happens. + +IR_FUNCTION_RE = re.compile('^\s*define\s+(?:internal\s+)?[^@]*@([\w-]+)\s*\(') + + + + + +def main(): + from argparse import RawTextHelpFormatter + parser = argparse.ArgumentParser(description=__doc__, formatter_class=RawTextHelpFormatter) + parser.add_argument('-v', '--verbose', action='store_true', + help='Show verbose output') + parser.add_argument('--opt-binary', default='opt', + help='The opt binary used to generate the test case') + parser.add_argument( + '--function', help='The function in the test file to update') + parser.add_argument('tests', nargs='+') + args = parser.parse_args() + + autogenerated_note = (ADVERT + 'utils/' + os.path.basename(__file__)) + + opt_basename = os.path.basename(args.opt_binary) + if (opt_basename != "opt"): + print >>sys.stderr, 'ERROR: Unexpected opt name: ' + opt_basename + sys.exit(1) + + for test in args.tests: + if args.verbose: + print >>sys.stderr, 'Scanning for RUN lines in test file: %s' % (test,) + with open(test) as f: + input_lines = [l.rstrip() for l in f] + + raw_lines = [m.group(1) + for m in [common.RUN_LINE_RE.match(l) for l in input_lines] if m] + run_lines = [raw_lines[0]] if len(raw_lines) > 0 else [] + for l in raw_lines[1:]: + if run_lines[-1].endswith("\\"): + run_lines[-1] = run_lines[-1].rstrip("\\") + " " + l + else: + run_lines.append(l) + + if args.verbose: + print >>sys.stderr, 'Found %d RUN lines:' % (len(run_lines),) + for l in run_lines: + print >>sys.stderr, ' RUN: ' + l + + prefix_list = [] + for l in run_lines: + (tool_cmd, filecheck_cmd) = tuple([cmd.strip() for cmd in l.split('|', 1)]) + + if not tool_cmd.startswith(opt_basename + ' '): + print >>sys.stderr, 'WARNING: Skipping non-%s RUN line: %s' % (opt_basename, l) + continue + + if not filecheck_cmd.startswith('FileCheck '): + print >>sys.stderr, 'WARNING: Skipping non-FileChecked RUN line: ' + l + continue + + tool_cmd_args = tool_cmd[len(opt_basename):].strip() + tool_cmd_args = tool_cmd_args.replace('< %s', '').replace('%s', '').strip() + + check_prefixes = [item for m in common.CHECK_PREFIX_RE.finditer(filecheck_cmd) + for item in m.group(1).split(',')] + if not check_prefixes: + check_prefixes = ['CHECK'] + + # FIXME: We should use multiple check prefixes to common check lines. For + # now, we just ignore all but the last. + prefix_list.append((check_prefixes, tool_cmd_args)) + + func_dict = {} + for prefixes, _ in prefix_list: + for prefix in prefixes: + func_dict.update({prefix: dict()}) + for prefixes, opt_args in prefix_list: + if args.verbose: + print >>sys.stderr, 'Extracted opt cmd: ' + opt_basename + ' ' + opt_args + print >>sys.stderr, 'Extracted FileCheck prefixes: ' + str(prefixes) + + raw_tool_outputs = common.invoke_tool(args.opt_binary, opt_args, test) + + if " -analyze" in opt_args: + # Split analysis outputs by "Printing analysis " declarations. + for raw_tool_output in re.split(r'Printing analysis ', raw_tool_outputs): + common.build_function_body_dictionary( + common.ANALYZE_FUNCTION_RE, common.scrub_body, [], + raw_tool_output, prefixes, func_dict, args.verbose) + else: + common.build_function_body_dictionary( + common.OPT_FUNCTION_RE, common.scrub_body, [], + raw_tool_outputs, prefixes, func_dict, args.verbose) + + is_in_function = False + is_in_function_start = False + prefix_set = set([prefix for prefixes, _ in prefix_list for prefix in prefixes]) + if args.verbose: + print >>sys.stderr, 'Rewriting FileCheck prefixes: %s' % (prefix_set,) + output_lines = [] + output_lines.append(autogenerated_note) + + for input_line in input_lines: + if is_in_function_start: + if input_line == '': + continue + if input_line.lstrip().startswith(';'): + m = common.CHECK_RE.match(input_line) + if not m or m.group(1) not in prefix_set: + output_lines.append(input_line) + continue + + # Print out the various check lines here. + common.add_analyze_checks(output_lines, ';', prefix_list, func_dict, func_name) + is_in_function_start = False + + if is_in_function: + if common.should_add_line_to_output(input_line, prefix_set): + # This input line of the function body will go as-is into the output. + # Except make leading whitespace uniform: 2 spaces. + input_line = common.SCRUB_LEADING_WHITESPACE_RE.sub(r' ', input_line) + output_lines.append(input_line) + else: + continue + if input_line.strip() == '}': + is_in_function = False + continue + + # Discard any previous script advertising. + if input_line.startswith(ADVERT): + continue + + # If it's outside a function, it just gets copied to the output. + output_lines.append(input_line) + + m = IR_FUNCTION_RE.match(input_line) + if not m: + continue + func_name = m.group(1) + if args.function is not None and func_name != args.function: + # When filtering on a specific function, skip all others. + continue + is_in_function = is_in_function_start = True + + if args.verbose: + print>>sys.stderr, 'Writing %d lines to %s...' % (len(output_lines), test) + + with open(test, 'wb') as f: + f.writelines([l + '\n' for l in output_lines]) + + +if __name__ == '__main__': + main()