Index: lib/Target/AMDGPU/SOPInstructions.td =================================================================== --- lib/Target/AMDGPU/SOPInstructions.td +++ lib/Target/AMDGPU/SOPInstructions.td @@ -255,6 +255,17 @@ } } +let SubtargetPredicate = isGFX9 in { + let hasSideEffects = 1, Defs = [EXEC, SCC], Uses = [EXEC] in { + def S_ANDN1_SAVEEXEC_B64 : SOP1_64<"s_andn1_saveexec_b64">; + def S_ORN1_SAVEEXEC_B64 : SOP1_64<"s_orn1_saveexec_b64">; + def S_ANDN1_WREXEC_B64 : SOP1_64<"s_andn1_wrexec_b64">; + def S_ANDN2_WREXEC_B64 : SOP1_64<"s_andn2_wrexec_b64">; + } // End hasSideEffects = 1, Defs = [EXEC, SCC], Uses = [EXEC] + + def S_BITREPLICATE_B64_B32 : SOP1_64_32<"s_bitreplicate_b64_b32">; +} // End SubtargetPredicate = isGFX9 + //===----------------------------------------------------------------------===// // SOP2 Instructions //===----------------------------------------------------------------------===// @@ -1314,3 +1325,13 @@ //def S_GETREG_REGRD_B32_vi : SOPK_Real_vi <0x13, S_GETREG_REGRD_B32>; // see pseudo for comments def S_SETREG_IMM32_B32_vi : SOPK_Real64<0x14, S_SETREG_IMM32_B32>, Select_vi; + +//===----------------------------------------------------------------------===// +// SOP1 - GFX9. +//===----------------------------------------------------------------------===// + +def S_ANDN1_SAVEEXEC_B64_vi : SOP1_Real_vi<0x33, S_ANDN1_SAVEEXEC_B64>; +def S_ORN1_SAVEEXEC_B64_vi : SOP1_Real_vi<0x34, S_ORN1_SAVEEXEC_B64>; +def S_ANDN1_WREXEC_B64_vi : SOP1_Real_vi<0x35, S_ANDN1_WREXEC_B64>; +def S_ANDN2_WREXEC_B64_vi : SOP1_Real_vi<0x36, S_ANDN2_WREXEC_B64>; +def S_BITREPLICATE_B64_B32_vi : SOP1_Real_vi<0x37, S_BITREPLICATE_B64_B32>; Index: test/MC/AMDGPU/sop1.s =================================================================== --- test/MC/AMDGPU/sop1.s +++ test/MC/AMDGPU/sop1.s @@ -1,7 +1,9 @@ // RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s -// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck --check-prefix=NOSICI %s +// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck --check-prefix=NOSICI --check-prefix=NOSICIVI %s // RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=VI %s -// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck --check-prefix=NOVI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck --check-prefix=NOVI --check-prefix=NOSICIVI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=VI --check-prefix=GFX9 %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck --check-prefix=NOGFX89 %s s_mov_b32 s1, s2 // SICI: s_mov_b32 s1, s2 ; encoding: [0x02,0x03,0x81,0xbe] @@ -43,7 +45,7 @@ s_mov_b64 s[102:103], -1 // SICI: s_mov_b64 s[102:103], -1 ; encoding: [0xc1,0x04,0xe6,0xbe] -// NOVI: error: not a valid operand +// NOGFX89: error: not a valid operand s_cmov_b32 s1, 200 // SICI: s_cmov_b32 s1, 0xc8 ; encoding: [0xff,0x05,0x81,0xbe,0xc8,0x00,0x00,0x00] @@ -238,11 +240,11 @@ s_cbranch_join 1 // NOSICI: error: invalid operand for instruction -// NOVI: error: invalid operand for instruction +// NOGFX89: error: invalid operand for instruction s_cbranch_join 100 // NOSICI: error: invalid operand for instruction -// NOVI: error: invalid operand for instruction +// NOGFX89: error: invalid operand for instruction s_abs_i32 s1, s2 // SICI: s_abs_i32 s1, s2 ; encoding: [0x02,0x34,0x81,0xbe] @@ -254,3 +256,43 @@ s_set_gpr_idx_idx s0 // VI: s_set_gpr_idx_idx s0 ; encoding: [0x00,0x32,0x80,0xbe] // NOSICI: error: instruction not supported on this GPU + +s_andn1_saveexec_b64 s[100:101], s[2:3] +// GFX9: s_andn1_saveexec_b64 s[100:101], s[2:3] ; encoding: [0x02,0x33,0xe4,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_andn1_saveexec_b64 s[10:11], s[4:5] +// GFX9: s_andn1_saveexec_b64 s[10:11], s[4:5] ; encoding: [0x04,0x33,0x8a,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_andn1_saveexec_b64 s[10:11], -1 +// GFX9: s_andn1_saveexec_b64 s[10:11], -1 ; encoding: [0xc1,0x33,0x8a,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_andn1_saveexec_b64 s[10:11], 0xaf123456 +// GFX9: s_andn1_saveexec_b64 s[10:11], 0xaf123456 ; encoding: [0xff,0x33,0x8a,0xbe,0x56,0x34,0x12,0xaf] +// NOSICIVI: error: instruction not supported on this GPU + +s_andn1_wrexec_b64 s[10:11], s[2:3] +// GFX9: s_andn1_wrexec_b64 s[10:11], s[2:3] ; encoding: [0x02,0x35,0x8a,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_andn2_wrexec_b64 s[12:13], s[2:3] +// GFX9: s_andn2_wrexec_b64 s[12:13], s[2:3] ; encoding: [0x02,0x36,0x8c,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_orn1_saveexec_b64 s[10:11], 0 +// GFX9: s_orn1_saveexec_b64 s[10:11], 0 ; encoding: [0x80,0x34,0x8a,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_bitreplicate_b64_b32 s[10:11], s101 +// GFX9: s_bitreplicate_b64_b32 s[10:11], s101 ; encoding: [0x65,0x37,0x8a,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_bitreplicate_b64_b32 s[10:11], -1 +// GFX9: s_bitreplicate_b64_b32 s[10:11], -1 ; encoding: [0xc1,0x37,0x8a,0xbe] +// NOSICIVI: error: instruction not supported on this GPU + +s_bitreplicate_b64_b32 s[10:11], 0x3f717273 +// GFX9: s_bitreplicate_b64_b32 s[10:11], 0x3f717273 ; encoding: [0xff,0x37,0x8a,0xbe,0x73,0x72,0x71,0x3f] +// NOSICIVI: error: instruction not supported on this GPU Index: test/MC/Disassembler/AMDGPU/sop1_gfx9.txt =================================================================== --- /dev/null +++ test/MC/Disassembler/AMDGPU/sop1_gfx9.txt @@ -0,0 +1,34 @@ +# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX9 + +# GFX9: s_andn1_saveexec_b64 s[10:11], s[2:3] ; encoding: [0x02,0x33,0x8a,0xbe] +0x02,0x33,0x8a,0xbe + +# GFX9: s_andn1_saveexec_b64 s[10:11], 0 ; encoding: [0x80,0x33,0x8a,0xbe] +0x80,0x33,0x8a,0xbe + +# GFX9: s_andn1_wrexec_b64 s[100:101], s[2:3] ; encoding: [0x02,0x35,0xe4,0xbe] +0x02,0x35,0xe4,0xbe + +# GFX9: s_andn1_wrexec_b64 s[10:11], 0xaf123456 ; encoding: [0xff,0x35,0x8a,0xbe,0x56,0x34,0x12,0xaf] +0xff,0x35,0x8a,0xbe,0x56,0x34,0x12,0xaf + +# GFX9: s_andn2_wrexec_b64 s[10:11], s[100:101] ; encoding: [0x64,0x36,0x8a,0xbe] +0x64,0x36,0x8a,0xbe + +# GFX9: s_andn2_wrexec_b64 s[10:11], -1 ; encoding: [0xc1,0x36,0x8a,0xbe] +0xc1,0x36,0x8a,0xbe + +# GFX9: s_orn1_saveexec_b64 s[10:11], -1 ; encoding: [0xc1,0x34,0x8a,0xbe] +0xc1,0x34,0x8a,0xbe + +# GFX9: s_orn1_saveexec_b64 s[10:11], 0x3f717273 ; encoding: [0xff,0x34,0x8a,0xbe,0x73,0x72,0x71,0x3f] +0xff,0x34,0x8a,0xbe,0x73,0x72,0x71,0x3f + +# GFX9: s_bitreplicate_b64_b32 s[10:11], s101 ; encoding: [0x65,0x37,0x8a,0xbe] +0x65,0x37,0x8a,0xbe + +# GFX9: s_bitreplicate_b64_b32 s[10:11], 0 ; encoding: [0x80,0x37,0x8a,0xbe] +0x80,0x37,0x8a,0xbe + +# GFX9: s_bitreplicate_b64_b32 s[10:11], 0xaf123456 ; encoding: [0xff,0x37,0x8a,0xbe,0x56,0x34,0x12,0xaf] +0xff,0x37,0x8a,0xbe,0x56,0x34,0x12,0xaf