Index: ELF/Arch/ARM.cpp
===================================================================
--- ELF/Arch/ARM.cpp
+++ ELF/Arch/ARM.cpp
@@ -60,7 +60,7 @@
   GotPltEntrySize = 4;
   PltEntrySize = 16;
   PltHeaderSize = 32;
-  TrapInstr = 0xd4d4d4d4;
+  TrapInstr1 = 0xd4;
   // ARM uses Variant 1 TLS
   TcbSize = 8;
   NeedsThunks = true;
@@ -227,10 +227,10 @@
   write32le(Buf + 4, PltData[1] | ((Offset >> 20) & 0xff));
   write32le(Buf + 8, PltData[2] | ((Offset >> 12) & 0xff));
   write32le(Buf + 12, PltData[3] | (Offset & 0xfff));
-  write32le(Buf + 16, TrapInstr); // Pad to 32-byte boundary
-  write32le(Buf + 20, TrapInstr);
-  write32le(Buf + 24, TrapInstr);
-  write32le(Buf + 28, TrapInstr);
+  write32le(Buf + 16, 0xd4d4d4d4); // Pad to 32-byte boundary
+  write32le(Buf + 20, 0xd4d4d4d4);
+  write32le(Buf + 24, 0xd4d4d4d4);
+  write32le(Buf + 28, 0xd4d4d4d4);
 }
 
 void ARM::addPltHeaderSymbols(InputSection &IS) const {
@@ -279,7 +279,7 @@
   write32le(Buf + 0, PltData[0] | ((Offset >> 20) & 0xff));
   write32le(Buf + 4, PltData[1] | ((Offset >> 12) & 0xff));
   write32le(Buf + 8, PltData[2] | (Offset & 0xfff));
-  write32le(Buf + 12, TrapInstr); // Pad to 16-byte boundary
+  write32le(Buf + 12, 0xd4d4d4d4); // Pad to 16-byte boundary
 }
 
 void ARM::addPltSymbols(InputSection &IS, uint64_t Off) const {
Index: ELF/Arch/Mips.cpp
===================================================================
--- ELF/Arch/Mips.cpp
+++ ELF/Arch/Mips.cpp
@@ -56,7 +56,7 @@
   CopyRel = R_MIPS_COPY;
   PltRel = R_MIPS_JUMP_SLOT;
   NeedsThunks = true;
-  TrapInstr = 0xefefefef;
+  TrapInstr1 = 0xef;
 
   if (ELFT::Is64Bits) {
     RelativeRel = (R_MIPS_64 << 8) | R_MIPS_REL32;
Index: ELF/Arch/X86.cpp
===================================================================
--- ELF/Arch/X86.cpp
+++ ELF/Arch/X86.cpp
@@ -59,7 +59,7 @@
   PltEntrySize = 16;
   PltHeaderSize = 16;
   TlsGdRelaxSkip = 2;
-  TrapInstr = 0xcccccccc; // 0xcc = INT3
+  TrapInstr1 = 0xcc; // 0xcc = INT3
 }
 
 static bool hasBaseReg(uint8_t ModRM) { return (ModRM & 0xc7) != 0x5; }
Index: ELF/Arch/X86_64.cpp
===================================================================
--- ELF/Arch/X86_64.cpp
+++ ELF/Arch/X86_64.cpp
@@ -64,7 +64,7 @@
   PltEntrySize = 16;
   PltHeaderSize = 16;
   TlsGdRelaxSkip = 2;
-  TrapInstr = 0xcccccccc; // 0xcc = INT3
+  TrapInstr1 = 0xcc; // 0xcc = INT3
 
   // Align to the large page size (known as a superpage or huge page).
   // FreeBSD automatically promotes large, superpage-aligned allocations.
Index: ELF/OutputSections.cpp
===================================================================
--- ELF/OutputSections.cpp
+++ ELF/OutputSections.cpp
@@ -412,9 +412,11 @@
 uint32_t OutputSection::getFiller() {
   if (Filler)
     return *Filler;
-  if (Flags & SHF_EXECINSTR)
-    return Target->TrapInstr;
-  return 0;
+
+  if (!(Flags & SHF_EXECINSTR))
+    return 0;
+  return Target->TrapInstr1 << 24 | Target->TrapInstr1 << 16 |
+         Target->TrapInstr1 << 8 | Target->TrapInstr1;
 }
 
 template void OutputSection::writeHeaderTo<ELF32LE>(ELF32LE::Shdr *Shdr);
Index: ELF/Target.h
===================================================================
--- ELF/Target.h
+++ ELF/Target.h
@@ -111,9 +111,8 @@
 
   bool NeedsThunks = false;
 
-  // A 4-byte field corresponding to one or more trap instructions, used to pad
-  // executable OutputSections.
-  uint32_t TrapInstr = 0;
+  // Trap instruction, used to pad executable OutputSections.
+  uint8_t TrapInstr1 = 0;
 
   virtual RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
                                   RelExpr Expr) const;
Index: ELF/Writer.cpp
===================================================================
--- ELF/Writer.cpp
+++ ELF/Writer.cpp
@@ -2183,8 +2183,7 @@
 }
 
 static void fillTrap(uint8_t *I, uint8_t *End) {
-  for (; I + 4 <= End; I += 4)
-    memcpy(I, &Target->TrapInstr, 4);
+  memset(I, Target->TrapInstr1, End - I);
 }
 
 // Fill the last page of executable segments with trap instructions