Index: lib/Target/ARM/ARMISelLowering.cpp =================================================================== --- lib/Target/ARM/ARMISelLowering.cpp +++ lib/Target/ARM/ARMISelLowering.cpp @@ -527,6 +527,9 @@ setOperationAction(ISD::BITCAST, MVT::i16, Custom); setOperationAction(ISD::BITCAST, MVT::i32, Custom); setOperationAction(ISD::BITCAST, MVT::f16, Custom); + + setOperationAction(ISD::FMINNUM, MVT::f16, Legal); + setOperationAction(ISD::FMAXNUM, MVT::f16, Legal); } for (MVT VT : MVT::vector_valuetypes()) { Index: lib/Target/ARM/ARMInstrVFP.td =================================================================== --- lib/Target/ARM/ARMInstrVFP.td +++ lib/Target/ARM/ARMInstrVFP.td @@ -482,9 +482,9 @@ multiclass vmaxmin_inst { let DecoderNamespace = "VFPV8", PostEncoderMethod = "" in { def H : AHbInp<0b11101, 0b00, opc, - (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), + (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm), NoItinerary, !strconcat(op, ".f16\t$Sd, $Sn, $Sm"), - []>, + [(set HPR:$Sd, (SD HPR:$Sn, HPR:$Sm))]>, Requires<[HasFullFP16]>; def S : ASbInp<0b11101, 0b00, opc, Index: test/CodeGen/ARM/fp16-instructions.ll =================================================================== --- test/CodeGen/ARM/fp16-instructions.ll +++ test/CodeGen/ARM/fp16-instructions.ll @@ -28,7 +28,6 @@ ; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fullfp16 -fp-contract=fast | FileCheck %s --check-prefixes=CHECK,CHECK-HARDFP-FULLFP16-FAST ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mattr=+fullfp16 -fp-contract=fast | FileCheck %s --check-prefixes=CHECK,CHECK-HARDFP-FULLFP16-FAST - define float @RetValBug(float %A.coerce) { entry: ret float undef @@ -477,9 +476,10 @@ ; CHECK-HARDFP-FULLFP16-FAST-NEXT: vmov.f32 s0, s2 } -; TODO: ; 17. VMAXNM ; 18. VMINNM +; Tested in fp16-vminmaxnm.ll and fp16-vminmaxnm-safe.ll + ; 19. VMLA define float @VMLA(float %a.coerce, float %b.coerce, float %c.coerce) { Index: test/CodeGen/ARM/fp16-vminmaxnm-safe.ll =================================================================== --- /dev/null +++ test/CodeGen/ARM/fp16-vminmaxnm-safe.ll @@ -0,0 +1,318 @@ +; RUN: llc < %s -mtriple armv8 -mattr=+fullfp16 | FileCheck %s +; RUN: llc < %s -mtriple thumb -mattr=+fullfp16 | FileCheck %s + +define half @fp16_vminnm_o(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_o: +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp olt half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vminnm_o_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_o_rev: +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ogt half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vminnm_u(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_u: +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ult half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vminnm_ule(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_ule: +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ule half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vminnm_u_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_u_rev: +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ugt half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +define half @fp16_vmaxnm_o(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_o: +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ogt half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_oge(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_oge: +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp oge half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_o_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_o_rev: +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp olt half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +define half @fp16_vmaxnm_ole_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_ole_rev: +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ole half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +define half @fp16_vmaxnm_u(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_u: +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ugt half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_uge(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_uge: +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp uge half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_u_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_u_rev: +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp ult half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +; known non-NaNs + +define half @fp16_vminnm_NNNo(i16 signext %a) { +; CHECK-LABEL: fp16_vminnm_NNNo: +; CHECK: vminnm.f16 +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp olt half %0, 12. + %cond1 = select i1 %cmp1, half %0, half 12. + %cmp2 = fcmp olt half 34., %cond1 + %cond2 = select i1 %cmp2, half 34., half %cond1 + ret half %cond2 +} + +define half @fp16_vminnm_NNNo_rev(i16 signext %a) { +; CHECK-LABEL: fp16_vminnm_NNNo_rev: +; CHECK: vminnm.f16 +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp ogt half %0, 56. + %cond1 = select i1 %cmp1, half 56., half %0 + %cmp2 = fcmp ogt half 78., %cond1 + %cond2 = select i1 %cmp2, half %cond1, half 78. + ret half %cond2 +} + +define half @fp16_vminnm_NNNu(i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_NNNu: +; CHECK: vminnm.f16 +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp ult half 12., %0 + %cond1 = select i1 %cmp1, half 12., half %0 + %cmp2 = fcmp ult half %cond1, 34. + %cond2 = select i1 %cmp2, half %cond1, half 34. + ret half %cond2 +} + +define half @fp16_vminnm_NNNule(i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_NNNule: +; CHECK: vminnm.f16 +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp ule half 34., %0 + %cond1 = select i1 %cmp1, half 34., half %0 + %cmp2 = fcmp ule half %cond1, 56. + %cond2 = select i1 %cmp2, half %cond1, half 56. + ret half %cond2 +} + +define half @fp16_vminnm_NNNu_rev(i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_NNNu_rev: +; CHECK: vminnm.f16 +; CHECK-NOT: vminnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp ugt half 56., %0 + %cond1 = select i1 %cmp1, half %0, half 56. + %cmp2 = fcmp ugt half %cond1, 78. + %cond2 = select i1 %cmp2, half 78., half %cond1 + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNo(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNo: +; CHECK: vmaxnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp ogt half %0, 12. + %cond1 = select i1 %cmp1, half %0, half 12. + %cmp2 = fcmp ogt half 34., %cond1 + %cond2 = select i1 %cmp2, half 34., half %cond1 + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNoge(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNoge: +; CHECK: vmaxnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp oge half %0, 34. + %cond1 = select i1 %cmp1, half %0, half 34. + %cmp2 = fcmp oge half 56., %cond1 + %cond2 = select i1 %cmp2, half 56., half %cond1 + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNo_rev(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNo_rev: +; CHECK: vmaxnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp olt half %0, 56. + %cond1 = select i1 %cmp1, half 56., half %0 + %cmp2 = fcmp olt half 78., %cond1 + %cond2 = select i1 %cmp2, half %cond1, half 78. + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNole_rev(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNole_rev: +; CHECK: vmaxnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp ole half %0, 78. + %cond1 = select i1 %cmp1, half 78., half %0 + %cmp2 = fcmp ole half 90., %cond1 + %cond2 = select i1 %cmp2, half %cond1, half 90. + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNu(i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_NNNu: +; CHECK: vmaxnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp ugt half 12., %0 + %cond1 = select i1 %cmp1, half 12., half %0 + %cmp2 = fcmp ugt half %cond1, 34. + %cond2 = select i1 %cmp2, half %cond1, half 34. + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNuge(i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_NNNuge: +; CHECK: vmaxnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp uge half 34., %0 + %cond1 = select i1 %cmp1, half 34., half %0 + %cmp2 = fcmp uge half %cond1, 56. + %cond2 = select i1 %cmp2, half %cond1, half 56. + ret half %cond2 +} + +define half @fp16_vminmaxnm_neg0(i16 signext %a) { +; CHECK-LABEL: fp16_vminmaxnm_neg0: +; CHECK: vminnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp olt half %0, -0. + %cond1 = select i1 %cmp1, half %0, half -0. + %cmp2 = fcmp ugt half %cond1, -0. + %cond2 = select i1 %cmp2, half %cond1, half -0. + ret half %cond2 +} + +define half @fp16_vminmaxnm_e_0(i16 signext %a) { +; CHECK-LABEL: fp16_vminmaxnm_e_0: +; CHECK-NOT: vminnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp nsz ole half 0., %0 + %cond1 = select i1 %cmp1, half 0., half %0 + %cmp2 = fcmp nsz uge half 0., %cond1 + %cond2 = select i1 %cmp2, half 0., half %cond1 + ret half %cond2 +} + +define half @fp16_vminmaxnm_e_neg0(i16 signext %a) { +; CHECK-LABEL: fp16_vminmaxnm_e_neg0: +; CHECK: vminnm.f16 +; CHECK-NOT: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp nsz ule half -0., %0 + %cond1 = select i1 %cmp1, half -0., half %0 + %cmp2 = fcmp nsz oge half -0., %cond1 + %cond2 = select i1 %cmp2, half -0., half %cond1 + ret half %cond2 +} Index: test/CodeGen/ARM/fp16-vminmaxnm.ll =================================================================== --- /dev/null +++ test/CodeGen/ARM/fp16-vminmaxnm.ll @@ -0,0 +1,360 @@ +; RUN: llc < %s -mtriple armv8 -mattr=+fullfp16 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s +; RUN: llc < %s -mtriple thumb -mattr=+fullfp16 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s + +define half @fp16_vminnm_o(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_o: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast olt half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vminnm_o_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_o_rev: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ogt half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +define half @fp16_vminnm_u(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_u: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ult half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vminnm_ule(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_ule: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ule half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vminnm_u_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_u_rev: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ugt half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +define half @fp16_vmaxnm_o(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_o: +; CHECK-NOT: vcmp +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ogt half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_oge(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_oge: +; CHECK-NOT: vcmp +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast oge half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_o_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_o_rev: +; CHECK-NOT: vcmp +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast olt half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +define half @fp16_vmaxnm_ole_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_ole_rev: +; CHECK-NOT: vcmp +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ole half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +define half @fp16_vmaxnm_u(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_u: +; CHECK-NOT: vcmp +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ugt half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_uge(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_uge: +; CHECK-NOT: vcmp +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast uge half %0, %1 + %cond = select i1 %cmp, half %0, half %1 + ret half %cond +} + +define half @fp16_vmaxnm_u_rev(i16 signext %a, i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_u_rev: +; CHECK-NOT: vcmp +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %1 = bitcast i16 %b to half + %cmp = fcmp fast ult half %0, %1 + %cond = select i1 %cmp, half %1, half %0 + ret half %cond +} + +; known non-NaNs + +define half @fp16_vminnm_NNNo(i16 signext %a) { +; CHECK-LABEL: fp16_vminnm_NNNo: +; CHECK: vminnm.f16 +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast olt half %0, 12. + %cond1 = select i1 %cmp1, half %0, half 12. + %cmp2 = fcmp fast olt half 34., %cond1 + %cond2 = select i1 %cmp2, half 34., half %cond1 + ret half %cond2 +} + +define half @fp16_vminnm_NNNo_rev(i16 signext %a) { +; CHECK-LABEL: fp16_vminnm_NNNo_rev: +; CHECK: vminnm.f16 +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast ogt half %0, 56. + %cond1 = select i1 %cmp1, half 56., half %0 + %cmp2 = fcmp fast ogt half 78., %cond1 + %cond2 = select i1 %cmp2, half %cond1, half 78. + ret half %cond2 +} + +define half @fp16_vminnm_NNNu(i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_NNNu: +; CHECK: vminnm.f16 +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp fast ult half 12., %0 + %cond1 = select i1 %cmp1, half 12., half %0 + %cmp2 = fcmp fast ult half %cond1, 34. + %cond2 = select i1 %cmp2, half %cond1, half 34. + ret half %cond2 +} + +define half @fp16_vminnm_NNNule(i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_NNNule: +; CHECK: vminnm.f16 +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp fast ule half 34., %0 + %cond1 = select i1 %cmp1, half 34., half %0 + %cmp2 = fcmp fast ule half %cond1, 56. + %cond2 = select i1 %cmp2, half %cond1, half 56. + ret half %cond2 +} + +define half @fp16_vminnm_NNNu_rev(i16 signext %b) { +; CHECK-LABEL: fp16_vminnm_NNNu_rev: +; CHECK: vminnm.f16 +; CHECK: vminnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp fast ugt half 56., %0 + %cond1 = select i1 %cmp1, half %0, half 56. + %cmp2 = fcmp fast ugt half %cond1, 78. + %cond2 = select i1 %cmp2, half 78., half %cond1 + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNo(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNo: +; CHECK: vmaxnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast ogt half %0, 12. + %cond1 = select i1 %cmp1, half %0, half 12. + %cmp2 = fcmp fast ogt half 34., %cond1 + %cond2 = select i1 %cmp2, half 34., half %cond1 + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNoge(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNoge: +; CHECK: vmaxnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast oge half %0, 34. + %cond1 = select i1 %cmp1, half %0, half 34. + %cmp2 = fcmp fast oge half 56., %cond1 + %cond2 = select i1 %cmp2, half 56., half %cond1 + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNo_rev(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNo_rev: +; CHECK: vmaxnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast olt half %0, 56. + %cond1 = select i1 %cmp1, half 56., half %0 + %cmp2 = fcmp fast olt half 78., %cond1 + %cond2 = select i1 %cmp2, half %cond1, half 78. + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNole_rev(i16 signext %a) { +; CHECK-LABEL: fp16_vmaxnm_NNNole_rev: +; CHECK: vmaxnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast ole half %0, 78. + %cond1 = select i1 %cmp1, half 78., half %0 + %cmp2 = fcmp fast ole half 90., %cond1 + %cond2 = select i1 %cmp2, half %cond1, half 90. + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNu(i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_NNNu: +; CHECK: vmaxnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp fast ugt half 12., %0 + %cond1 = select i1 %cmp1, half 12., half %0 + %cmp2 = fcmp fast ugt half %cond1, 34. + %cond2 = select i1 %cmp2, half %cond1, half 34. + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNuge(i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_NNNuge: +; CHECK: vmaxnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp fast uge half 34., %0 + %cond1 = select i1 %cmp1, half 34., half %0 + %cmp2 = fcmp fast uge half %cond1, 56. + %cond2 = select i1 %cmp2, half %cond1, half 56. + ret half %cond2 +} + +define half @fp16_vmaxnm_NNNu_rev(i16 signext %b) { +; CHECK-LABEL: fp16_vmaxnm_NNNu_rev: +; CHECK: vmaxnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %b to half + %cmp1 = fcmp fast ult half 56., %0 + %cond1 = select i1 %cmp1, half %0, half 56. + %cmp2 = fcmp fast ult half %cond1, 78. + %cond2 = select i1 %cmp2, half 78., half %cond1 + ret half %cond2 +} + +define half @fp16_vminmaxnm_0(i16 signext %a) { +; CHECK-LABEL: fp16_vminmaxnm_0: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast olt half %0, 0. + %cond1 = select i1 %cmp1, half %0, half 0. + %cmp2 = fcmp fast ogt half %cond1, 0. + %cond2 = select i1 %cmp2, half %cond1, half 0. + ret half %cond2 +} + +define half @fp16_vminmaxnm_neg0(i16 signext %a) { +; CHECK-LABEL: fp16_vminmaxnm_neg0: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast olt half %0, -0. + %cond1 = select i1 %cmp1, half %0, half -0. + %cmp2 = fcmp fast ugt half %cond1, -0. + %cond2 = select i1 %cmp2, half %cond1, half -0. + ret half %cond2 +} + +define half @fp16_vminmaxnm_e_0(i16 signext %a) { +; CHECK-LABEL: fp16_vminmaxnm_e_0: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast ule half 0., %0 + %cond1 = select i1 %cmp1, half 0., half %0 + %cmp2 = fcmp fast uge half 0., %cond1 + %cond2 = select i1 %cmp2, half 0., half %cond1 + ret half %cond2 +} + +define half @fp16_vminmaxnm_e_neg0(i16 signext %a) { +; CHECK-LABEL: fp16_vminmaxnm_e_neg0: +; CHECK-NOT: vcmp +; CHECK: vminnm.f16 +; CHECK: vmaxnm.f16 +entry: + %0 = bitcast i16 %a to half + %cmp1 = fcmp fast ule half -0., %0 + %cond1 = select i1 %cmp1, half -0., half %0 + %cmp2 = fcmp fast oge half -0., %cond1 + %cond2 = select i1 %cmp2, half -0., half %cond1 + ret half %cond2 +}