Index: lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp =================================================================== --- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -32,6 +32,8 @@ return LLT::pointer(AS, TM.getPointerSizeInBits(AS)); }; + auto AMDGPUAS = ST.getAMDGPUAS(); + const LLT S1 = LLT::scalar(1); const LLT V2S16 = LLT::vector(2, 16); @@ -40,7 +42,17 @@ const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS); const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS); - + const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS); + const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS.FLAT_ADDRESS); + const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS.PRIVATE_ADDRESS); + + const LLT AddrSpaces[] = { + GlobalPtr, + ConstantPtr, + LocalPtr, + FlatPtr, + PrivatePtr + }; setAction({G_ADD, S32}, Legal); setAction({G_MUL, S32}, Legal); @@ -84,9 +96,11 @@ setAction({G_FPTOUI, S32}, Legal); setAction({G_FPTOUI, 1, S32}, Legal); - setAction({G_GEP, GlobalPtr}, Legal); - setAction({G_GEP, ConstantPtr}, Legal); - setAction({G_GEP, 1, S64}, Legal); + for (LLT PtrTy : AddrSpaces) { + LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits()); + setAction({G_GEP, PtrTy}, Legal); + setAction({G_GEP, 1, IdxTy}, Legal); + } setAction({G_ICMP, S1}, Legal); setAction({G_ICMP, 1, S32}, Legal); Index: test/CodeGen/AMDGPU/GlobalISel/legalize-gep.mir =================================================================== --- /dev/null +++ test/CodeGen/AMDGPU/GlobalISel/legalize-gep.mir @@ -0,0 +1,92 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s + +--- +name: test_gep_global_i64_idx +body: | + bb.0: + liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 + + ; CHECK-LABEL: name: test_gep_global_i64_idx + ; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 + ; CHECK: [[GEP:%[0-9]+]]:_(p1) = G_GEP [[COPY]], [[COPY1]](s64) + ; CHECK: $vgpr0_vgpr1 = COPY [[GEP]](p1) + %0:_(p1) = COPY $vgpr0_vgpr1 + %1:_(s64) = COPY $vgpr2_vgpr3 + %2:_(p1) = G_GEP %0, %1 + + $vgpr0_vgpr1 = COPY %2 +... + +--- +name: test_gep_flat_i64_idx +body: | + bb.0: + liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 + + ; CHECK-LABEL: name: test_gep_flat_i64_idx + ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 + ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 + ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[COPY1]](s64) + ; CHECK: $vgpr0_vgpr1 = COPY [[GEP]](p0) + %0:_(p0) = COPY $vgpr0_vgpr1 + %1:_(s64) = COPY $vgpr2_vgpr3 + %2:_(p0) = G_GEP %0, %1 + + $vgpr0_vgpr1 = COPY %2 +... + +--- +name: test_gep_constant_i64_idx +body: | + bb.0: + liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 + + ; CHECK-LABEL: name: test_gep_constant_i64_idx + ; CHECK: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 + ; CHECK: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[COPY]], [[COPY1]](s64) + ; CHECK: $vgpr0_vgpr1 = COPY [[GEP]](p4) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(s64) = COPY $vgpr2_vgpr3 + %2:_(p4) = G_GEP %0, %1 + + $vgpr0_vgpr1 = COPY %2 +... + +--- +name: test_gep_local_i32_idx +body: | + bb.0: + liveins: $vgpr0, $vgpr1 + + ; CHECK-LABEL: name: test_gep_local_i32_idx + ; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 + ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 + ; CHECK: [[GEP:%[0-9]+]]:_(p3) = G_GEP [[COPY]], [[COPY1]](s32) + ; CHECK: $vgpr0 = COPY [[GEP]](p3) + %0:_(p3) = COPY $vgpr0 + %1:_(s32) = COPY $vgpr1 + %2:_(p3) = G_GEP %0, %1 + + $vgpr0 = COPY %2 +... + +--- +name: test_gep_private_i32_idx +body: | + bb.0: + liveins: $vgpr0, $vgpr1 + + ; CHECK-LABEL: name: test_gep_private_i32_idx + ; CHECK: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 + ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 + ; CHECK: [[GEP:%[0-9]+]]:_(p5) = G_GEP [[COPY]], [[COPY1]](s32) + ; CHECK: $vgpr0 = COPY [[GEP]](p5) + %0:_(p5) = COPY $vgpr0 + %1:_(s32) = COPY $vgpr1 + %2:_(p5) = G_GEP %0, %1 + + $vgpr0 = COPY %2 +...