Index: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -6631,6 +6631,24 @@
                                                "code specified");
     break;
   }
+  case ARM::VMOVRRS: {
+    // Source registers must be sequential.
+    const unsigned Sm = MRI->getEncodingValue(Inst.getOperand(2).getReg());
+    const unsigned Sm1 = MRI->getEncodingValue(Inst.getOperand(3).getReg());
+    if (Sm1 != Sm + 1)
+      return Error(Operands[5]->getStartLoc(),
+                   "source operands must be sequential");
+    break;
+  }
+  case ARM::VMOVSRR: {
+    // Destination registers must be sequential.
+    const unsigned Sm = MRI->getEncodingValue(Inst.getOperand(0).getReg());
+    const unsigned Sm1 = MRI->getEncodingValue(Inst.getOperand(1).getReg());
+    if (Sm1 != Sm + 1)
+      return Error(Operands[3]->getStartLoc(),
+                   "destination operands must be sequential");
+    break;
+  }
   }
 
   return false;
Index: llvm/trunk/test/MC/ARM/vmov-pair-diags.s
===================================================================
--- llvm/trunk/test/MC/ARM/vmov-pair-diags.s
+++ llvm/trunk/test/MC/ARM/vmov-pair-diags.s
@@ -0,0 +1,6 @@
+@ RUN: not llvm-mc -triple armv7-eabi < %s 2>&1 | FileCheck %s
+
+vmov	r0, r1, s0, s2
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: source operands must be sequential
+vmov	s0, s2, r0, r1
+// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: destination operands must be sequential