Index: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp =================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp +++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1235,7 +1235,7 @@ .addImm(0U) .addMetadata(DI->getVariable()) .addMetadata(DI->getExpression()); - } else if (unsigned Reg = lookUpRegForValue(V)) { + } else if (unsigned Reg = getRegForValue(V)) { // FIXME: This does not handle register-indirect values at offset 0. bool IsIndirect = false; BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, IsIndirect, Reg, Index: llvm/trunk/test/CodeGen/Generic/dbg_value_fastisel.ll =================================================================== --- llvm/trunk/test/CodeGen/Generic/dbg_value_fastisel.ll +++ llvm/trunk/test/CodeGen/Generic/dbg_value_fastisel.ll @@ -0,0 +1,54 @@ +; RUN: llc -O0 -stop-after=livedebugvalues -fast-isel=true < %s | FileCheck %s + +; CHECK: ![[LOCAL:[0-9]+]] = !DILocalVariable(name: "__vla_expr", +; CHECK: DBG_VALUE {{.*}} ![[LOCAL]] + +; ModuleID = '' +source_filename = "foo.c" +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +; Function Attrs: noinline nounwind optnone uwtable +define void @foo(i32 %n) local_unnamed_addr #0 !dbg !7 { +entry: + %0 = zext i32 %n to i64, !dbg !11 + %1 = call i8* @llvm.stacksave(), !dbg !12 + call void @llvm.dbg.value(metadata i64 %0, metadata !13, metadata !DIExpression()), !dbg !12 + %vla.i = alloca i32, i64 %0, align 16, !dbg !12 + call void @llvm.stackrestore(i8* %1), !dbg !12 + ret void, !dbg !12 +} + +; Function Attrs: nounwind +declare i8* @llvm.stacksave() #1 + +; Function Attrs: nounwind +declare void @llvm.stackrestore(i8*) #1 + +; Function Attrs: nounwind readnone speculatable +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 + +attributes #0 = { noinline nounwind optnone uwtable } +attributes #1 = { nounwind } +attributes #2 = { nounwind readnone speculatable } + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!3, !4, !5} +!llvm.ident = !{!6} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 7.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2) +!1 = !DIFile(filename: "foo.c", directory: "/path/to/build") +!2 = !{} +!3 = !{i32 2, !"Dwarf Version", i32 4} +!4 = !{i32 2, !"Debug Info Version", i32 3} +!5 = !{i32 1, !"wchar_size", i32 4} +!6 = !{!"clang version 7.0.0"} +!7 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 39, isOptimized: false, unit: !0, variables: !2) +!8 = !DISubroutineType(types: !9) +!9 = !{!10} +!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) +!11 = !DILocation(line: 2, column: 5, scope: !7) +!12 = !DILocation(line: 4, column: 5, scope: !7) +!13 = !DILocalVariable(name: "__vla_expr", scope: !14, type: !15, flags: DIFlagArtificial) +!14 = distinct !DILexicalBlock(scope: !7, file: !1, line: 32, column: 31) +!15 = !DIBasicType(name: "long unsigned int", size: 64, encoding: DW_ATE_unsigned) Index: llvm/trunk/test/DebugInfo/X86/fission-ranges.ll =================================================================== --- llvm/trunk/test/DebugInfo/X86/fission-ranges.ll +++ llvm/trunk/test/DebugInfo/X86/fission-ranges.ll @@ -17,6 +17,7 @@ ; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[B:0x[0-9a-z]*]] ; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[D:0x[0-9a-z]*]] ; CHECK: DW_AT_ranges [DW_FORM_sec_offset] (0x00000000 +; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[W:0x[0-9a-z]*]] ; CHECK-NOT: .debug_loc contents: ; CHECK-NOT: Beginning address offset ; CHECK: .debug_loc.dwo contents: @@ -25,24 +26,27 @@ ; if they've changed due to a bugfix, change in register allocation, etc. ; CHECK: [[A]]: -; CHECK-NEXT: Addr idx 2 (w/ length 169): DW_OP_consts +0, DW_OP_stack_value +; CHECK-NEXT: Addr idx 2 (w/ length 188): DW_OP_consts +0, DW_OP_stack_value ; CHECK-NEXT: Addr idx 3 (w/ length 25): DW_OP_reg0 RAX +; CHECK: [[W]]: +; CHECK-NEXT: Addr idx 4 (w/ length 20): DW_OP_reg1 RDX +; CHECK-NEXT: Addr idx 5 (w/ length 102): DW_OP_breg7 RSP-56 ; CHECK: [[E]]: -; CHECK-NEXT: Addr idx 4 (w/ length 19): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 6 (w/ length 24): DW_OP_reg0 RAX ; CHECK: [[B]]: -; CHECK-NEXT: Addr idx 5 (w/ length 17): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 7 (w/ length 17): DW_OP_reg0 RAX ; CHECK: [[D]]: -; CHECK-NEXT: Addr idx 6 (w/ length 17): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 8 (w/ length 21): DW_OP_reg0 RAX ; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo) ; HDR-NOT: .rela.{{.*}}.dwo ; Make sure we have enough stuff in the debug_addr to cover the address indexes -; (6 is the last index in debug_loc.dwo, making 7 entries of 8 bytes each, 7 * 8 -; == 56 base 10 == 38 base 16) +; (8 is the last index in debug_loc.dwo, making 9 entries of 8 bytes each, 9 * 8 +; == 72 base 10 == 48 base 16) -; HDR: .debug_addr 00000038 +; HDR: .debug_addr 00000048 ; HDR-NOT: .rela.{{.*}}.dwo ; From the code: