Index: lib/Target/R600/AMDGPU.td =================================================================== --- lib/Target/R600/AMDGPU.td +++ lib/Target/R600/AMDGPU.td @@ -25,6 +25,11 @@ "false", "Disable IR Structurizer">; +def FeaturePromoteAlloca : SubtargetFeature <"promote-alloca", + "EnablePromoteAlloca", + "true", + "Enable promote alloca pass">; + // Target features def FeatureIfCvt : SubtargetFeature <"disable-ifcvt", Index: lib/Target/R600/AMDGPUSubtarget.h =================================================================== --- lib/Target/R600/AMDGPUSubtarget.h +++ lib/Target/R600/AMDGPUSubtarget.h @@ -52,6 +52,7 @@ bool FP64; bool CaymanISA; bool EnableIRStructurizer; + bool EnablePromoteAlloca; bool EnableIfCvt; unsigned WavefrontSize; bool CFALUBug; @@ -81,7 +82,7 @@ } short getTexVTXClauseSize() const { - return TexVTXClauseSize; + return TexVTXClauseSize; } Generation getGeneration() const { @@ -129,6 +130,10 @@ return EnableIRStructurizer; } + bool isPromoteAllocaEnabled() const { + return EnablePromoteAlloca; + } + bool isIfCvtEnabled() const { return EnableIfCvt; } Index: lib/Target/R600/AMDGPUSubtarget.cpp =================================================================== --- lib/Target/R600/AMDGPUSubtarget.cpp +++ lib/Target/R600/AMDGPUSubtarget.cpp @@ -16,6 +16,8 @@ #include "R600InstrInfo.h" #include "SIInstrInfo.h" +#include "llvm/ADT/SmallString.h" + using namespace llvm; #define DEBUG_TYPE "amdgpu-subtarget" @@ -37,12 +39,17 @@ FP64(false), CaymanISA(false), EnableIRStructurizer(true), + EnablePromoteAlloca(false), EnableIfCvt(true), WavefrontSize(0), CFALUBug(false), LocalMemorySize(0), InstrItins(getInstrItineraryForCPU(GPU)) { - ParseSubtargetFeatures(GPU, FS); + + SmallString<256> FullFS("+promote-alloca,"); + FullFS += FS; + + ParseSubtargetFeatures(GPU, FullFS); if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { InstrInfo.reset(new R600InstrInfo(*this)); Index: lib/Target/R600/AMDGPUTargetMachine.cpp =================================================================== --- lib/Target/R600/AMDGPUTargetMachine.cpp +++ lib/Target/R600/AMDGPUTargetMachine.cpp @@ -33,7 +33,6 @@ #include "llvm/Transforms/Scalar.h" #include - using namespace llvm; extern "C" void LLVMInitializeR600Target() { @@ -137,8 +136,11 @@ void AMDGPUPassConfig::addCodeGenPrepare() { const AMDGPUSubtarget &ST = TM->getSubtarget(); - addPass(createAMDGPUPromoteAlloca(ST)); - addPass(createSROAPass()); + if (ST.isPromoteAllocaEnabled()) { + addPass(createAMDGPUPromoteAlloca(ST)); + addPass(createSROAPass()); + } + TargetPassConfig::addCodeGenPrepare(); }