Index: lib/CodeGen/CGDecl.cpp =================================================================== --- lib/CodeGen/CGDecl.cpp +++ lib/CodeGen/CGDecl.cpp @@ -969,8 +969,8 @@ if (auto *C = dyn_cast(VlaSize.NumElts)) Dimensions.emplace_back(C, Type1D.getUnqualifiedType()); else { - auto SizeExprAddr = - CreateDefaultAlignTempAlloca(VlaSize.NumElts->getType(), "vla_expr"); + auto SizeExprAddr = CreateDefaultAlignTempAlloca( + VlaSize.NumElts->getType(), "__vla_expr"); Builder.CreateStore(VlaSize.NumElts, SizeExprAddr); Dimensions.emplace_back(SizeExprAddr.getPointer(), Type1D.getUnqualifiedType()); @@ -999,6 +999,7 @@ getContext(), const_cast(D.getDeclContext()), D.getLocation(), D.getLocation(), &NameIdent, QT, getContext().CreateTypeSourceInfo(QT), SC_Auto); + ArtificialDecl->setImplicit(); MD = DI->EmitDeclareOfAutoVariable(ArtificialDecl, VlaSize.NumElts, Builder); Index: test/CodeGen/debug-info-vla.c =================================================================== --- test/CodeGen/debug-info-vla.c +++ test/CodeGen/debug-info-vla.c @@ -2,9 +2,9 @@ void testVLAwithSize(int s) { -// CHECK-DAG: dbg.declare({{.*}} %vla_expr, metadata ![[VLAEXPR:[0-9]+]] +// CHECK-DAG: dbg.declare({{.*}} %__vla_expr, metadata ![[VLAEXPR:[0-9]+]] // CHECK-DAG: dbg.declare({{.*}} %vla, metadata ![[VAR:[0-9]+]] -// CHECK-DAG: ![[VLAEXPR]] = !DILocalVariable(name: "vla_expr" +// CHECK-DAG: ![[VLAEXPR]] = !DILocalVariable(name: "__vla_expr", {{.*}} flags: DIFlagArtificial // CHECK-DAG: ![[VAR]] = !DILocalVariable(name: "vla",{{.*}} line: [[@LINE+2]] // CHECK-DAG: !DISubrange(count: ![[VLAEXPR]]) int vla[s]; Index: test/CodeGenCXX/debug-info-vla.cpp =================================================================== --- test/CodeGenCXX/debug-info-vla.cpp +++ test/CodeGenCXX/debug-info-vla.cpp @@ -13,7 +13,7 @@ // CHECK: [[ELEM_TYPE]] = !{[[NOCOUNT:.*]]} // CHECK: [[NOCOUNT]] = !DISubrange(count: -1) // -// CHECK: [[VAR:![0-9]+]] = !DILocalVariable(name: "vla_expr" +// CHECK: [[VAR:![0-9]+]] = !DILocalVariable(name: "__vla_expr", {{.*}}flags: DIFlagArtificial // CHECK: !DICompositeType(tag: DW_TAG_array_type, // CHECK-NOT: size: // CHECK-SAME: elements: [[ELEM_TYPE:![0-9]+]] Index: test/OpenMP/target_codegen.cpp =================================================================== --- test/OpenMP/target_codegen.cpp +++ test/OpenMP/target_codegen.cpp @@ -511,7 +511,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]], Index: test/OpenMP/target_parallel_codegen.cpp =================================================================== --- test/OpenMP/target_parallel_codegen.cpp +++ test/OpenMP/target_parallel_codegen.cpp @@ -528,7 +528,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]], Index: test/OpenMP/target_parallel_for_codegen.cpp =================================================================== --- test/OpenMP/target_parallel_for_codegen.cpp +++ test/OpenMP/target_parallel_for_codegen.cpp @@ -555,7 +555,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]], Index: test/OpenMP/target_parallel_for_simd_codegen.cpp =================================================================== --- test/OpenMP/target_parallel_for_simd_codegen.cpp +++ test/OpenMP/target_parallel_for_simd_codegen.cpp @@ -555,7 +555,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]], Index: test/OpenMP/target_simd_codegen.cpp =================================================================== --- test/OpenMP/target_simd_codegen.cpp +++ test/OpenMP/target_simd_codegen.cpp @@ -478,7 +478,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]], Index: test/OpenMP/target_teams_codegen.cpp =================================================================== --- test/OpenMP/target_teams_codegen.cpp +++ test/OpenMP/target_teams_codegen.cpp @@ -553,7 +553,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]], Index: test/OpenMP/target_teams_distribute_codegen.cpp =================================================================== --- test/OpenMP/target_teams_distribute_codegen.cpp +++ test/OpenMP/target_teams_distribute_codegen.cpp @@ -564,7 +564,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]], Index: test/OpenMP/target_teams_distribute_simd_codegen.cpp =================================================================== --- test/OpenMP/target_teams_distribute_simd_codegen.cpp +++ test/OpenMP/target_teams_distribute_simd_codegen.cpp @@ -553,7 +553,7 @@ // CHECK-64: store i32 %{{.+}}, i32* [[B_ADDR]], // CHECK-64: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_CADDR]], -// CHECK-32: store i32 %{{.+}}, i32* %vla_expr +// CHECK-32: store i32 %{{.+}}, i32* %__vla_expr // CHECK-32: store i32 %{{.+}}, i32* [[B_ADDR:%.+]], // CHECK-32: [[B_CVAL:%.+]] = load i[[SZ]], i[[SZ]]* [[B_ADDR]],