Index: include/llvm/Support/TargetParser.h
===================================================================
--- include/llvm/Support/TargetParser.h
+++ include/llvm/Support/TargetParser.h
@@ -18,6 +18,7 @@
 // FIXME: vector is used because that's what clang uses for subtarget feature
 // lists, but SmallVector would probably be better
 #include "llvm/ADT/Triple.h"
+#include "llvm/ADT/SmallString.h"
 #include <vector>
 
 namespace llvm {
@@ -137,6 +138,7 @@
 ArchKind parseArch(StringRef Arch);
 unsigned parseArchExt(StringRef ArchExt);
 ArchKind parseCPUArch(StringRef CPU);
+void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
 ISAKind parseArchISA(StringRef Arch);
 EndianKind parseArchEndian(StringRef Arch);
 ProfileKind parseArchProfile(StringRef Arch);
@@ -205,6 +207,7 @@
 AArch64::ArchKind parseArch(StringRef Arch);
 ArchExtKind parseArchExt(StringRef ArchExt);
 ArchKind parseCPUArch(StringRef CPU);
+void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
 ARM::ISAKind parseArchISA(StringRef Arch);
 ARM::EndianKind parseArchEndian(StringRef Arch);
 ARM::ProfileKind parseArchProfile(StringRef Arch);
Index: lib/Support/TargetParser.cpp
===================================================================
--- lib/Support/TargetParser.cpp
+++ lib/Support/TargetParser.cpp
@@ -689,6 +689,20 @@
   return ARM::ArchKind::INVALID;
 }
 
+void llvm::ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
+#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
+  if (ARM::ArchKind::ID != ARM::ArchKind::INVALID)                             \
+    Values.emplace_back(NAME);
+#include "llvm/Support/ARMTargetParser.def"
+}
+
+void llvm::AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
+#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)       \
+  if (AArch64::ArchKind::ID != AArch64::ArchKind::INVALID)                     \
+    Values.emplace_back(NAME);
+#include "llvm/Support/AArch64TargetParser.def"
+}
+
 // ARM, Thumb, AArch64
 ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
   return StringSwitch<ARM::ISAKind>(Arch)