Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -17605,10 +17605,11 @@
     if (AndRHSVal == 1 && AndLHS.getOpcode() == ISD::SRL) {
       LHS = AndLHS.getOperand(0);
       RHS = AndLHS.getOperand(1);
-    }
-
-    // Use BT if the immediate can't be encoded in a TEST instruction.
-    if (!isUInt<32>(AndRHSVal) && isPowerOf2_64(AndRHSVal)) {
+    } else if (AndRHSVal > 1 && isPowerOf2_64(AndRHSVal) &&
+               (!isUInt<32>(AndRHSVal) || AndLHS.getValueType() != MVT::i8)) {
+      // We transform iff if the immediate can't be encoded in a TEST
+      // instruction or if the BT instruction do not require the addition
+      // of an any_extend.
       LHS = AndLHS;
       RHS = DAG.getConstant(Log2_64_Ceil(AndRHSVal), dl, LHS.getValueType());
     }
Index: test/CodeGen/X86/and-sink.ll
===================================================================
--- test/CodeGen/X86/and-sink.ll
+++ test/CodeGen/X86/and-sink.ll
@@ -15,8 +15,8 @@
 ; CHECK-NEXT:  # %bb.1: # %bb0
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl $0, A
-; CHECK-NEXT:    testb $4, %al
-; CHECK-NEXT:    jne .LBB0_3
+; CHECK-NEXT:    btl $2, %eax
+; CHECK-NEXT:    jb .LBB0_3
 ; CHECK-NEXT:  # %bb.2: # %bb1
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
@@ -62,8 +62,8 @@
 ; CHECK-NEXT:  # %bb.3: # %bb1
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    movl $0, C
-; CHECK-NEXT:    testb $4, %cl
-; CHECK-NEXT:    jne .LBB1_2
+; CHECK-NEXT:    btl $2, %ecx
+; CHECK-NEXT:    jb .LBB1_2
 ; CHECK-NEXT:  # %bb.4: # %bb2
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
Index: test/CodeGen/X86/and-su.ll
===================================================================
--- test/CodeGen/X86/and-su.ll
+++ test/CodeGen/X86/and-su.ll
@@ -42,8 +42,8 @@
 ; CHECK-NEXT:  .LBB1_2: # %bb11
 ; CHECK-NEXT:    fchs
 ; CHECK-NEXT:  .LBB1_3: # %bb13
-; CHECK-NEXT:    testb $2, %cl
-; CHECK-NEXT:    je .LBB1_5
+; CHECK-NEXT:    btl $1, %ecx
+; CHECK-NEXT:    jae .LBB1_5
 ; CHECK-NEXT:  # %bb.4: # %bb14
 ; CHECK-NEXT:    fxch %st(1)
 ; CHECK-NEXT:    fchs
Index: test/CodeGen/X86/avx512-cmp.ll
===================================================================
--- test/CodeGen/X86/avx512-cmp.ll
+++ test/CodeGen/X86/avx512-cmp.ll
@@ -14,7 +14,6 @@
 ; ALL-NEXT:  LBB0_2: ## %l2
 ; ALL-NEXT:    vaddsd %xmm1, %xmm0, %xmm0
 ; ALL-NEXT:    retq
-; ALL-NEXT:    ## -- End function
   %tobool = fcmp une double %a, %b
   br i1 %tobool, label %l1, label %l2
 
@@ -37,7 +36,6 @@
 ; ALL-NEXT:  LBB1_2: ## %l2
 ; ALL-NEXT:    vaddss %xmm1, %xmm0, %xmm0
 ; ALL-NEXT:    retq
-; ALL-NEXT:    ## -- End function
   %tobool = fcmp olt float %a, %b
   br i1 %tobool, label %l1, label %l2
 
Index: test/CodeGen/X86/btq.ll
===================================================================
--- test/CodeGen/X86/btq.ll
+++ test/CodeGen/X86/btq.ll
@@ -27,8 +27,8 @@
 define void @test2(i64 %foo) nounwind {
 ; CHECK-LABEL: test2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    testl $-2147483648, %edi # imm = 0x80000000
-; CHECK-NEXT:    jne .LBB1_2
+; CHECK-NEXT:    btl $31, %edi
+; CHECK-NEXT:    jb .LBB1_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB1_2: # %if.then
Index: test/CodeGen/X86/select.ll
===================================================================
--- test/CodeGen/X86/select.ll
+++ test/CodeGen/X86/select.ll
@@ -655,7 +655,7 @@
 ; MCU-NEXT:    movl %edi, %edx
 ; MCU-NEXT:    pushl $0
 ; MCU-NEXT:    pushl $4
-; MCU-NEXT:    calll __udivdi3
+; MCU-NEXT:    calll __udivdi3@PLT
 ; MCU-NEXT:    addl $8, %esp
 ; MCU-NEXT:    xorl %ebx, %edx
 ; MCU-NEXT:    xorl %ebp, %eax
Index: test/CodeGen/X86/test-shrink.ll
===================================================================
--- test/CodeGen/X86/test-shrink.ll
+++ test/CodeGen/X86/test-shrink.ll
@@ -48,8 +48,8 @@
 define void @g64xl(i64 inreg %x) nounwind {
 ; CHECK-LINUX64-LABEL: g64xl:
 ; CHECK-LINUX64:       # %bb.0:
-; CHECK-LINUX64-NEXT:    testb $8, %dil
-; CHECK-LINUX64-NEXT:    jne .LBB1_2
+; CHECK-LINUX64-NEXT:    btl $3, %edi
+; CHECK-LINUX64-NEXT:    jb .LBB1_2
 ; CHECK-LINUX64-NEXT:  # %bb.1: # %yes
 ; CHECK-LINUX64-NEXT:    pushq %rax
 ; CHECK-LINUX64-NEXT:    callq bar
@@ -60,8 +60,8 @@
 ; CHECK-WIN32-64-LABEL: g64xl:
 ; CHECK-WIN32-64:       # %bb.0:
 ; CHECK-WIN32-64-NEXT:    subq $40, %rsp
-; CHECK-WIN32-64-NEXT:    testb $8, %cl
-; CHECK-WIN32-64-NEXT:    jne .LBB1_2
+; CHECK-WIN32-64-NEXT:    btl $3, %ecx
+; CHECK-WIN32-64-NEXT:    jb .LBB1_2
 ; CHECK-WIN32-64-NEXT:  # %bb.1: # %yes
 ; CHECK-WIN32-64-NEXT:    callq bar
 ; CHECK-WIN32-64-NEXT:  .LBB1_2: # %no
@@ -70,8 +70,8 @@
 ;
 ; CHECK-X86-LABEL: g64xl:
 ; CHECK-X86:       # %bb.0:
-; CHECK-X86-NEXT:    testb $8, %al
-; CHECK-X86-NEXT:    jne .LBB1_2
+; CHECK-X86-NEXT:    btl $3, %eax
+; CHECK-X86-NEXT:    jb .LBB1_2
 ; CHECK-X86-NEXT:  # %bb.1: # %yes
 ; CHECK-X86-NEXT:    calll bar
 ; CHECK-X86-NEXT:  .LBB1_2: # %no
@@ -132,8 +132,8 @@
 define void @g32xl(i32 inreg %x) nounwind {
 ; CHECK-LINUX64-LABEL: g32xl:
 ; CHECK-LINUX64:       # %bb.0:
-; CHECK-LINUX64-NEXT:    testb $8, %dil
-; CHECK-LINUX64-NEXT:    jne .LBB3_2
+; CHECK-LINUX64-NEXT:    btl $3, %edi
+; CHECK-LINUX64-NEXT:    jb .LBB3_2
 ; CHECK-LINUX64-NEXT:  # %bb.1: # %yes
 ; CHECK-LINUX64-NEXT:    pushq %rax
 ; CHECK-LINUX64-NEXT:    callq bar
@@ -144,8 +144,8 @@
 ; CHECK-WIN32-64-LABEL: g32xl:
 ; CHECK-WIN32-64:       # %bb.0:
 ; CHECK-WIN32-64-NEXT:    subq $40, %rsp
-; CHECK-WIN32-64-NEXT:    testb $8, %cl
-; CHECK-WIN32-64-NEXT:    jne .LBB3_2
+; CHECK-WIN32-64-NEXT:    btl $3, %ecx
+; CHECK-WIN32-64-NEXT:    jb .LBB3_2
 ; CHECK-WIN32-64-NEXT:  # %bb.1: # %yes
 ; CHECK-WIN32-64-NEXT:    callq bar
 ; CHECK-WIN32-64-NEXT:  .LBB3_2: # %no
@@ -154,8 +154,8 @@
 ;
 ; CHECK-X86-LABEL: g32xl:
 ; CHECK-X86:       # %bb.0:
-; CHECK-X86-NEXT:    testb $8, %al
-; CHECK-X86-NEXT:    jne .LBB3_2
+; CHECK-X86-NEXT:    btl $3, %eax
+; CHECK-X86-NEXT:    jb .LBB3_2
 ; CHECK-X86-NEXT:  # %bb.1: # %yes
 ; CHECK-X86-NEXT:    calll bar
 ; CHECK-X86-NEXT:  .LBB3_2: # %no
@@ -216,8 +216,8 @@
 define void @g16xl(i16 inreg %x) nounwind {
 ; CHECK-LINUX64-LABEL: g16xl:
 ; CHECK-LINUX64:       # %bb.0:
-; CHECK-LINUX64-NEXT:    testb $8, %dil
-; CHECK-LINUX64-NEXT:    jne .LBB5_2
+; CHECK-LINUX64-NEXT:    btl $3, %edi
+; CHECK-LINUX64-NEXT:    jb .LBB5_2
 ; CHECK-LINUX64-NEXT:  # %bb.1: # %yes
 ; CHECK-LINUX64-NEXT:    pushq %rax
 ; CHECK-LINUX64-NEXT:    callq bar
@@ -228,8 +228,8 @@
 ; CHECK-WIN32-64-LABEL: g16xl:
 ; CHECK-WIN32-64:       # %bb.0:
 ; CHECK-WIN32-64-NEXT:    subq $40, %rsp
-; CHECK-WIN32-64-NEXT:    testb $8, %cl
-; CHECK-WIN32-64-NEXT:    jne .LBB5_2
+; CHECK-WIN32-64-NEXT:    btl $3, %ecx
+; CHECK-WIN32-64-NEXT:    jb .LBB5_2
 ; CHECK-WIN32-64-NEXT:  # %bb.1: # %yes
 ; CHECK-WIN32-64-NEXT:    callq bar
 ; CHECK-WIN32-64-NEXT:  .LBB5_2: # %no
@@ -238,8 +238,8 @@
 ;
 ; CHECK-X86-LABEL: g16xl:
 ; CHECK-X86:       # %bb.0:
-; CHECK-X86-NEXT:    testb $8, %al
-; CHECK-X86-NEXT:    jne .LBB5_2
+; CHECK-X86-NEXT:    btl $3, %eax
+; CHECK-X86-NEXT:    jb .LBB5_2
 ; CHECK-X86-NEXT:  # %bb.1: # %yes
 ; CHECK-X86-NEXT:    calll bar
 ; CHECK-X86-NEXT:  .LBB5_2: # %no
Index: test/CodeGen/X86/testb-je-fusion.ll
===================================================================
--- test/CodeGen/X86/testb-je-fusion.ll
+++ test/CodeGen/X86/testb-je-fusion.ll
@@ -6,10 +6,9 @@
 define i32 @check_flag(i32 %flags, ...) nounwind {
 ; CHECK-LABEL: check_flag:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movl %edi, %ecx
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    testb $2, %ch
-; CHECK-NEXT:    je .LBB0_2
+; CHECK-NEXT:    btl $9, %edi
+; CHECK-NEXT:    jae .LBB0_2
 ; CHECK-NEXT:  # %bb.1: # %if.then
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:  .LBB0_2: # %if.end
Index: test/CodeGen/X86/use-add-flags.ll
===================================================================
--- test/CodeGen/X86/use-add-flags.ll
+++ test/CodeGen/X86/use-add-flags.ll
@@ -36,8 +36,8 @@
 define void @test2(i32 %x) nounwind {
 ; LNX-LABEL: test2:
 ; LNX:       # %bb.0:
-; LNX-NEXT:    testb $16, %dil
-; LNX-NEXT:    jne .LBB1_2
+; LNX-NEXT:    btl $4, %edi
+; LNX-NEXT:    jb .LBB1_2
 ; LNX-NEXT:  # %bb.1: # %true
 ; LNX-NEXT:    pushq %rax
 ; LNX-NEXT:    callq foo
@@ -48,8 +48,8 @@
 ; WIN-LABEL: test2:
 ; WIN:       # %bb.0:
 ; WIN-NEXT:    subq $40, %rsp
-; WIN-NEXT:    testb $16, %cl
-; WIN-NEXT:    jne .LBB1_2
+; WIN-NEXT:    btl $4, %ecx
+; WIN-NEXT:    jb .LBB1_2
 ; WIN-NEXT:  # %bb.1: # %true
 ; WIN-NEXT:    callq foo
 ; WIN-NEXT:  .LBB1_2: # %false
Index: test/CodeGen/X86/vastart-defs-eflags.ll
===================================================================
--- test/CodeGen/X86/vastart-defs-eflags.ll
+++ test/CodeGen/X86/vastart-defs-eflags.ll
@@ -8,9 +8,7 @@
 define i32 @check_flag(i32 %flags, ...) nounwind {
 ; CHECK-LABEL: check_flag:
 ; CHECK:       ## %bb.0: ## %entry
-; CHECK-NEXT:    pushq %rbx
-; CHECK-NEXT:    subq $48, %rsp
-; CHECK-NEXT:    movl %edi, %ebx
+; CHECK-NEXT:    subq $56, %rsp
 ; CHECK-NEXT:    testb %al, %al
 ; CHECK-NEXT:    je LBB0_2
 ; CHECK-NEXT:  ## %bb.1: ## %entry
@@ -29,8 +27,8 @@
 ; CHECK-NEXT:    movq %rdx, -{{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    movq %rsi, -{{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    testb $2, %bh
-; CHECK-NEXT:    je LBB0_4
+; CHECK-NEXT:    btl $9, %edi
+; CHECK-NEXT:    jae LBB0_4
 ; CHECK-NEXT:  ## %bb.3: ## %if.then
 ; CHECK-NEXT:    leaq -{{[0-9]+}}(%rsp), %rax
 ; CHECK-NEXT:    movq %rax, 16
@@ -40,8 +38,7 @@
 ; CHECK-NEXT:    movl $8, 0
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:  LBB0_4: ## %if.end
-; CHECK-NEXT:    addq $48, %rsp
-; CHECK-NEXT:    popq %rbx
+; CHECK-NEXT:    addq $56, %rsp
 ; CHECK-NEXT:    retq
 entry:
   %and = and i32 %flags, 512