Index: lib/CodeGen/MIRParser/MILexer.h =================================================================== --- lib/CodeGen/MIRParser/MILexer.h +++ lib/CodeGen/MIRParser/MILexer.h @@ -93,6 +93,7 @@ kw_non_temporal, kw_invariant, kw_align, + kw_addrspace, kw_stack, kw_got, kw_jump_table, Index: lib/CodeGen/MIRParser/MILexer.cpp =================================================================== --- lib/CodeGen/MIRParser/MILexer.cpp +++ lib/CodeGen/MIRParser/MILexer.cpp @@ -242,6 +242,7 @@ .Case("dereferenceable", MIToken::kw_dereferenceable) .Case("invariant", MIToken::kw_invariant) .Case("align", MIToken::kw_align) + .Case("addrspace", MIToken::kw_addrspace) .Case("stack", MIToken::kw_stack) .Case("got", MIToken::kw_got) .Case("jump-table", MIToken::kw_jump_table) Index: lib/CodeGen/MIRParser/MIParser.cpp =================================================================== --- lib/CodeGen/MIRParser/MIParser.cpp +++ lib/CodeGen/MIRParser/MIParser.cpp @@ -228,6 +228,7 @@ Optional &TiedDefIdx); bool parseOffset(int64_t &Offset); bool parseAlignment(unsigned &Alignment); + bool parseAddrspace(unsigned &Addrspace); bool parseOperandsOffset(MachineOperand &Op); bool parseIRValue(const Value *&V); bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags); @@ -2094,6 +2095,17 @@ return false; } +bool MIParser::parseAddrspace(unsigned &Addrspace) { + assert(Token.is(MIToken::kw_addrspace)); + lex(); + if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned()) + return error("expected an integer literal after 'addrspace'"); + if (getUnsigned(Addrspace)) + return true; + lex(); + return false; +} + bool MIParser::parseOperandsOffset(MachineOperand &Op) { int64_t Offset = 0; if (parseOffset(Offset)) @@ -2405,6 +2417,10 @@ if (parseAlignment(BaseAlignment)) return true; break; + case MIToken::kw_addrspace: + if (parseAddrspace(Ptr.AddrSpace)) + return true; + break; case MIToken::md_tbaa: lex(); if (parseMDNode(AAInfo.TBAA)) Index: test/CodeGen/MIR/AArch64/addrspace-memoperands.mir =================================================================== --- /dev/null +++ test/CodeGen/MIR/AArch64/addrspace-memoperands.mir @@ -0,0 +1,31 @@ +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s + +--- | + + define void @addrspace_memoperands() { + ret void + } + +... +--- +name: addrspace_memoperands +body: | + bb.0: + + ; CHECK-LABEL: name: addrspace_memoperands + ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY %x0 + ; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 8, addrspace 1) + ; CHECK: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 4, align 2, addrspace 3) + ; CHECK: G_STORE [[LOAD]](s64), [[COPY]](p0) :: (store 8, addrspace 1) + ; CHECK: G_STORE [[LOAD1]](s32), [[COPY]](p0) :: (store 4, align 2, addrspace 3) + ; CHECK: G_STORE [[LOAD1]](s32), [[COPY]](p0) :: (store 4) + ; CHECK: RET_ReallyLR + %0:_(p0) = COPY %x0 + %1:_(s64) = G_LOAD %0(p0) :: (load 8, addrspace 1) + %2:_(s32) = G_LOAD %0(p0) :: (load 4, align 2, addrspace 3) + G_STORE %1(s64), %0(p0) :: (store 8, addrspace 1) + G_STORE %2(s32), %0(p0) :: (store 4, align 2, addrspace 3) + ; addrspace 0 is accepted by the parser but not printed + G_STORE %2(s32), %0(p0) :: (store 4, addrspace 0) + RET_ReallyLR +...