Index: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
@@ -949,7 +949,7 @@
   setOperationAction(ISD::STACKSAVE,          MVT::Other, Expand);
   setOperationAction(ISD::STACKRESTORE,       MVT::Other, Expand);
 
-  if (Subtarget->getTargetTriple().isWindowsItaniumEnvironment())
+  if (Subtarget->isTargetWindows())
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
   else
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
@@ -7956,7 +7956,7 @@
   case ISD::SDIVREM:
   case ISD::UDIVREM:       return LowerDivRem(Op, DAG);
   case ISD::DYNAMIC_STACKALLOC:
-    if (Subtarget->getTargetTriple().isWindowsItaniumEnvironment())
+    if (Subtarget->isTargetWindows())
       return LowerDYNAMIC_STACKALLOC(Op, DAG);
     llvm_unreachable("Don't know how to custom lower this!");
   case ISD::FP_ROUND: return LowerFP_ROUND(Op, DAG);
Index: llvm/trunk/test/CodeGen/ARM/Windows/alloca.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/Windows/alloca.ll
+++ llvm/trunk/test/CodeGen/ARM/Windows/alloca.ll
@@ -1,4 +1,6 @@
 ; RUN: llc -O0 -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
+; RUN: llc -O0 -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
+; RUN: llc -O0 -mtriple thumbv7-windows-mingw32 -filetype asm -o - %s | FileCheck %s
 
 declare arm_aapcs_vfpcc i32 @num_entries()
 
Index: llvm/trunk/test/CodeGen/ARM/Windows/vla.ll
===================================================================
--- llvm/trunk/test/CodeGen/ARM/Windows/vla.ll
+++ llvm/trunk/test/CodeGen/ARM/Windows/vla.ll
@@ -3,7 +3,7 @@
 ; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -code-model=large -o - %s \
 ; RUN:  | FileCheck %s -check-prefix CHECK-LARGE-CODE
 ; RUN: llc -mtriple=thumbv7-windows-msvc -mcpu=cortex-a9 -o - %s \
-; RUN:  | FileCheck %s -check-prefix CHECK-MSVC
+; RUN:  | FileCheck %s -check-prefix CHECK-SMALL-CODE
 
 define arm_aapcs_vfpcc i8 @function(i32 %sz, i32 %idx) {
 entry:
@@ -26,6 +26,3 @@
 ; CHECK-LARGE-CODE:   movt  [[IP]], :upper16:__chkstk
 ; CHECK-LARGE-CODE:   blx   [[IP]]
 ; CHECK-LARGE-CODE:   sub.w sp, sp, r4
-
-; CHECK-MSVC-NOT: __chkstk
-