Index: lib/Target/RISCV/RISCVInstrInfoC.td =================================================================== --- lib/Target/RISCV/RISCVInstrInfoC.td +++ lib/Target/RISCV/RISCVInstrInfoC.td @@ -188,8 +188,8 @@ let Inst{5} = imm{3}; } -def C_FLD : CLoad_ri<0b001, "c.fld", FPR64C, uimm8_lsb000>, - Requires<[HasStdExtD]> { +let Predicates = [HasStdExtC, HasStdExtD] in +def C_FLD : CLoad_ri<0b001, "c.fld", FPR64C, uimm8_lsb000> { bits<8> imm; let Inst{12-10} = imm{5-3}; let Inst{6-5} = imm{7-6}; @@ -202,24 +202,24 @@ let Inst{5} = imm{6}; } -let DecoderNamespace = "RISCV32Only_" in -def C_FLW : CLoad_ri<0b011, "c.flw", FPR32C, uimm7_lsb00>, - Requires<[HasStdExtF, IsRV32]> { +let DecoderNamespace = "RISCV32Only_", + Predicates = [HasStdExtC, HasStdExtF, IsRV32] in +def C_FLW : CLoad_ri<0b011, "c.flw", FPR32C, uimm7_lsb00> { bits<7> imm; let Inst{12-10} = imm{5-3}; let Inst{6} = imm{2}; let Inst{5} = imm{6}; } -def C_LD : CLoad_ri<0b011, "c.ld", GPRC, uimm8_lsb000>, - Requires<[IsRV64]> { +let Predicates = [HasStdExtC, IsRV64] in +def C_LD : CLoad_ri<0b011, "c.ld", GPRC, uimm8_lsb000> { bits<8> imm; let Inst{12-10} = imm{5-3}; let Inst{6-5} = imm{7-6}; } -def C_FSD : CStore_rri<0b101, "c.fsd", FPR64C, uimm8_lsb000>, - Requires<[HasStdExtD]> { +let Predicates = [HasStdExtC, HasStdExtD] in +def C_FSD : CStore_rri<0b101, "c.fsd", FPR64C, uimm8_lsb000> { bits<8> imm; let Inst{12-10} = imm{5-3}; let Inst{6-5} = imm{7-6}; @@ -232,17 +232,17 @@ let Inst{5} = imm{6}; } -let DecoderNamespace = "RISCV32Only_" in -def C_FSW : CStore_rri<0b111, "c.fsw", FPR32C, uimm7_lsb00>, - Requires<[HasStdExtF, IsRV32]> { +let DecoderNamespace = "RISCV32Only_", + Predicates = [HasStdExtC, HasStdExtF, IsRV32] in +def C_FSW : CStore_rri<0b111, "c.fsw", FPR32C, uimm7_lsb00> { bits<7> imm; let Inst{12-10} = imm{5-3}; let Inst{6} = imm{2}; let Inst{5} = imm{6}; } -def C_SD : CStore_rri<0b111, "c.sd", GPRC, uimm8_lsb000>, - Requires<[IsRV64]> { +let Predicates = [HasStdExtC, IsRV64] in +def C_SD : CStore_rri<0b111, "c.sd", GPRC, uimm8_lsb000> { bits<8> imm; let Inst{12-10} = imm{5-3}; let Inst{6-5} = imm{7-6}; @@ -260,16 +260,16 @@ } let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCall = 1, - DecoderNamespace = "RISCV32Only_", Defs = [X1] in + DecoderNamespace = "RISCV32Only_", Defs = [X1], + Predicates = [HasStdExtC, IsRV32] in def C_JAL : RVInst16CJ<0b001, 0b01, (outs), (ins simm12_lsb0:$offset), - "c.jal", "$offset">, - Requires<[IsRV32]>; + "c.jal", "$offset">; -let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in +let hasSideEffects = 0, mayLoad = 0, mayStore = 0, + Predicates = [HasStdExtC, IsRV64] in def C_ADDIW : RVInst16CI<0b001, 0b01, (outs GPRNoX0:$rd_wb), (ins GPRNoX0:$rd, simm6:$imm), - "c.addiw", "$rd, $imm">, - Requires<[IsRV64]> { + "c.addiw", "$rd, $imm"> { let Constraints = "$rd = $rd_wb"; let Inst{6-2} = imm{4-0}; } @@ -317,8 +317,10 @@ def C_OR : CS_ALU<0b10, "c.or" , GPRC, 0>; def C_AND : CS_ALU<0b11, "c.and", GPRC, 0>; -def C_SUBW : CS_ALU<0b00, "c.subw", GPRC, 1>, Requires<[IsRV64]>; -def C_ADDW : CS_ALU<0b01, "c.addw", GPRC, 1>, Requires<[IsRV64]>; +let Predicates = [HasStdExtC, IsRV64] in { +def C_SUBW : CS_ALU<0b00, "c.subw", GPRC, 1>; +def C_ADDW : CS_ALU<0b01, "c.addw", GPRC, 1>; +} let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in def C_J : RVInst16CJ<0b101, 0b01, (outs), (ins simm12_lsb0:$offset), @@ -339,8 +341,8 @@ let Inst{6-2} = imm{4-0}; } -def C_FLDSP : CStackLoad<0b001, "c.fldsp", FPR64, uimm9_lsb000>, - Requires<[HasStdExtD]> { +let Predicates = [HasStdExtC, HasStdExtD] in +def C_FLDSP : CStackLoad<0b001, "c.fldsp", FPR64, uimm9_lsb000> { let Inst{6-5} = imm{4-3}; let Inst{4-2} = imm{8-6}; } @@ -350,15 +352,15 @@ let Inst{3-2} = imm{7-6}; } -let DecoderNamespace = "RISCV32Only_" in -def C_FLWSP : CStackLoad<0b011, "c.flwsp", FPR32, uimm8_lsb00>, - Requires<[HasStdExtF, IsRV32]> { +let DecoderNamespace = "RISCV32Only_", + Predicates = [HasStdExtC, HasStdExtF, IsRV32] in +def C_FLWSP : CStackLoad<0b011, "c.flwsp", FPR32, uimm8_lsb00> { let Inst{6-4} = imm{4-2}; let Inst{3-2} = imm{7-6}; } -def C_LDSP : CStackLoad<0b011, "c.ldsp", GPRNoX0, uimm9_lsb000>, - Requires<[IsRV64]> { +let Predicates = [HasStdExtC, IsRV64] in +def C_LDSP : CStackLoad<0b011, "c.ldsp", GPRNoX0, uimm9_lsb000> { let Inst{6-5} = imm{4-3}; let Inst{4-2} = imm{8-6}; } @@ -392,8 +394,8 @@ let Constraints = "$rs1 = $rs1_wb"; } -def C_FSDSP : CStackStore<0b101, "c.fsdsp", FPR64, uimm9_lsb000>, - Requires<[HasStdExtD]> { +let Predicates = [HasStdExtC, HasStdExtD] in +def C_FSDSP : CStackStore<0b101, "c.fsdsp", FPR64, uimm9_lsb000> { let Inst{12-10} = imm{5-3}; let Inst{9-7} = imm{8-6}; } @@ -403,15 +405,15 @@ let Inst{8-7} = imm{7-6}; } -let DecoderNamespace = "RISCV32Only_" in -def C_FSWSP : CStackStore<0b111, "c.fswsp", FPR32, uimm8_lsb00>, - Requires<[HasStdExtF, IsRV32]> { +let DecoderNamespace = "RISCV32Only_", + Predicates = [HasStdExtC, HasStdExtF, IsRV32] in +def C_FSWSP : CStackStore<0b111, "c.fswsp", FPR32, uimm8_lsb00> { let Inst{12-9} = imm{5-2}; let Inst{8-7} = imm{7-6}; } -def C_SDSP : CStackStore<0b111, "c.sdsp", GPR, uimm9_lsb000>, - Requires<[IsRV64]> { +let Predicates = [HasStdExtC, IsRV64] in +def C_SDSP : CStackStore<0b111, "c.sdsp", GPR, uimm9_lsb000> { let Inst{12-10} = imm{5-3}; let Inst{9-7} = imm{8-6}; } Index: test/MC/RISCV/rv32c-only-valid.s =================================================================== --- test/MC/RISCV/rv32c-only-valid.s +++ test/MC/RISCV/rv32c-only-valid.s @@ -2,7 +2,14 @@ # RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c -riscv-no-aliases < %s \ # RUN: | llvm-objdump -mattr=+c -d - | FileCheck -check-prefix=CHECK-INST %s +# RUN: not llvm-mc -triple riscv32 \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s +# RUN: not llvm-mc -triple riscv64 -mattr=+c \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s # CHECK-INST: c.jal 2046 # CHECK: encoding: [0xfd,0x2f] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.jal 2046 Index: test/MC/RISCV/rv32dc-valid.s =================================================================== --- test/MC/RISCV/rv32dc-valid.s +++ test/MC/RISCV/rv32dc-valid.s @@ -3,17 +3,27 @@ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+c,+d < %s \ # RUN: | llvm-objdump -mattr=+c,+d -riscv-no-aliases -d - \ # RUN: | FileCheck -check-prefix=CHECK-INST %s +# RUN: not llvm-mc -triple riscv32 -mattr=+c\ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s +# RUN: not llvm-mc -triple riscv32 \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s # CHECK-INST: c.fldsp fs0, 504(sp) # CHECK: encoding: [0x7e,0x34] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.fldsp fs0, 504(sp) # CHECK-INST: c.fsdsp fa7, 504(sp) # CHECK: encoding: [0xc6,0xbf] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.fsdsp fa7, 504(sp) # CHECK-INST: c.fld fa3, 248(a5) # CHECK: encoding: [0xf4,0x3f] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.fld fa3, 248(a5) # CHECK-INST: c.fsd fa2, 248(a1) # CHECK: encoding: [0xf0,0xbd] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.fsd fa2, 248(a1) Index: test/MC/RISCV/rv32fc-valid.s =================================================================== --- test/MC/RISCV/rv32fc-valid.s +++ test/MC/RISCV/rv32fc-valid.s @@ -3,17 +3,31 @@ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+c,+f < %s \ # RUN: | llvm-objdump -mattr=+c,+f -riscv-no-aliases -d - \ # RUN: | FileCheck -check-prefix=CHECK-INST %s +# RUN: not llvm-mc -triple riscv32 -mattr=+c \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s +# RUN: not llvm-mc -triple riscv32 \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s +# RUN: not llvm-mc -triple riscv64 -mattr=+c,+f \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s + # CHECK-INST: c.flwsp fs0, 252(sp) # CHECK: encoding: [0x7e,0x74] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.flwsp fs0, 252(sp) # CHECK-INST: c.fswsp fa7, 252(sp) # CHECK: encoding: [0xc6,0xff] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.fswsp fa7, 252(sp) # CHECK-INST: c.flw fa3, 124(a5) # CHECK: encoding: [0xf4,0x7f] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.flw fa3, 124(a5) # CHECK-INST: c.fsw fa2, 124(a1) # CHECK: encoding: [0xf0,0xfd] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.fsw fa2, 124(a1) Index: test/MC/RISCV/rv64c-valid.s =================================================================== --- test/MC/RISCV/rv64c-valid.s +++ test/MC/RISCV/rv64c-valid.s @@ -3,20 +3,30 @@ # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+c < %s \ # RUN: | llvm-objdump -mattr=+c -riscv-no-aliases -d - \ # RUN: | FileCheck -check-prefix=CHECK-INST %s +# RUN: not llvm-mc -triple riscv64 \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s +# RUN: not llvm-mc -triple riscv32 -mattr=+c\ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s # TODO: more exhaustive testing of immediate encoding. # CHECK-INST: c.ldsp ra, 0(sp) # CHECK: encoding: [0x82,0x60] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.ldsp ra, 0(sp) # CHECK-INST: c.sdsp ra, 504(sp) # CHECK: encoding: [0x86,0xff] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.sdsp ra, 504(sp) # CHECK-INST: c.ld a4, 0(a3) # CHECK: encoding: [0x98,0x62] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.ld a4, 0(a3) # CHECK-INST: c.sd a5, 248(a3) # CHECK: encoding: [0xfc,0xfe] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.sd a5, 248(a3) # CHECK-INST: c.subw a3, a4 @@ -24,17 +34,21 @@ c.subw a3, a4 # CHECK-INST: c.addw a0, a2 # CHECK: encoding: [0x31,0x9d] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.addw a0, a2 # CHECK-INST: c.addiw a3, -32 # CHECK: encoding: [0x81,0x36] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.addiw a3, -32 # CHECK-INST: c.addiw a3, 31 # CHECK: encoding: [0xfd,0x26] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.addiw a3, 31 # CHECK-INST: c.slli s0, 1 # CHECK: encoding: [0x06,0x04] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled c.slli s0, 1 # CHECK-INST: c.srli a3, 63 # CHECK: encoding: [0xfd,0x92] Index: test/MC/RISCV/rv64dc-valid.s =================================================================== --- /dev/null +++ test/MC/RISCV/rv64dc-valid.s @@ -0,0 +1,29 @@ +# RUN: llvm-mc %s -triple=riscv64 -mattr=+c,+d -riscv-no-aliases -show-encoding \ +# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s +# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+c,+d < %s \ +# RUN: | llvm-objdump -mattr=+c,+d -riscv-no-aliases -d - \ +# RUN: | FileCheck -check-prefix=CHECK-INST %s +# RUN: not llvm-mc -triple riscv64 -mattr=+c\ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s +# RUN: not llvm-mc -triple riscv64 \ +# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s + +# CHECK-INST: c.fldsp fs0, 504(sp) +# CHECK: encoding: [0x7e,0x34] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled +c.fldsp fs0, 504(sp) +# CHECK-INST: c.fsdsp fa7, 504(sp) +# CHECK: encoding: [0xc6,0xbf] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled +c.fsdsp fa7, 504(sp) + +# CHECK-INST: c.fld fa3, 248(a5) +# CHECK: encoding: [0xf4,0x3f] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled +c.fld fa3, 248(a5) +# CHECK-INST: c.fsd fa2, 248(a1) +# CHECK: encoding: [0xf0,0xbd] +# CHECK-NO-EXT: error: instruction use requires an option to be enabled +c.fsd fa2, 248(a1)