Index: include/__libunwind_config.h =================================================================== --- include/__libunwind_config.h +++ include/__libunwind_config.h @@ -71,18 +71,33 @@ # define _LIBUNWIND_CURSOR_SIZE 24 # define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K # elif defined(__mips__) -# if defined(_ABIO32) && defined(__mips_soft_float) +# if defined(_ABIO32) # define _LIBUNWIND_TARGET_MIPS_O32 1 -# define _LIBUNWIND_CONTEXT_SIZE 18 -# define _LIBUNWIND_CURSOR_SIZE 24 -# elif defined(_ABIN32) && defined(__mips_soft_float) +# if defined(__mips_hard_float) +# define _LIBUNWIND_CONTEXT_SIZE 50 +# define _LIBUNWIND_CURSOR_SIZE 57 +# else +# define _LIBUNWIND_CONTEXT_SIZE 18 +# define _LIBUNWIND_CURSOR_SIZE 24 +# endif +# elif defined(_ABIN32) # define _LIBUNWIND_TARGET_MIPS_NEWABI 1 -# define _LIBUNWIND_CONTEXT_SIZE 35 -# define _LIBUNWIND_CURSOR_SIZE 42 -# elif defined(_ABI64) && defined(__mips_soft_float) +# if defined(__mips_hard_float) +# define _LIBUNWIND_CONTEXT_SIZE 67 +# define _LIBUNWIND_CURSOR_SIZE 74 +# else +# define _LIBUNWIND_CONTEXT_SIZE 35 +# define _LIBUNWIND_CURSOR_SIZE 42 +# endif +# elif defined(_ABI64) # define _LIBUNWIND_TARGET_MIPS_NEWABI 1 -# define _LIBUNWIND_CONTEXT_SIZE 35 -# define _LIBUNWIND_CURSOR_SIZE 47 +# if defined(__mips_hard_float) +# define _LIBUNWIND_CONTEXT_SIZE 67 +# define _LIBUNWIND_CURSOR_SIZE 79 +# else +# define _LIBUNWIND_CONTEXT_SIZE 35 +# define _LIBUNWIND_CURSOR_SIZE 47 +# endif # else # error "Unsupported MIPS ABI and/or environment" # endif Index: include/libunwind.h =================================================================== --- include/libunwind.h +++ include/libunwind.h @@ -711,6 +711,38 @@ UNW_MIPS_R29 = 29, UNW_MIPS_R30 = 30, UNW_MIPS_R31 = 31, + UNW_MIPS_F0 = 32, + UNW_MIPS_F1 = 33, + UNW_MIPS_F2 = 34, + UNW_MIPS_F3 = 35, + UNW_MIPS_F4 = 36, + UNW_MIPS_F5 = 37, + UNW_MIPS_F6 = 38, + UNW_MIPS_F7 = 39, + UNW_MIPS_F8 = 40, + UNW_MIPS_F9 = 41, + UNW_MIPS_F10 = 42, + UNW_MIPS_F11 = 43, + UNW_MIPS_F12 = 44, + UNW_MIPS_F13 = 45, + UNW_MIPS_F14 = 46, + UNW_MIPS_F15 = 47, + UNW_MIPS_F16 = 48, + UNW_MIPS_F17 = 49, + UNW_MIPS_F18 = 50, + UNW_MIPS_F19 = 51, + UNW_MIPS_F20 = 52, + UNW_MIPS_F21 = 53, + UNW_MIPS_F22 = 54, + UNW_MIPS_F23 = 55, + UNW_MIPS_F24 = 56, + UNW_MIPS_F25 = 57, + UNW_MIPS_F26 = 58, + UNW_MIPS_F27 = 59, + UNW_MIPS_F28 = 60, + UNW_MIPS_F29 = 61, + UNW_MIPS_F30 = 62, + UNW_MIPS_F31 = 63, UNW_MIPS_HI = 64, UNW_MIPS_LO = 65, }; Index: src/Registers.hpp =================================================================== --- src/Registers.hpp +++ src/Registers.hpp @@ -2654,6 +2654,10 @@ }; mips_o32_thread_state_t _registers; +#ifdef __mips_hard_float + uint32_t _padding; + double _floats[32]; +#endif }; inline Registers_mips_o32::Registers_mips_o32(const void *registers) { @@ -2680,7 +2684,7 @@ return true; if (regNum == UNW_MIPS_LO) return true; - // FIXME: Hard float, DSP accumulator registers, MSA registers + // FIXME: DSP accumulator registers, MSA registers return false; } @@ -2724,17 +2728,38 @@ _LIBUNWIND_ABORT("unsupported mips_o32 register"); } -inline bool Registers_mips_o32::validFloatRegister(int /* regNum */) const { +inline bool Registers_mips_o32::validFloatRegister(int regNum) const { +#ifdef __mips_hard_float + if (regNum >= UNW_MIPS_F0 && regNum <= UNW_MIPS_F31) { +#if __mips_fpr == 32 + // Only permit even floating-point registers when using 32-bit + // float-point registers. + if ((regNum - UNW_MIPS_F0) % 2 == 1) + return false; +#endif + return true; + } +#endif return false; } -inline double Registers_mips_o32::getFloatRegister(int /* regNum */) const { +inline double Registers_mips_o32::getFloatRegister(int regNum) const { +#ifdef __mips_hard_float + assert(validFloatRegister(regNum)); + return _floats[regNum - UNW_MIPS_F0]; +#else _LIBUNWIND_ABORT("mips_o32 float support not implemented"); +#endif } -inline void Registers_mips_o32::setFloatRegister(int /* regNum */, - double /* value */) { +inline void Registers_mips_o32::setFloatRegister(int regNum, + double value) { +#ifdef __mips_hard_float + assert(validFloatRegister(regNum)); + _floats[regNum - UNW_MIPS_F0] = value; +#else _LIBUNWIND_ABORT("mips_o32 float support not implemented"); +#endif } inline bool Registers_mips_o32::validVectorRegister(int /* regNum */) const { @@ -2815,6 +2840,70 @@ return "$30"; case UNW_MIPS_R31: return "$31"; + case UNW_MIPS_F0: + return "$f0"; + case UNW_MIPS_F1: + return "$f1"; + case UNW_MIPS_F2: + return "$f2"; + case UNW_MIPS_F3: + return "$f3"; + case UNW_MIPS_F4: + return "$f4"; + case UNW_MIPS_F5: + return "$f5"; + case UNW_MIPS_F6: + return "$f6"; + case UNW_MIPS_F7: + return "$f7"; + case UNW_MIPS_F8: + return "$f8"; + case UNW_MIPS_F9: + return "$f9"; + case UNW_MIPS_F10: + return "$f10"; + case UNW_MIPS_F11: + return "$f11"; + case UNW_MIPS_F12: + return "$f12"; + case UNW_MIPS_F13: + return "$f13"; + case UNW_MIPS_F14: + return "$f14"; + case UNW_MIPS_F15: + return "$f15"; + case UNW_MIPS_F16: + return "$f16"; + case UNW_MIPS_F17: + return "$f17"; + case UNW_MIPS_F18: + return "$f18"; + case UNW_MIPS_F19: + return "$f19"; + case UNW_MIPS_F20: + return "$f20"; + case UNW_MIPS_F21: + return "$f21"; + case UNW_MIPS_F22: + return "$f22"; + case UNW_MIPS_F23: + return "$f23"; + case UNW_MIPS_F24: + return "$f24"; + case UNW_MIPS_F25: + return "$f25"; + case UNW_MIPS_F26: + return "$f26"; + case UNW_MIPS_F27: + return "$f27"; + case UNW_MIPS_F28: + return "$f28"; + case UNW_MIPS_F29: + return "$f29"; + case UNW_MIPS_F30: + return "$f30"; + case UNW_MIPS_F31: + return "$f31"; case UNW_MIPS_HI: return "$hi"; case UNW_MIPS_LO: @@ -2860,6 +2949,9 @@ }; mips_newabi_thread_state_t _registers; +#ifdef __mips_hard_float + double _floats[32]; +#endif }; inline Registers_mips_newabi::Registers_mips_newabi(const void *registers) { @@ -2930,17 +3022,31 @@ _LIBUNWIND_ABORT("unsupported mips_newabi register"); } -inline bool Registers_mips_newabi::validFloatRegister(int /* regNum */) const { +inline bool Registers_mips_newabi::validFloatRegister(int regNum) const { +#ifdef __mips_hard_float + if (regNum >= UNW_MIPS_F0 && regNum <= UNW_MIPS_F31) + return true; +#endif return false; } -inline double Registers_mips_newabi::getFloatRegister(int /* regNum */) const { +inline double Registers_mips_newabi::getFloatRegister(int regNum) const { +#ifdef __mips_hard_float + assert(validFloatRegister(regNum)); + return _floats[regNum - UNW_MIPS_F0]; +#else _LIBUNWIND_ABORT("mips_newabi float support not implemented"); +#endif } -inline void Registers_mips_newabi::setFloatRegister(int /* regNum */, - double /* value */) { +inline void Registers_mips_newabi::setFloatRegister(int regNum, + double value) { +#ifdef __mips_hard_float + assert(validFloatRegister(regNum)); + _floats[regNum - UNW_MIPS_F0] = value; +#else _LIBUNWIND_ABORT("mips_newabi float support not implemented"); +#endif } inline bool Registers_mips_newabi::validVectorRegister(int /* regNum */) const { @@ -3021,6 +3127,70 @@ return "$30"; case UNW_MIPS_R31: return "$31"; + case UNW_MIPS_F0: + return "$f0"; + case UNW_MIPS_F1: + return "$f1"; + case UNW_MIPS_F2: + return "$f2"; + case UNW_MIPS_F3: + return "$f3"; + case UNW_MIPS_F4: + return "$f4"; + case UNW_MIPS_F5: + return "$f5"; + case UNW_MIPS_F6: + return "$f6"; + case UNW_MIPS_F7: + return "$f7"; + case UNW_MIPS_F8: + return "$f8"; + case UNW_MIPS_F9: + return "$f9"; + case UNW_MIPS_F10: + return "$f10"; + case UNW_MIPS_F11: + return "$f11"; + case UNW_MIPS_F12: + return "$f12"; + case UNW_MIPS_F13: + return "$f13"; + case UNW_MIPS_F14: + return "$f14"; + case UNW_MIPS_F15: + return "$f15"; + case UNW_MIPS_F16: + return "$f16"; + case UNW_MIPS_F17: + return "$f17"; + case UNW_MIPS_F18: + return "$f18"; + case UNW_MIPS_F19: + return "$f19"; + case UNW_MIPS_F20: + return "$f20"; + case UNW_MIPS_F21: + return "$f21"; + case UNW_MIPS_F22: + return "$f22"; + case UNW_MIPS_F23: + return "$f23"; + case UNW_MIPS_F24: + return "$f24"; + case UNW_MIPS_F25: + return "$f25"; + case UNW_MIPS_F26: + return "$f26"; + case UNW_MIPS_F27: + return "$f27"; + case UNW_MIPS_F28: + return "$f28"; + case UNW_MIPS_F29: + return "$f29"; + case UNW_MIPS_F30: + return "$f30"; + case UNW_MIPS_F31: + return "$f31"; case UNW_MIPS_HI: return "$hi"; case UNW_MIPS_LO: Index: src/UnwindRegistersRestore.S =================================================================== --- src/UnwindRegistersRestore.S +++ src/UnwindRegistersRestore.S @@ -629,7 +629,7 @@ l.jr r9 l.nop -#elif defined(__mips__) && defined(_ABIO32) && defined(__mips_soft_float) +#elif defined(__mips__) && defined(_ABIO32) // // void libunwind::Registers_mips_o32::jumpto() @@ -642,6 +642,59 @@ .set noat .set noreorder .set nomacro +#ifdef __mips_hard_float +#if __mips_fpr == 32 + l.d $f0, (4 * 36 + 8 * 0)($4) + l.d $f2, (4 * 36 + 8 * 2)($4) + l.d $f4, (4 * 36 + 8 * 4)($4) + l.d $f6, (4 * 36 + 8 * 6)($4) + l.d $f8, (4 * 36 + 8 * 8)($4) + l.d $f10, (4 * 36 + 8 * 10)($4) + l.d $f12, (4 * 36 + 8 * 12)($4) + l.d $f14, (4 * 36 + 8 * 14)($4) + l.d $f16, (4 * 36 + 8 * 16)($4) + l.d $f18, (4 * 36 + 8 * 18)($4) + l.d $f20, (4 * 36 + 8 * 20)($4) + l.d $f22, (4 * 36 + 8 * 22)($4) + l.d $f24, (4 * 36 + 8 * 24)($4) + l.d $f26, (4 * 36 + 8 * 26)($4) + l.d $f28, (4 * 36 + 8 * 28)($4) + l.d $f30, (4 * 36 + 8 * 30)($4) +#else + l.d $f0, (4 * 36 + 8 * 0)($4) + l.d $f1, (4 * 36 + 8 * 1)($4) + l.d $f2, (4 * 36 + 8 * 2)($4) + l.d $f3, (4 * 36 + 8 * 3)($4) + l.d $f4, (4 * 36 + 8 * 4)($4) + l.d $f5, (4 * 36 + 8 * 5)($4) + l.d $f6, (4 * 36 + 8 * 6)($4) + l.d $f7, (4 * 36 + 8 * 7)($4) + l.d $f8, (4 * 36 + 8 * 8)($4) + l.d $f9, (4 * 36 + 8 * 9)($4) + l.d $f10, (4 * 36 + 8 * 10)($4) + l.d $f11, (4 * 36 + 8 * 11)($4) + l.d $f12, (4 * 36 + 8 * 12)($4) + l.d $f13, (4 * 36 + 8 * 13)($4) + l.d $f14, (4 * 36 + 8 * 14)($4) + l.d $f15, (4 * 36 + 8 * 15)($4) + l.d $f16, (4 * 36 + 8 * 16)($4) + l.d $f17, (4 * 36 + 8 * 17)($4) + l.d $f18, (4 * 36 + 8 * 18)($4) + l.d $f19, (4 * 36 + 8 * 19)($4) + l.d $f20, (4 * 36 + 8 * 20)($4) + l.d $f21, (4 * 36 + 8 * 21)($4) + l.d $f22, (4 * 36 + 8 * 22)($4) + l.d $f23, (4 * 36 + 8 * 23)($4) + l.d $f24, (4 * 36 + 8 * 24)($4) + l.d $f25, (4 * 36 + 8 * 25)($4) + l.d $f26, (4 * 36 + 8 * 26)($4) + l.d $f27, (4 * 36 + 8 * 27)($4) + l.d $f28, (4 * 36 + 8 * 28)($4) + l.d $f29, (4 * 36 + 8 * 29)($4) + l.d $f30, (4 * 36 + 8 * 30)($4) + l.d $f31, (4 * 36 + 8 * 31)($4) +#endif +#endif // restore hi and lo lw $8, (4 * 33)($4) mthi $8 @@ -685,8 +738,7 @@ lw $4, (4 * 4)($4) .set pop -#elif defined(__mips__) && (defined(_ABI64) || defined(_ABIN32)) && \ - defined(__mips_soft_float) +#elif defined(__mips__) && (defined(_ABI64) || defined(_ABIN32)) // // void libunwind::Registers_mips_newabi::jumpto() @@ -699,6 +751,40 @@ .set noat .set noreorder .set nomacro +#ifdef __mips_hard_float + l.d $f0, (8 * 35)($4) + l.d $f1, (8 * 36)($4) + l.d $f2, (8 * 37)($4) + l.d $f3, (8 * 38)($4) + l.d $f4, (8 * 39)($4) + l.d $f5, (8 * 40)($4) + l.d $f6, (8 * 41)($4) + l.d $f7, (8 * 42)($4) + l.d $f8, (8 * 43)($4) + l.d $f9, (8 * 44)($4) + l.d $f10, (8 * 45)($4) + l.d $f11, (8 * 46)($4) + l.d $f12, (8 * 47)($4) + l.d $f13, (8 * 48)($4) + l.d $f14, (8 * 49)($4) + l.d $f15, (8 * 50)($4) + l.d $f16, (8 * 51)($4) + l.d $f17, (8 * 52)($4) + l.d $f18, (8 * 53)($4) + l.d $f19, (8 * 54)($4) + l.d $f20, (8 * 55)($4) + l.d $f21, (8 * 56)($4) + l.d $f22, (8 * 57)($4) + l.d $f23, (8 * 58)($4) + l.d $f24, (8 * 59)($4) + l.d $f25, (8 * 60)($4) + l.d $f26, (8 * 61)($4) + l.d $f27, (8 * 62)($4) + l.d $f28, (8 * 63)($4) + l.d $f29, (8 * 64)($4) + l.d $f30, (8 * 65)($4) + l.d $f31, (8 * 66)($4) +#endif // restore hi and lo ld $8, (8 * 33)($4) mthi $8 Index: src/UnwindRegistersSave.S =================================================================== --- src/UnwindRegistersSave.S +++ src/UnwindRegistersSave.S @@ -116,7 +116,7 @@ xorl %eax, %eax # return UNW_ESUCCESS ret -#elif defined(__mips__) && defined(_ABIO32) && defined(__mips_soft_float) +#elif defined(__mips__) && defined(_ABIO32) # # extern int unw_getcontext(unw_context_t* thread_state) @@ -167,13 +167,65 @@ sw $8, (4 * 33)($4) mflo $8 sw $8, (4 * 34)($4) +#ifdef __mips_hard_float +#if __mips_fpr == 32 + s.d $f0, (4 * 36 + 8 * 0)($4) + s.d $f2, (4 * 36 + 8 * 2)($4) + s.d $f4, (4 * 36 + 8 * 4)($4) + s.d $f6, (4 * 36 + 8 * 6)($4) + s.d $f8, (4 * 36 + 8 * 8)($4) + s.d $f10, (4 * 36 + 8 * 10)($4) + s.d $f12, (4 * 36 + 8 * 12)($4) + s.d $f14, (4 * 36 + 8 * 14)($4) + s.d $f16, (4 * 36 + 8 * 16)($4) + s.d $f18, (4 * 36 + 8 * 18)($4) + s.d $f20, (4 * 36 + 8 * 20)($4) + s.d $f22, (4 * 36 + 8 * 22)($4) + s.d $f24, (4 * 36 + 8 * 24)($4) + s.d $f26, (4 * 36 + 8 * 26)($4) + s.d $f28, (4 * 36 + 8 * 28)($4) + s.d $f30, (4 * 36 + 8 * 30)($4) +#else + s.d $f0, (4 * 36 + 8 * 0)($4) + s.d $f1, (4 * 36 + 8 * 1)($4) + s.d $f2, (4 * 36 + 8 * 2)($4) + s.d $f3, (4 * 36 + 8 * 3)($4) + s.d $f4, (4 * 36 + 8 * 4)($4) + s.d $f5, (4 * 36 + 8 * 5)($4) + s.d $f6, (4 * 36 + 8 * 6)($4) + s.d $f7, (4 * 36 + 8 * 7)($4) + s.d $f8, (4 * 36 + 8 * 8)($4) + s.d $f9, (4 * 36 + 8 * 9)($4) + s.d $f10, (4 * 36 + 8 * 10)($4) + s.d $f11, (4 * 36 + 8 * 11)($4) + s.d $f12, (4 * 36 + 8 * 12)($4) + s.d $f13, (4 * 36 + 8 * 13)($4) + s.d $f14, (4 * 36 + 8 * 14)($4) + s.d $f15, (4 * 36 + 8 * 15)($4) + s.d $f16, (4 * 36 + 8 * 16)($4) + s.d $f17, (4 * 36 + 8 * 17)($4) + s.d $f18, (4 * 36 + 8 * 18)($4) + s.d $f19, (4 * 36 + 8 * 19)($4) + s.d $f20, (4 * 36 + 8 * 20)($4) + s.d $f21, (4 * 36 + 8 * 21)($4) + s.d $f22, (4 * 36 + 8 * 22)($4) + s.d $f23, (4 * 36 + 8 * 23)($4) + s.d $f24, (4 * 36 + 8 * 24)($4) + s.d $f25, (4 * 36 + 8 * 25)($4) + s.d $f26, (4 * 36 + 8 * 26)($4) + s.d $f27, (4 * 36 + 8 * 27)($4) + s.d $f28, (4 * 36 + 8 * 28)($4) + s.d $f29, (4 * 36 + 8 * 29)($4) + s.d $f30, (4 * 36 + 8 * 30)($4) + s.d $f31, (4 * 36 + 8 * 31)($4) +#endif +#endif jr $31 # return UNW_ESUCCESS or $2, $0, $0 .set pop -#elif defined(__mips__) && (defined(_ABI64) || defined(_ABIN32)) && \ - defined(__mips_soft_float) +#elif defined(__mips__) && (defined(_ABI64) || defined(_ABIN32)) # # extern int unw_getcontext(unw_context_t* thread_state) @@ -224,6 +276,40 @@ sd $8, (8 * 33)($4) mflo $8 sd $8, (8 * 34)($4) +#ifdef __mips_hard_float + s.d $f0, (8 * 35)($4) + s.d $f1, (8 * 36)($4) + s.d $f2, (8 * 37)($4) + s.d $f3, (8 * 38)($4) + s.d $f4, (8 * 39)($4) + s.d $f5, (8 * 40)($4) + s.d $f6, (8 * 41)($4) + s.d $f7, (8 * 42)($4) + s.d $f8, (8 * 43)($4) + s.d $f9, (8 * 44)($4) + s.d $f10, (8 * 45)($4) + s.d $f11, (8 * 46)($4) + s.d $f12, (8 * 47)($4) + s.d $f13, (8 * 48)($4) + s.d $f14, (8 * 49)($4) + s.d $f15, (8 * 50)($4) + s.d $f16, (8 * 51)($4) + s.d $f17, (8 * 52)($4) + s.d $f18, (8 * 53)($4) + s.d $f19, (8 * 54)($4) + s.d $f20, (8 * 55)($4) + s.d $f21, (8 * 56)($4) + s.d $f22, (8 * 57)($4) + s.d $f23, (8 * 58)($4) + s.d $f24, (8 * 59)($4) + s.d $f25, (8 * 60)($4) + s.d $f26, (8 * 61)($4) + s.d $f27, (8 * 62)($4) + s.d $f28, (8 * 63)($4) + s.d $f29, (8 * 64)($4) + s.d $f30, (8 * 65)($4) + s.d $f31, (8 * 66)($4) +#endif jr $31 # return UNW_ESUCCESS or $2, $0, $0 Index: src/libunwind.cpp =================================================================== --- src/libunwind.cpp +++ src/libunwind.cpp @@ -61,10 +61,9 @@ # define REGISTER_KIND Registers_arm #elif defined(__or1k__) # define REGISTER_KIND Registers_or1k -#elif defined(__mips__) && defined(_ABIO32) && defined(__mips_soft_float) +#elif defined(__mips__) && defined(_ABIO32) # define REGISTER_KIND Registers_mips_o32 -#elif defined(__mips__) && (defined(_ABIN32) || defined(_ABI64)) && \ - defined(__mips_soft_float) +#elif defined(__mips__) && (defined(_ABIN32) || defined(_ABI64)) # define REGISTER_KIND Registers_mips_newabi #elif defined(__mips__) # warning The MIPS architecture is not supported with this ABI and environment!