Index: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -233,7 +233,7 @@
     return Res.getValue(1);
   }
 
-  SDValue Op2 = GetPromotedInteger(N->getOperand(2));
+  SDValue Op2 = ZExtPromotedInteger(N->getOperand(2));
   SDValue Op3 = GetPromotedInteger(N->getOperand(3));
   SDVTList VTs =
       DAG.getVTList(Op2.getValueType(), N->getValueType(1), MVT::Other);
Index: test/CodeGen/ARM/atomic-cmpxchg.ll
===================================================================
--- test/CodeGen/ARM/atomic-cmpxchg.ll
+++ test/CodeGen/ARM/atomic-cmpxchg.ll
@@ -7,7 +7,7 @@
 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -asm-verbose=false -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-ARMV7
 ; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -asm-verbose=false -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-THUMBV7
 
-define zeroext i1 @test_cmpxchg_res_i8(i8* %addr, i8 %desired, i8 zeroext %new) {
+define zeroext i1 @test_cmpxchg_res_i8(i8* %addr, i8 zeroext %desired, i8 zeroext %new) {
 entry:
   %0 = cmpxchg i8* %addr, i8 %desired, i8 %new monotonic monotonic
   %1 = extractvalue { i8, i1 } %0, 1
@@ -33,10 +33,9 @@
 
 ; CHECK-ARMV6-LABEL: test_cmpxchg_res_i8:
 ; CHECK-ARMV6-NEXT:  .fnstart
-; CHECK-ARMV6-NEXT: uxtb [[DESIRED:r[0-9]+]], r1
 ; CHECK-ARMV6-NEXT: [[TRY:.LBB[0-9_]+]]:
 ; CHECK-ARMV6-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
-; CHECK-ARMV6-NEXT: cmp [[LD]], [[DESIRED]]
+; CHECK-ARMV6-NEXT: cmp [[LD]], r1
 ; CHECK-ARMV6-NEXT: movne [[RES:r[0-9]+]], #0
 ; CHECK-ARMV6-NEXT: bxne lr
 ; CHECK-ARMV6-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
@@ -59,7 +58,6 @@
 
 ; CHECK-ARMV7-LABEL: test_cmpxchg_res_i8:
 ; CHECK-ARMV7-NEXT: .fnstart
-; CHECK-ARMV7-NEXT: uxtb [[DESIRED:r[0-9]+]], r1
 ; CHECK-ARMV7-NEXT: b [[TRY:.LBB[0-9_]+]]
 ; CHECK-ARMV7-NEXT: [[HEAD:.LBB[0-9_]+]]:
 ; CHECK-ARMV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
@@ -76,7 +74,6 @@
 
 ; CHECK-THUMBV7-LABEL: test_cmpxchg_res_i8:
 ; CHECK-THUMBV7-NEXT: .fnstart
-; CHECK-THUMBV7-NEXT: uxtb [[DESIRED:r[0-9]+]], r1
 ; CHECK-THUMBV7-NEXT: b [[TRYLD:.LBB[0-9_]+]]
 ; CHECK-THUMBV7-NEXT: [[TRYST:.LBB[0-9_]+]]:
 ; CHECK-THUMBV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
@@ -86,7 +83,7 @@
 ; CHECK-THUMBV7-NEXT: bxeq lr
 ; CHECK-THUMBV7-NEXT: [[TRYLD]]:
 ; CHECK-THUMBV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
-; CHECK-THUMBV7-NEXT: cmp [[LD]], [[DESIRED]]
+; CHECK-THUMBV7-NEXT: cmp [[LD]], r1
 ; CHECK-THUMBV7-NEXT: beq [[TRYST:.LBB[0-9_]+]]
 ; CHECK-THUMBV7-NEXT: movs r0, #0
 ; CHECK-THUMBV7-NEXT: clrex
Index: test/CodeGen/ARM/cmpxchg-O0.ll
===================================================================
--- test/CodeGen/ARM/cmpxchg-O0.ll
+++ test/CodeGen/ARM/cmpxchg-O0.ll
@@ -5,7 +5,7 @@
 ; CHECK-T1-NOT: ldrex
 ; CHECK-T1-NOT: strex
 
-define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind {
+define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 zeroext %desired, i8 %new) nounwind {
 ; CHECK-LABEL: test_cmpxchg_8:
 ; CHECK:     dmb ish
 ; CHECK:     uxtb [[DESIRED:r[0-9]+]], [[DESIRED]]
@@ -24,7 +24,7 @@
   ret { i8, i1 } %res
 }
 
-define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 %desired, i16 %new) nounwind {
+define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 zeroext %desired, i16 %new) nounwind {
 ; CHECK-LABEL: test_cmpxchg_16:
 ; CHECK:     dmb ish
 ; CHECK:     uxth [[DESIRED:r[0-9]+]], [[DESIRED]]
Index: test/CodeGen/Mips/atomic.ll
===================================================================
--- test/CodeGen/Mips/atomic.ll
+++ test/CodeGen/Mips/atomic.ll
@@ -297,7 +297,7 @@
 
 }
 
-define signext i8 @AtomicCmpSwap8(i8 signext %oldval, i8 signext %newval) nounwind {
+define signext i8 @AtomicCmpSwap8(i8 zeroext %oldval, i8 signext %newval) nounwind {
 entry:
   %pair0 = cmpxchg i8* @y, i8 %oldval, i8 %newval monotonic monotonic
   %0 = extractvalue { i8, i1 } %pair0, 0
@@ -345,7 +345,7 @@
 ; HAS-SEB-SEH:   seb     $2, $[[R17]]
 }
 
-define i1 @AtomicCmpSwapRes8(i8* %ptr, i8 signext %oldval, i8 signext %newval) nounwind {
+define i1 @AtomicCmpSwapRes8(i8* %ptr, i8 zeroext %oldval, i8 signext %newval) nounwind {
 entry:
   %0 = cmpxchg i8* %ptr, i8 %oldval, i8 %newval monotonic monotonic
   %1 = extractvalue { i8, i1 } %0, 1
@@ -391,10 +391,11 @@
 ; NO-SEB-SEH:    sra     $[[R20]], $[[R20]], 24
 
 ; HAS-SEB-SEH:   seb     $[[R19:[0-9]+]], $[[R17]]
+; HAS-SEB-SEH:   seb     $[[R20:[0-9]+]], $5
 
 ; FIXME: ...Leading to this split check.
 ; NO-SEB-SEH:    xor     $[[R21:[0-9]+]], $[[R19]], $[[R20]]
-; HAS-SEB-SEH:   xor     $[[R21:[0-9]+]], $[[R19]], $5
+; HAS-SEB-SEH:   xor     $[[R21:[0-9]+]], $[[R19]], $[[R20]]
 
 ; ALL: sltiu   $2, $[[R21]], 1
 }
@@ -462,9 +463,9 @@
 ; NOT-MICROMIPS: addu    $[[R2:[0-9]+]], $[[R1:[0-9]+]], $[[R0:[0-9]+]]
 ; MICROMIPS:     addu16  $[[R2:[0-9]+]], $[[R1:[0-9]+]], $[[R0:[0-9]+]]
 
+; ALL:           andi{{[16 ]*}}  $[[R3:[0-9]+]], $[[R2]], 65535
 ; ALL:           sync
 
-; ALL:           andi    $[[R3:[0-9]+]], $[[R2]], 65535
 ; ALL:       [[BB0:(\$|\.L)[A-Z_0-9]+]]:
 ; ALL:           ll      $[[R4:[0-9]+]], 0($[[R5:[0-9]+]])
 ; ALL:           and     $[[R6:[0-9]+]], $[[R4]], $
@@ -480,11 +481,11 @@
 ; NO-SEB-SEH:    sll     $[[R10:[0-9]+]], $[[R9]], 16
 ; NO-SEB-SEH:    sra     $[[R11:[0-9]+]], $[[R10]], 16
 
-; NO-SEB-SEH:    sll     $[[R12:[0-9]+]], $[[R2]], 16
+; NO-SEB-SEH:    sll     $[[R12:[0-9]+]], $[[R3]], 16
 ; NO-SEB-SEH:    sra     $[[R13:[0-9]+]], $[[R12]], 16
 
 ; HAS-SEB-SEH:   seh     $[[R11:[0-9]+]], $[[R9]]
-; HAS-SEB-SEH:   seh     $[[R13:[0-9]+]], $[[R2]]
+; HAS-SEB-SEH:   seh     $[[R13:[0-9]+]], $[[R3]]
 
 ; ALL:           xor     $[[R12:[0-9]+]], $[[R11]], $[[R13]]
 ; ALL:           sltiu   $3, $[[R12]], 1
Index: test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
===================================================================
--- test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
+++ test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
@@ -0,0 +1,44 @@
+; Make sure that a negative value for the compare-and-swap is zero extended
+; from i8/i16 to i32 since it will be compared for equality.
+; RUN: llc -mtriple=powerpc64le-linux-gnu -verify-machineinstrs < %s | FileCheck %s
+@Glob = global i16 -3344, align 2
+@str = private unnamed_addr constant [9 x i8] c"Failure!\00"
+@str.2 = private unnamed_addr constant [9 x i8] c"Success!\00"
+
+; Function Attrs: nounwind
+define signext i32 @main() {
+; CHECK:    lis 4, 0
+; CHECK:    li 6, 222
+; CHECK:    sync
+; CHECK:    ori 5, 4, 62192
+; CHECK:  .LBB0_1: # %entry
+; CHECK:    lharx 4, 0, 3
+; CHECK:    cmpw 5, 4
+; CHECK:    bne 0, .LBB0_3
+; CHECK:    sthcx. 6, 0, 3
+; CHECK:    bne 0, .LBB0_1
+; CHECK:    b .LBB0_4
+; CHECK:  .LBB0_3: # %entry
+; CHECK:    sthcx. 4, 0, 3
+; CHECK:  .LBB0_4: # %entry
+; CHECK:    cmplwi 4, 62192
+; CHECK:    lwsync
+entry:
+  %0 = cmpxchg i16* @Glob, i16 -3344, i16 222 seq_cst seq_cst
+  %1 = extractvalue { i16, i1 } %0, 1
+  br i1 %1, label %if.then, label %if.else
+
+if.then:                                          ; preds = %entry
+  %puts2 = tail call i32 @puts(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @str.2, i64 0, i64 0))
+  br label %if.end
+
+if.else:                                          ; preds = %entry
+  %puts = tail call i32 @puts(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
+  br label %if.end
+
+if.end:                                           ; preds = %if.else, %if.then
+  ret i32 0
+}
+
+; Function Attrs: nounwind
+declare i32 @puts(i8* nocapture readonly)
Index: test/CodeGen/PowerPC/atomics-regression.ll
===================================================================
--- test/CodeGen/PowerPC/atomics-regression.ll
+++ test/CodeGen/PowerPC/atomics-regression.ll
@@ -401,7 +401,7 @@
   ret void
 }
 
-define void @test40(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test40(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test40:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    b .LBB40_2
@@ -420,7 +420,7 @@
   ret void
 }
 
-define void @test41(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test41(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test41:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB41_1:
@@ -441,7 +441,7 @@
   ret void
 }
 
-define void @test42(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test42(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test42:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB42_1:
@@ -462,7 +462,7 @@
   ret void
 }
 
-define void @test43(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test43(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test43:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -482,7 +482,7 @@
   ret void
 }
 
-define void @test44(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test44(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test44:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -502,7 +502,7 @@
   ret void
 }
 
-define void @test45(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test45(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test45:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -524,7 +524,7 @@
   ret void
 }
 
-define void @test46(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test46(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test46:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -546,7 +546,7 @@
   ret void
 }
 
-define void @test47(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test47(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test47:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -568,7 +568,7 @@
   ret void
 }
 
-define void @test48(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test48(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test48:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -590,7 +590,7 @@
   ret void
 }
 
-define void @test49(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test49(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test49:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -612,7 +612,7 @@
   ret void
 }
 
-define void @test50(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test50(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test50:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    b .LBB50_2
@@ -631,7 +631,7 @@
   ret void
 }
 
-define void @test51(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test51(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test51:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB51_1:
@@ -652,7 +652,7 @@
   ret void
 }
 
-define void @test52(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test52(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test52:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB52_1:
@@ -673,7 +673,7 @@
   ret void
 }
 
-define void @test53(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test53(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test53:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -693,7 +693,7 @@
   ret void
 }
 
-define void @test54(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test54(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test54:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -713,7 +713,7 @@
   ret void
 }
 
-define void @test55(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test55(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test55:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -735,7 +735,7 @@
   ret void
 }
 
-define void @test56(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test56(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test56:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -757,7 +757,7 @@
   ret void
 }
 
-define void @test57(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test57(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test57:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -779,7 +779,7 @@
   ret void
 }
 
-define void @test58(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test58(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test58:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -801,7 +801,7 @@
   ret void
 }
 
-define void @test59(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test59(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test59:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -1245,7 +1245,7 @@
   ret void
 }
 
-define void @test80(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test80(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test80:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    b .LBB80_2
@@ -1264,7 +1264,7 @@
   ret void
 }
 
-define void @test81(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test81(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test81:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB81_1:
@@ -1285,7 +1285,7 @@
   ret void
 }
 
-define void @test82(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test82(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test82:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB82_1:
@@ -1306,7 +1306,7 @@
   ret void
 }
 
-define void @test83(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test83(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test83:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1326,7 +1326,7 @@
   ret void
 }
 
-define void @test84(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test84(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test84:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1346,7 +1346,7 @@
   ret void
 }
 
-define void @test85(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test85(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test85:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1368,7 +1368,7 @@
   ret void
 }
 
-define void @test86(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test86(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test86:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1390,7 +1390,7 @@
   ret void
 }
 
-define void @test87(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test87(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test87:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -1412,7 +1412,7 @@
   ret void
 }
 
-define void @test88(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test88(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test88:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -1434,7 +1434,7 @@
   ret void
 }
 
-define void @test89(i8* %ptr, i8 %cmp, i8 %val) {
+define void @test89(i8* %ptr, i8 zeroext %cmp, i8 %val) {
 ; PPC64LE-LABEL: test89:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -1456,7 +1456,7 @@
   ret void
 }
 
-define void @test90(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test90(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test90:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    b .LBB90_2
@@ -1475,7 +1475,7 @@
   ret void
 }
 
-define void @test91(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test91(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test91:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB91_1:
@@ -1496,7 +1496,7 @@
   ret void
 }
 
-define void @test92(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test92(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test92:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:  .LBB92_1:
@@ -1517,7 +1517,7 @@
   ret void
 }
 
-define void @test93(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test93(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test93:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1537,7 +1537,7 @@
   ret void
 }
 
-define void @test94(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test94(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test94:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1557,7 +1557,7 @@
   ret void
 }
 
-define void @test95(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test95(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test95:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1579,7 +1579,7 @@
   ret void
 }
 
-define void @test96(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test96(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test96:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    lwsync
@@ -1601,7 +1601,7 @@
   ret void
 }
 
-define void @test97(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test97(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test97:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -1623,7 +1623,7 @@
   ret void
 }
 
-define void @test98(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test98(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test98:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
@@ -1645,7 +1645,7 @@
   ret void
 }
 
-define void @test99(i16* %ptr, i16 %cmp, i16 %val) {
+define void @test99(i16* %ptr, i16 zeroext %cmp, i16 %val) {
 ; PPC64LE-LABEL: test99:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    sync
Index: test/CodeGen/SystemZ/cmpxchg-01.ll
===================================================================
--- test/CodeGen/SystemZ/cmpxchg-01.ll
+++ test/CodeGen/SystemZ/cmpxchg-01.ll
@@ -10,7 +10,7 @@
 ;   tested in CHECK.  CHECK-SHIFT also checks that %r3 is not modified before
 ;   being used in the RISBG (in contrast to things like atomic addition,
 ;   which shift %r3 left so that %b is at the high end of the word).
-define i8 @f1(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) {
+define i8 @f1(i8 %dummy, i8 *%src, i8 zeroext %cmp, i8 %swap) {
 ; CHECK-MAIN-LABEL: f1:
 ; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
 ; CHECK-MAIN-DAG: sll %r3, 3
@@ -57,7 +57,7 @@
 }
 
 ; Check generating the comparison result.
-define i32 @f3(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) {
+define i32 @f3(i8 %dummy, i8 *%src, i8 zeroext %cmp, i8 %swap) {
 ; CHECK-MAIN-LABEL: f3:
 ; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
 ; CHECK-MAIN-DAG: sll %r3, 3
Index: test/CodeGen/SystemZ/cmpxchg-02.ll
===================================================================
--- test/CodeGen/SystemZ/cmpxchg-02.ll
+++ test/CodeGen/SystemZ/cmpxchg-02.ll
@@ -10,7 +10,7 @@
 ;   tested in CHECK.  CHECK-SHIFT also checks that %r3 is not modified before
 ;   being used in the RISBG (in contrast to things like atomic addition,
 ;   which shift %r3 left so that %b is at the high end of the word).
-define i16 @f1(i16 %dummy, i16 *%src, i16 %cmp, i16 %swap) {
+define i16 @f1(i16 %dummy, i16 *%src, i16 zeroext %cmp, i16 %swap) {
 ; CHECK-MAIN-LABEL: f1:
 ; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
 ; CHECK-MAIN-DAG: sll %r3, 3
@@ -57,7 +57,7 @@
 }
 
 ; Check generating the comparison result.
-define i32 @f3(i16 %dummy, i16 *%src, i16 %cmp, i16 %swap) {
+define i32 @f3(i16 %dummy, i16 *%src, i16 zeroext %cmp, i16 %swap) {
 ; CHECK-MAIN-LABEL: f3:
 ; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
 ; CHECK-MAIN-DAG: sll %r3, 3