Index: lib/Target/AArch64/AArch64SVEInstrInfo.td =================================================================== --- lib/Target/AArch64/AArch64SVEInstrInfo.td +++ lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -15,6 +15,9 @@ defm ADD_ZZZ : sve_int_bin_cons_arit_0<0b000, "add">; defm SUB_ZZZ : sve_int_bin_cons_arit_0<0b001, "sub">; + defm ADD_ZPmZ : sve_int_bin_pred_arit_0<0b000, "add">; + defm SUB_ZPmZ : sve_int_bin_pred_arit_0<0b001, "sub">; + defm ZIP1_ZZZ : sve_int_perm_bin_perm_zz<0b000, "zip1">; defm ZIP2_ZZZ : sve_int_perm_bin_perm_zz<0b001, "zip2">; Index: lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp =================================================================== --- lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp +++ lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp @@ -91,9 +91,9 @@ static DecodeStatus DecodePPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decode); -LLVM_ATTRIBUTE_UNUSED static DecodeStatus -DecodePPR_3bRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decode); +static DecodeStatus DecodePPR_3bRegisterClass(MCInst &Inst, + unsigned RegNo, uint64_t Address, + const void *Decode); static DecodeStatus DecodeFixedPointScaleImm32(MCInst &Inst, unsigned Imm, uint64_t Address, Index: lib/Target/AArch64/SVEInstrFormats.td =================================================================== --- lib/Target/AArch64/SVEInstrFormats.td +++ lib/Target/AArch64/SVEInstrFormats.td @@ -71,6 +71,37 @@ } //===----------------------------------------------------------------------===// +// SVE Integer Arithmetic - Binary Predicated Group +//===----------------------------------------------------------------------===// + +class sve_int_bin_pred_arit_log sz8_64, bits<2> fmt, bits<3> opc, + string asm, ZPRRegOp zprty> +: I<(outs zprty:$Zdn), (ins PPR3bAny:$Pg, zprty:$_Zdn, zprty:$Zm), + asm, "\t$Zdn, $Pg/m, $_Zdn, $Zm", "", []>, Sched<[]> { + bits<3> Pg; + bits<5> Zdn; + bits<5> Zm; + let Inst{31-24} = 0b00000100; + let Inst{23-22} = sz8_64; + let Inst{21} = 0b0; + let Inst{20-19} = fmt; + let Inst{18-16} = opc; + let Inst{15-13} = 0b000; + let Inst{12-10} = Pg; + let Inst{9-5} = Zm; + let Inst{4-0} = Zdn; + + let Constraints = "$Zdn = $_Zdn"; +} + +multiclass sve_int_bin_pred_arit_0 opc, string asm> { + def _B : sve_int_bin_pred_arit_log<0b00, 0b00, opc, asm, ZPR8>; + def _H : sve_int_bin_pred_arit_log<0b01, 0b00, opc, asm, ZPR16>; + def _S : sve_int_bin_pred_arit_log<0b10, 0b00, opc, asm, ZPR32>; + def _D : sve_int_bin_pred_arit_log<0b11, 0b00, opc, asm, ZPR64>; +} + +//===----------------------------------------------------------------------===// // SVE Permute - Predicates Group //===----------------------------------------------------------------------===// Index: test/MC/AArch64/SVE/add-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/add-diagnostics.s +++ test/MC/AArch64/SVE/add-diagnostics.s @@ -17,3 +17,38 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: add z27.h, z11.h, z27.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// Invalid predicate suffix '/a' +add z29.d, p7/a, z29.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expecting 'm' or 'z' predication +// CHECK-NEXT: add z29.d, p7/a, z29.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// Missing predicate suffix +add z29.d, p7, z29.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: add z29.d, p7, z29.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// error: restricted predicate has range [0, 7]. + +add z22.b, p8/m, z22.b, z11.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: add z22.b, p8/m, z22.b, z11.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +add z22.h, p8/m, z22.h, z6.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: add z22.h, p8/m, z22.h, z6.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +add z30.s, p8/m, z30.s, z13.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: add z30.s, p8/m, z30.s, z13.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +add z29.d, p8/m, z29.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: add z29.d, p8/m, z29.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: \ No newline at end of file Index: test/MC/AArch64/SVE/add.s =================================================================== --- test/MC/AArch64/SVE/add.s +++ test/MC/AArch64/SVE/add.s @@ -19,6 +19,12 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: b7 01 e8 04 +add z23.b, p3/m, z23.b, z13.b +// CHECK-INST: add z23.b, p3/m, z23.b, z13.b +// CHECK-ENCODING: [0xb7,0x0d,0x00,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 00 04 + add z0.s, z0.s, z0.s // CHECK-INST: add z0.s, z0.s, z0.s // CHECK-ENCODING: [0x00,0x00,0xa0,0x04] @@ -43,12 +49,30 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 03 3f 04 +add z0.h, p0/m, z0.h, z0.h +// CHECK-INST: add z0.h, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0x40,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 40 04 + add z0.h, z0.h, z0.h // CHECK-INST: add z0.h, z0.h, z0.h // CHECK-ENCODING: [0x00,0x00,0x60,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 00 60 04 +add z0.b, p0/m, z0.b, z0.b +// CHECK-INST: add z0.b, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x00,0x00,0x00,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 00 04 + +add z0.s, p0/m, z0.s, z0.s +// CHECK-INST: add z0.s, p0/m, z0.s, z0.s +// CHECK-ENCODING: [0x00,0x00,0x80,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 80 04 + add z23.b, z13.b, z8.b // CHECK-INST: add z23.b, z13.b, z8.b // CHECK-ENCODING: [0xb7,0x01,0x28,0x04] @@ -61,6 +85,12 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 00 e0 04 +add z0.d, p0/m, z0.d, z0.d +// CHECK-INST: add z0.d, p0/m, z0.d, z0.d +// CHECK-ENCODING: [0x00,0x00,0xc0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 c0 04 + add z31.h, z31.h, z31.h // CHECK-INST: add z31.h, z31.h, z31.h // CHECK-ENCODING: [0xff,0x03,0x7f,0x04] @@ -79,24 +109,90 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 55 01 f5 04 +add z23.h, p3/m, z23.h, z13.h +// CHECK-INST: add z23.h, p3/m, z23.h, z13.h +// CHECK-ENCODING: [0xb7,0x0d,0x40,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 40 04 + +add z23.s, p3/m, z23.s, z13.s +// CHECK-INST: add z23.s, p3/m, z23.s, z13.s +// CHECK-ENCODING: [0xb7,0x0d,0x80,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 80 04 + +add z31.s, p7/m, z31.s, z31.s +// CHECK-INST: add z31.s, p7/m, z31.s, z31.s +// CHECK-ENCODING: [0xff,0x1f,0x80,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f 80 04 + add z21.h, z10.h, z21.h // CHECK-INST: add z21.h, z10.h, z21.h // CHECK-ENCODING: [0x55,0x01,0x75,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 55 01 75 04 +add z23.d, p3/m, z23.d, z13.d +// CHECK-INST: add z23.d, p3/m, z23.d, z13.d +// CHECK-ENCODING: [0xb7,0x0d,0xc0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d c0 04 + +add z21.d, p5/m, z21.d, z10.d +// CHECK-INST: add z21.d, p5/m, z21.d, z10.d +// CHECK-ENCODING: [0x55,0x15,0xc0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 c0 04 + +add z21.b, p5/m, z21.b, z10.b +// CHECK-INST: add z21.b, p5/m, z21.b, z10.b +// CHECK-ENCODING: [0x55,0x15,0x00,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 00 04 + add z21.s, z10.s, z21.s // CHECK-INST: add z21.s, z10.s, z21.s // CHECK-ENCODING: [0x55,0x01,0xb5,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 55 01 b5 04 +add z21.h, p5/m, z21.h, z10.h +// CHECK-INST: add z21.h, p5/m, z21.h, z10.h +// CHECK-ENCODING: [0x55,0x15,0x40,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 40 04 + +add z31.h, p7/m, z31.h, z31.h +// CHECK-INST: add z31.h, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xff,0x1f,0x40,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f 40 04 + add z23.h, z13.h, z8.h // CHECK-INST: add z23.h, z13.h, z8.h // CHECK-ENCODING: [0xb7,0x01,0x68,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: b7 01 68 04 +add z31.d, p7/m, z31.d, z31.d +// CHECK-INST: add z31.d, p7/m, z31.d, z31.d +// CHECK-ENCODING: [0xff,0x1f,0xc0,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f c0 04 + +add z21.s, p5/m, z21.s, z10.s +// CHECK-INST: add z21.s, p5/m, z21.s, z10.s +// CHECK-ENCODING: [0x55,0x15,0x80,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 80 04 + +add z31.b, p7/m, z31.b, z31.b +// CHECK-INST: add z31.b, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xff,0x1f,0x00,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f 00 04 + add z23.s, z13.s, z8.s // CHECK-INST: add z23.s, z13.s, z8.s // CHECK-ENCODING: [0xb7,0x01,0xa8,0x04] Index: test/MC/AArch64/SVE/sub-diagnostics.s =================================================================== --- test/MC/AArch64/SVE/sub-diagnostics.s +++ test/MC/AArch64/SVE/sub-diagnostics.s @@ -17,3 +17,38 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand // CHECK-NEXT: sub z0.h, z8.h, z8.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// Invalid predicate suffix '/a' +sub z29.d, p7/a, z29.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expecting 'm' or 'z' predication +// CHECK-NEXT: sub z29.d, p7/a, z29.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// Missing predicate suffix +sub z29.d, p7, z29.d, z8.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: sub z29.d, p7, z29.d, z8.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// error: restricted predicate has range [0, 7]. + +sub z26.b, p8/m, z26.b, z27.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: sub z26.b, p8/m, z26.b, z27.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sub z14.h, p8/m, z14.h, z18.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: sub z14.h, p8/m, z14.h, z18.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sub z30.s, p8/m, z30.s, z23.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: sub z30.s, p8/m, z30.s, z23.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sub z29.d, p8/m, z29.d, z3.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: sub z29.d, p8/m, z29.d, z3.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: test/MC/AArch64/SVE/sub.s =================================================================== --- test/MC/AArch64/SVE/sub.s +++ test/MC/AArch64/SVE/sub.s @@ -19,6 +19,18 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 55 05 35 04 +sub z31.d, p7/m, z31.d, z31.d +// CHECK-INST: sub z31.d, p7/m, z31.d, z31.d +// CHECK-ENCODING: [0xff,0x1f,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f c1 04 + +sub z23.h, p3/m, z23.h, z13.h +// CHECK-INST: sub z23.h, p3/m, z23.h, z13.h +// CHECK-ENCODING: [0xb7,0x0d,0x41,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 41 04 + sub z31.h, z31.h, z31.h // CHECK-INST: sub z31.h, z31.h, z31.h // CHECK-ENCODING: [0xff,0x07,0x7f,0x04] @@ -43,6 +55,12 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 00 04 a0 04 +sub z23.s, p3/m, z23.s, z13.s +// CHECK-INST: sub z23.s, p3/m, z23.s, z13.s +// CHECK-ENCODING: [0xb7,0x0d,0x81,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 81 04 + sub z23.b, z13.b, z8.b // CHECK-INST: sub z23.b, z13.b, z8.b // CHECK-ENCODING: [0xb7,0x05,0x28,0x04] @@ -61,6 +79,24 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: 55 05 b5 04 +sub z21.s, p5/m, z21.s, z10.s +// CHECK-INST: sub z21.s, p5/m, z21.s, z10.s +// CHECK-ENCODING: [0x55,0x15,0x81,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 81 04 + +sub z31.s, p7/m, z31.s, z31.s +// CHECK-INST: sub z31.s, p7/m, z31.s, z31.s +// CHECK-ENCODING: [0xff,0x1f,0x81,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f 81 04 + +sub z0.d, p0/m, z0.d, z0.d +// CHECK-INST: sub z0.d, p0/m, z0.d, z0.d +// CHECK-ENCODING: [0x00,0x00,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 c1 04 + sub z0.b, z0.b, z0.b // CHECK-INST: sub z0.b, z0.b, z0.b // CHECK-ENCODING: [0x00,0x04,0x20,0x04] @@ -73,24 +109,60 @@ // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: b7 05 e8 04 +sub z23.d, p3/m, z23.d, z13.d +// CHECK-INST: sub z23.d, p3/m, z23.d, z13.d +// CHECK-ENCODING: [0xb7,0x0d,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d c1 04 + sub z23.s, z13.s, z8.s // CHECK-INST: sub z23.s, z13.s, z8.s // CHECK-ENCODING: [0xb7,0x05,0xa8,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: b7 05 a8 04 +sub z31.b, p7/m, z31.b, z31.b +// CHECK-INST: sub z31.b, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xff,0x1f,0x01,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f 01 04 + +sub z0.h, p0/m, z0.h, z0.h +// CHECK-INST: sub z0.h, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0x41,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 41 04 + sub z31.d, z31.d, z31.d // CHECK-INST: sub z31.d, z31.d, z31.d // CHECK-ENCODING: [0xff,0x07,0xff,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 07 ff 04 +sub z31.h, p7/m, z31.h, z31.h +// CHECK-INST: sub z31.h, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xff,0x1f,0x41,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: ff 1f 41 04 + sub z23.h, z13.h, z8.h // CHECK-INST: sub z23.h, z13.h, z8.h // CHECK-ENCODING: [0xb7,0x05,0x68,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: b7 05 68 04 +sub z21.b, p5/m, z21.b, z10.b +// CHECK-INST: sub z21.b, p5/m, z21.b, z10.b +// CHECK-ENCODING: [0x55,0x15,0x01,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 01 04 + +sub z21.d, p5/m, z21.d, z10.d +// CHECK-INST: sub z21.d, p5/m, z21.d, z10.d +// CHECK-ENCODING: [0x55,0x15,0xc1,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 c1 04 + sub z0.d, z0.d, z0.d // CHECK-INST: sub z0.d, z0.d, z0.d // CHECK-ENCODING: [0x00,0x04,0xe0,0x04] @@ -102,3 +174,27 @@ // CHECK-ENCODING: [0xff,0x07,0xbf,0x04] // CHECK-ERROR: instruction requires: sve // CHECK-UNKNOWN: ff 07 bf 04 + +sub z0.b, p0/m, z0.b, z0.b +// CHECK-INST: sub z0.b, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x00,0x00,0x01,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 01 04 + +sub z0.s, p0/m, z0.s, z0.s +// CHECK-INST: sub z0.s, p0/m, z0.s, z0.s +// CHECK-ENCODING: [0x00,0x00,0x81,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 00 81 04 + +sub z21.h, p5/m, z21.h, z10.h +// CHECK-INST: sub z21.h, p5/m, z21.h, z10.h +// CHECK-ENCODING: [0x55,0x15,0x41,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 55 15 41 04 + +sub z23.b, p3/m, z23.b, z13.b +// CHECK-INST: sub z23.b, p3/m, z23.b, z13.b +// CHECK-ENCODING: [0xb7,0x0d,0x01,0x04] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: b7 0d 01 04